Low-power-consumption thunder and lightning peak acquisition circuit

Abstract

The utility model belongs to the technical field of acquisition circuits, and particularly relates to a low-power-consumption thunder and lightning peak acquisition circuit, which comprises a single chip microcomputer, a nixie tube display circuit, a peak holding circuit, a peak excitation circuit and a power supply circuit. The single chip microcomputer is connected with a nixie tube power supply circuit through a wire, the nixie tube power supply circuit is connected with a nixie tube display circuit through a wire, the single chip microcomputer is connected with a GPRS power supply circuit through a wire, the single chip microcomputer is connected with a GPRS communication circuit through a wire, and the GPRS communication circuit is connected with the GPRS power supply circuit through a wire. According to the utility model, the power consumption of equipment can be greatly reduced, pure battery power supply can be realized, flexible installation can be realized, and severe environments such as extra-high shady environments are not hindered. And the equipment size is greatly reduced, the installation cost is greatly reduced, and the installation condition requirements are further reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of acquisition circuits, in particular to a low-power lightning peak acquisition circuit. Background Technique

[0002] In lightning activities, the process of real-time monitoring and recording of the peak current or peak voltage of lightning. By collecting the peak data of lightning, the intensity and frequency of lightning activities can be understood, which helps to predict the occurrence of lightning and its possible impacts. This is of great significance for protecting electronic devices, buildings and personnel safety. The utility model patent with the publication number of CN211402467U discloses a lightning peak monitor, including a monitor body. At the bottom of both ends of the monitor body, clamping plates are relatively arranged. The clamping plates are fixedly connected with the monitor body. An installation plate is arranged at the bottom of the monitor body. Two first chutes are relatively dug at both ends of the top of the installation plate. A slider is movably connected inside the first chute. A base is arranged below the installation plate. A support rod is connected between the base and the installation plate; the bottom of this monitor is provided with an installation plate. The clamping plates are squeezed by the sliders on both sides of the installation plate to fix the monitor body on the top of the installation plate. The inclined surface arranged on the side of the slider squeezes the clamping plate. The tighter the squeeze, the firmer the fixation. The spring arranged at the bottom of the installation plate applies a certain tension to the installation plate, and it can move to a certain extent when the wind blows, avoiding the installation plate being fixed rigidly.

[0003] In the current technology, the circuit of the monitor is usually powered by mains electricity or outdoor solar energy. However, the installation positions of such devices usually cannot achieve mains electricity supply. Using solar power supply will greatly increase the product volume, installation conditions, and more relevant qualifications required for the equipment. Content of the Utility Model

[0004] The purpose of the utility model is to provide a low-power lightning peak acquisition circuit, which solves the problem that in the current technology, the circuit of the monitor is powered by mains electricity or outdoor solar energy, but the installation positions of such devices usually cannot achieve mains electricity supply. Using solar power supply will greatly increase the product volume, installation conditions, and more relevant qualifications required for the equipment.

[0005] To achieve the above object, the present utility model provides the following technical solution: A low-power lightning peak acquisition circuit, comprising a single-chip microcomputer, a digital tube display circuit is connected to the single-chip microcomputer through a wire, a peak holding circuit is connected to the single-chip microcomputer through a wire, a peak excitation circuit is connected to the single-chip microcomputer through a wire, a digital tube power supply circuit is connected to the single-chip microcomputer through a wire, the digital tube power supply circuit and the digital tube display circuit are connected through a wire, a GPRS power supply circuit is connected to the single-chip microcomputer through a wire, a GPRS communication circuit is connected to the single-chip microcomputer through a wire, the GPRS communication circuit and the GPRS power supply circuit are connected through a wire, and a key excitation circuit is connected to the single-chip microcomputer through a wire.

[0006] Preferably, the digital tube display circuit includes a second chip and a third chip. A first light-emitting diode is connected to the second chip through a wire. A third resistor is connected to the first light-emitting diode through a wire. A fourth resistor is connected to the first light-emitting diode through a wire. A sixth resistor is connected to the first light-emitting diode through a wire. An eighth resistor is connected to the first light-emitting diode through a wire. A ninth resistor is connected to the first light-emitting diode through a wire. A fifth resistor is connected to the first light-emitting diode through a wire. A seventh resistor is connected to the first light-emitting diode through a wire. A tenth resistor is connected to the first light-emitting diode through a wire. The fifth resistor and the second chip are connected through a wire. The seventh resistor and the second chip are connected through a wire. The tenth resistor and the second chip are connected through a wire;

[0007] A second light-emitting diode is connected to the third chip through a wire. A twelfth resistor is connected to the second light-emitting diode through a wire. A thirteenth resistor is connected to the second light-emitting diode through a wire. A fourteenth resistor is connected to the second light-emitting diode through a wire. A fifteenth resistor is connected to the second light-emitting diode through a wire. A sixteenth resistor is connected to the second light-emitting diode through a wire. A seventeenth resistor is connected to the second light-emitting diode through a wire. An eighteenth resistor is connected to the second light-emitting diode through a wire. A nineteenth resistor is connected to the second light-emitting diode through a wire. The fourteenth resistor and the third chip are connected through a wire. The sixteenth resistor and the third chip are connected through a wire. The nineteenth resistor and the third chip are connected through a wire. The digital tube display circuit can display the current lightning strike count and the peak value of the most recent lightning strike through two four-digit digital tubes.

[0008] Preferably, the peak holding circuit includes a twenty-sixth resistor. A first diode is connected to the twenty-sixth resistor through a wire. A second diode is connected to the twenty-sixth resistor through a wire. A third diode is connected to the second diode through a wire. A fifth diode is connected to the third diode through a wire. A thirtieth resistor is connected to the third diode and the fifth diode through a wire. The first diode and the fifth diode are connected through a wire. A twenty-eighth resistor is connected to the first diode and the fifth diode through a wire. The twenty-eighth resistor is connected to the second diode and the third diode through a wire. A third capacitor is connected in parallel to the outside of the twenty-eighth resistor through a wire. A fourth capacitor is connected in parallel to the outside of the twenty-eighth resistor through a wire. A twenty-ninth resistor is connected in parallel to the outside of the fourth capacitor through a wire. A twenty-seventh resistor is connected between the fourth capacitor and the twenty-ninth resistor through a wire. A fifth capacitor is connected in parallel to the outside of the twenty-ninth resistor through a wire. A fourth diode is connected in parallel to the outside of the twenty-ninth resistor through a wire. By setting the peak holding circuit, the input signal of the peak acquisition coil can be processed, the peak can be acquired and held through the circuit for the single-chip microcomputer to read and calculate.

[0009] Preferably, the peak excitation circuit includes a thirty-second resistor. A sixth diode is connected to the thirty-second resistor through a wire. A seventh diode is connected to the thirty-second resistor through a wire. An eighth diode is connected to the seventh diode through a wire. An eleventh diode is connected to the eighth diode through a wire. A thirty-fifth resistor is connected to the eighth diode and the eleventh diode through a wire. A ninth diode is connected to the eighth diode and the eleventh diode through a wire. The ninth diode is connected to the sixth diode and the seventh diode through a wire. A ninth capacitor is connected in parallel to the outside of the ninth diode through a wire. A thirty-fourth resistor is connected to the ninth capacitor through a wire. A twelfth diode is connected to the thirty-fourth resistor through a wire. A thirty-sixth resistor is connected to the ninth capacitor through a wire. The twelfth diode and the thirty-sixth resistor are connected through a wire. A fourth chip is connected in parallel to the outside of the twelfth diode through a wire. A thirty-third resistor is connected to the fourth chip through a wire. A tenth capacitor is connected to the fourth chip through a wire. The tenth capacitor and the thirty-third resistor are connected through a wire. The peak excitation circuit can process the input signal of the peak acquisition coil and convert it into a switching signal. Whenever a lightning strike signal is generated, the circuit will provide a trigger level for the single-chip microcomputer to wake up the device.

[0010] Preferably, the digital tube power supply circuit includes a first resistor, a first triode is connected to the first resistor through a wire, and a second chip is connected to the first resistor and the first triode through a wire. The digital tube power supply circuit can control the power supply of the digital tube display circuit through the single-chip microcomputer, cut off the power supply when there is no need to display, and reduce the power consumption to the greatest extent.

[0011] Preferably, the GPRS power supply circuit includes a second resistor, a second triode is connected to the second resistor through a wire, and a first chip is connected to the second resistor and the second triode through a wire. The GPRS power supply circuit can control the power supply of the GPRS communication circuit through the single-chip microcomputer, cut off the power supply when there is no need to communicate, and reduce the power consumption to the greatest extent.

[0012] Preferably, the GPRS communication circuit includes a twenty-second resistor, a third triode is connected to the twenty-second resistor through a wire, a twenty-third resistor is connected to the third triode through a wire, a twentieth resistor is connected to the third triode through a wire, a second capacitor is connected to the twentieth resistor through a wire, the second capacitor and the twenty-third resistor are connected through a wire, both the second capacitor and the twenty-third resistor are connected to the third triode through a wire, a first chip is connected to the twenty-second resistor through a wire, both the twentieth resistor and the twenty-third resistor are connected to the first chip through a wire, a twenty-first resistor is connected to the first chip through a wire, a twenty-fourth resistor is connected to the twenty-first resistor through a wire, the twenty-fourth resistor and the first chip are connected through a wire, a fourth triode is connected to the twenty-first resistor and the twenty-fourth resistor through a wire, a twenty-fifth resistor is connected to the fourth triode through a wire, the fourth triode and the first chip are connected through a wire, and the twenty-fifth resistor and the first chip are connected through a wire. The GPRS communication circuit can upload data through the module.

[0013] Preferably, the key activation circuit includes an eleventh resistor, a first capacitor is connected to the eleventh resistor through a wire, and a first switch is connected in parallel to the outside of the first capacitor through a wire. The key activation circuit can wake up the device manually. Through the external key, the circuit can provide a trigger level to the single-chip microcomputer according to the key instruction to wake up the device.

[0014] Compared with the prior art, the beneficial effects of the present utility model are as follows:

[0015] The present utility model can greatly reduce the power consumption of the device, can achieve pure battery power supply, can be flexibly installed, and even harsh environments such as high backlighting are not obstacles. The volume of the device is also greatly reduced, and the installation cost and installation condition requirements are further reduced. Description of the Drawings

[0016] Figure 1 is a three-dimensional view of the overall structure of the present utility model;

[0017] Figure 2 is the present utility model Figure 1 of the circuit diagram of the digital tube display circuit Figure 1 ;

[0018] Figure 3 is the present utility model Figure 1 of the circuit diagram of the digital tube display circuit Figure 2 ;

[0019] Figure 4 is the present utility model Figure 1 of the circuit diagram of the peak holding circuit;

[0020] Figure 5 is the present utility model Figure 1 of the circuit diagram of the peak excitation circuit;

[0021] Figure 6 is the present utility model Figure 1 of the circuit diagram of the digital tube power supply circuit;

[0022] Figure 7 is the present utility model Figure 1 of the circuit diagram of the GPRS power supply circuit;

[0023] Figure 8 is the present utility model Figure 1 of the circuit diagram of the GPRS communication circuit Figure 1 ;

[0024] Figure 9 is the present utility model Figure 1 of the circuit diagram of the GPRS communication circuit Figure 2 ;

[0025] Figure 10 is the present utility model Figure 1 of the circuit diagram of the GPRS communication circuit Figure 3 ;

[0026] Figure 11 is the present utility model Figure 1 of the circuit diagram of the key excitation circuit.

[0027] In the figure: 1. Single-chip microcomputer; 2. Digital tube display circuit; 3. Peak holding circuit; 4. Peak excitation circuit; 5. Digital tube power supply circuit; 6. GPRS power supply circuit; 7. GPRS communication circuit; 8. Button excitation circuit; R1. First resistor; R2. Second resistor; R3. Third resistor; R4. Fourth resistor; R5. Fifth resistor; R6. Sixth resistor; R7. Seventh resistor; R8. Eighth resistor; R9. Ninth resistor; R10. Tenth resistor; R11. Eleventh resistor; R12. Twelfth resistor; R13. Thirteenth resistor; R14. Fourteenth resistor; R15. Fifteenth resistor; R16. Sixteenth resistor; R17. Seventeenth resistor; R18. Eighteenth resistor; R19. Nineteenth resistor; R20. Twentieth resistor; R21. Twenty-first resistor; R22. Twenty-second resistor; R23. Twenty-third resistor; R24. Twenty-fourth resistor; R25. Twenty-fifth resistor; R26. Twenty-sixth resistor; R27. Twenty-seventh resistor; R28. Twenty-eighth resistor; R29. Twenty-ninth resistor; R30. Thirtieth resistor; R32. Thirty-second resistor; R33. Thirty-third resistor; R34. Thirty-fourth resistor; R35. Thirty-fifth resistor; R36. Thirty-sixth resistor; U1. First chip; U2. Second chip; U3. Third chip; U4. Fourth chip; S1. First switch; C1. First capacitor; C2. Second capacitor; C3. Third capacitor; C4. Fourth capacitor; C5. Fifth capacitor; C9. Ninth capacitor; C10. Tenth capacitor; D1. First diode; D2. Second diode; D3. Third diode; D4. Fourth diode; D5. Fifth diode; D6. Sixth diode; D7. Seventh diode; D8. Eighth diode; D9. Ninth diode; D10. Twelfth diode; D11. Eleventh diode; Q1. First triode; Q2. Second triode; Q3. Third triode; Q4. Fourth triode; LED1. First light-emitting diode; LED2. Second light-emitting diode. Detailed implementation manners

[0028] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0029] Please refer to Figure 1, a low-power lightning peak acquisition circuit, including a single-chip microcomputer 1, a digital tube display circuit 2 is connected to the single-chip microcomputer 1 through a wire, a peak holding circuit 3 is connected to the single-chip microcomputer 1 through a wire, a peak excitation circuit 4 is connected to the single-chip microcomputer 1 through a wire, a digital tube power supply circuit 5 is connected to the single-chip microcomputer 1 through a wire, the digital tube power supply circuit 5 and the digital tube display circuit 2 are connected through a wire, a GPRS power supply circuit 6 is connected to the single-chip microcomputer 1 through a wire, a GPRS communication circuit 7 is connected to the single-chip microcomputer 1 through a wire, the GPRS communication circuit 7 and the GPRS power supply circuit 6 are connected through a wire, and a key excitation circuit 8 is connected to the single-chip microcomputer 1 through a wire.

[0030] Please refer to Figure 2 , Figure 3 , the digital tube display circuit 2 includes a second chip U2 and a third chip U3. A first light-emitting diode LED1 is connected to the second chip U2 through a wire. A third resistor R3 is connected to the first light-emitting diode LED1 through a wire. A fourth resistor R4 is connected to the first light-emitting diode LED1 through a wire. A sixth resistor R6 is connected to the first light-emitting diode LED1 through a wire. An eighth resistor R8 is connected to the first light-emitting diode LED1 through a wire. A ninth resistor R9 is connected to the first light-emitting diode LED1 through a wire. A fifth resistor R5 is connected to the first light-emitting diode LED1 through a wire. A seventh resistor R7 is connected to the first light-emitting diode LED1 through a wire. A tenth resistor R10 is connected to the first light-emitting diode LED1 through a wire. The fifth resistor R5 and the second chip U2 are connected through a wire. The seventh resistor R7 and the second chip U2 are connected through a wire. The tenth resistor R10 and the second chip U2 are connected through a wire;

[0031] A second light-emitting diode LED2 is connected to the third chip U3 through a wire. A twelfth resistor R12 is connected to the second light-emitting diode LED2 through a wire. A thirteenth resistor R13 is connected to the second light-emitting diode LED2 through a wire. A fourteenth resistor R14 is connected to the second light-emitting diode LED2 through a wire. A fifteenth resistor R15 is connected to the second light-emitting diode LED2 through a wire. A sixteenth resistor R16 is connected to the second light-emitting diode LED2 through a wire. A seventeenth resistor R17 is connected to the second light-emitting diode LED2 through a wire. An eighteenth resistor R18 is connected to the second light-emitting diode LED2 through a wire. A nineteenth resistor R19 is connected to the second light-emitting diode LED2 through a wire. The fourteenth resistor R14 and the third chip U3 are connected through a wire. The sixteenth resistor R16 and the third chip U3 are connected through a wire. The nineteenth resistor R19 and the third chip U3 are connected through a wire. The digital tube display circuit 2 can display the current lightning strike count and the peak value of the most recent lightning strike through two four-digit digital tubes.

[0032] Please refer to Figure 4 As shown, the peak holding circuit 3 includes a twenty-sixth resistor R26. A first diode D1 is connected to the twenty-sixth resistor R26 through a wire. A second diode D2 is connected to the twenty-sixth resistor R26 through a wire. A third diode D3 is connected to the second diode D2 through a wire. A fifth diode D5 is connected to the third diode D3 through a wire. A thirtieth resistor R30 is commonly connected to the third diode D3 and the fifth diode D5 through a wire. The first diode D1 and the fifth diode D5 are connected through a wire. A twenty-eighth resistor R28 is commonly connected to the first diode D1 and the fifth diode D5 through a wire. The twenty-eighth resistor R28 is connected to the second diode D2 and the third diode D3 through a wire. A third capacitor C3 is connected in parallel to the outside of the twenty-eighth resistor R28 through a wire. A fourth capacitor C4 is connected in parallel to the outside of the twenty-eighth resistor R28 through a wire. A twenty-ninth resistor R29 is connected in parallel to the outside of the fourth capacitor C4 through a wire. A twenty-seventh resistor R27 is connected between the fourth capacitor C4 and the twenty-ninth resistor R29 through a wire. A fifth capacitor C5 is connected in parallel to the outside of the twenty-ninth resistor R29 through a wire. A fourth diode D4 is connected in parallel to the outside of the twenty-ninth resistor R29 through a wire. By setting the peak holding circuit 3, the input signal of the peak acquisition coil can be processed, the peak value can be acquired and held through the circuit for the single-chip microcomputer 1 to read and calculate.

[0033] Please refer to Figure 5, the peak excitation circuit 4 includes a thirty-second resistor R32, a sixth diode D6 is connected to the thirty-second resistor R32 through a wire, a seventh diode D7 is connected to the thirty-second resistor R32 through a wire, an eighth diode D8 is connected to the seventh diode D7 through a wire, an eleventh diode D11 is connected to the eighth diode D8 through a wire, a thirty-fifth resistor R35 is connected to the eighth diode D8 and the eleventh diode D11 through a wire, a ninth diode D9 is connected to the eighth diode D8 and the eleventh diode D11 through a wire, the ninth diode D9, the sixth diode D6 and the seventh diode D7 are connected through a wire, a ninth capacitor C9 is connected in parallel to the outside of the ninth diode D9 through a wire, a thirty-fourth resistor R34 is connected to the ninth capacitor C9 through a wire, a tenth diode D10 is connected to the thirty-fourth resistor R34 through a wire, a thirty-sixth resistor R36 is connected to the ninth capacitor C9 through a wire, the tenth diode D10 and the thirty-sixth resistor R36 are connected through a wire, a fourth chip U4 is connected in parallel to the outside of the tenth diode D10 through a wire, a thirty-third resistor R33 is connected to the fourth chip U4 through a wire, a tenth capacitor C10 is connected to the fourth chip U4 through a wire, and the tenth capacitor C10 and the thirty-third resistor R33 are connected through a wire. The peak excitation circuit 4 can process the input signal of the peak acquisition coil and convert it into a switching signal. Whenever a lightning strike signal is generated, the circuit will provide a trigger level to the single-chip microcomputer 1 to wake up the device.

[0034] Please refer to Figure 6 , the digital tube power supply circuit 5 includes a first resistor R1, a first triode Q1 is connected to the first resistor R1 through a wire, and a second chip U2 is connected to the first resistor R1 and the first triode Q1 through a wire. The digital tube power supply circuit 5 can control the power supply of the digital tube display circuit 2 through the single-chip microcomputer 1, cut off the power supply when there is no need to display, and reduce the power consumption to the greatest extent.

[0035] Please refer to Figure 7 , the GPRS power supply circuit 6 includes a second resistor R2, a second triode Q2 is connected to the second resistor R2 through a wire, and a first chip U1 is connected to the second resistor R2 and the second triode Q2 through a wire. The GPRS power supply circuit 6 can control the power supply of the GPRS communication circuit 7 through the single-chip microcomputer 1, cut off the power supply when there is no need to communicate, and reduce the power consumption to the greatest extent.

[0036] Please refer to Figures 8 - 10, the GPRS communication circuit 7 includes a twenty-second resistor R22. A third triode Q3 is connected to the twenty-second resistor R22 through a wire. A twenty-third resistor R23 is connected to the third triode Q3 through a wire. A twentieth resistor R20 is connected to the third triode Q3 through a wire. A second capacitor C2 is connected to the twentieth resistor R20 through a wire. The second capacitor C2 and the twenty-third resistor R23 are connected through a wire. Both the second capacitor C2 and the twenty-third resistor R23 are connected to the third triode Q3 through a wire. A first chip U1 is connected to the twenty-second resistor R22 through a wire. Both the twentieth resistor R20 and the twenty-third resistor R23 are connected to the first chip U1 through a wire. A twenty-first resistor R21 is connected to the first chip U1 through a wire. A twenty-fourth resistor R24 is connected to the twenty-first resistor R21 through a wire. The twenty-fourth resistor R24 and the first chip U1 are connected through a wire. A fourth triode Q4 is connected to both the twenty-first resistor R21 and the twenty-fourth resistor R24 through a wire. A twenty-fifth resistor R25 is connected to the fourth triode Q4 through a wire. The fourth triode Q4 and the first chip U1 are connected through a wire. The twenty-fifth resistor R25 and the first chip U1 are connected through a wire. The GPRS communication circuit 7 can upload data through the GPRS module.

[0037] Please refer to Figure 11 , the key activation circuit 8 includes an eleventh resistor R11. A first capacitor C1 is connected to the eleventh resistor R11 through a wire. A first switch S1 is connected in parallel to the outside of the first capacitor C1 through a wire. The key activation circuit 8 can wake up the device manually. Through an external key, the circuit can provide a trigger level to the single-chip microcomputer according to the key instruction to wake up the device.

[0038] The specific implementation process of the present invention is as follows: The peak holding circuit 3 first rectifies the signal with extremely small loss through an avalanche diode and at the same time divides the voltage to match a voltage range that can be read by the single-chip microcomputer 1, and then extends the holding time through the energy storage of the front and rear two-stage capacitors to ensure that the single-chip microcomputer 1 can collect the peak signal. The peak excitation circuit 4 first rectifies through an avalanche diode and then through an optocoupler element. When there is a surge, the level connected to the single-chip microcomputer 1 will change, thereby waking up the single-chip microcomputer 1. The key activation circuit 8 can control the high and low levels connected to the single-chip microcomputer 1 through the key to wake up the single-chip microcomputer 1. The digital tube display circuit 2 controls the digital tube to display the peak value and count through the SDL refresh driver chip. The GPRS communication circuit 7 uploads data through the UART to control the GPRS chip. The digital tube power supply circuit 5 and the GPRS power supply circuit 6 control the power supplies of the two sets of circuits through triodes. The single-chip microcomputer 1 will only supply power to them when display or communication is needed.

[0039] Although embodiments of the present utility model have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principle and spirit of the present utility model. The scope of the present utility model is defined by the appended claims and their equivalents.

Claims

1. A low-power lightning peak acquisition circuit, including a single-chip microcomputer (1), characterized in that: A digital tube display circuit (2) is connected to the single-chip microcomputer (1) through a wire, a peak holding circuit (3) is connected to the single-chip microcomputer (1) through a wire, a peak excitation circuit (4) is connected to the single-chip microcomputer (1) through a wire, a digital tube power supply circuit (5) is connected to the single-chip microcomputer (1) through a wire, the digital tube power supply circuit (5) and the digital tube display circuit (2) are connected through a wire, a GPRS power supply circuit (6) is connected to the single-chip microcomputer (1) through a wire, a GPRS communication circuit (7) is connected to the single-chip microcomputer (1) through a wire, the GPRS communication circuit (7) and the GPRS power supply circuit (6) are connected through a wire, and a key excitation circuit (8) is connected to the single-chip microcomputer (1) through a wire.

2. The low-power lightning peak acquisition circuit according to claim 1, wherein: The digital tube display circuit (2) includes a second chip (U2) and a third chip (U3). A first light-emitting diode (LED1) is connected to the second chip (U2) through a wire. A third resistor (R3) is connected to the first light-emitting diode (LED1) through a wire. A fourth resistor (R4) is connected to the first light-emitting diode (LED1) through a wire. A sixth resistor (R6) is connected to the first light-emitting diode (LED1) through a wire. An eighth resistor (R8) is connected to the first light-emitting diode (LED1) through a wire. A ninth resistor (R9) is connected to the first light-emitting diode (LED1) through a wire. A fifth resistor (R5) is connected to the first light-emitting diode (LED1) through a wire. A seventh resistor (R7) is connected to the first light-emitting diode (LED1) through a wire. A tenth resistor (R10) is connected to the first light-emitting diode (LED1) through a wire. The fifth resistor (R5) and the second chip (U2) are connected through a wire. The seventh resistor (R7) and the second chip (U2) are connected through a wire. The tenth resistor (R10) and the second chip (U2) are connected through a wire. A second light-emitting diode (LED2) is connected to the third chip (U3) through a wire. A twelfth resistor (R12) is connected to the second light-emitting diode (LED2) through a wire. A thirteenth resistor (R13) is connected to the second light-emitting diode (LED2) through a wire. A fourteenth resistor (R14) is connected to the second light-emitting diode (LED2) through a wire. A fifteenth resistor (R15) is connected to the second light-emitting diode (LED2) through a wire. A sixteenth resistor (R16) is connected to the second light-emitting diode (LED2) through a wire. A seventeenth resistor (R17) is connected to the second light-emitting diode (LED2) through a wire. An eighteenth resistor (R18) is connected to the second light-emitting diode (LED2) through a wire. A nineteenth resistor (R19) is connected to the second light-emitting diode (LED2) through a wire. The fourteenth resistor (R14) and the third chip (U3) are connected through a wire. The sixteenth resistor (R16) and the third chip (U3) are connected through a wire. The nineteenth resistor (R19) and the third chip (U3) are connected through a wire.

3. A low-power lightning peak acquisition circuit according to claim 1, characterized in that: The peak-holding circuit (3) includes a twenty-sixth resistor (R26). A first diode (D1) is connected to the twenty-sixth resistor (R26) through a wire. A second diode (D2) is connected to the twenty-sixth resistor (R26) through a wire. A third diode (D3) is connected to the second diode (D2) through a wire. A fifth diode (D5) is connected to the third diode (D3) through a wire. A thirtieth resistor (R30) is connected to both the third diode (D3) and the fifth diode (D5) through a wire. The first diode (D1) and the fifth diode (D5) are connected through a wire. A twenty-eighth resistor (R28) is connected to both the first diode (D1) and the fifth diode (D5) through a wire. The twenty-eighth resistor (R28) is connected to the second diode (D2) and the third diode (D3) through a wire. A third capacitor (C3) is connected in parallel to the outside of the twenty-eighth resistor (R28) through a wire. A fourth capacitor (C4) is connected in parallel to the outside of the twenty-eighth resistor (R28) through a wire. A twenty-ninth resistor (R29) is connected in parallel to the outside of the fourth capacitor (C4) through a wire. A twenty-seventh resistor (R27) is connected between the fourth capacitor (C4) and the twenty-ninth resistor (R29) through a wire. A fifth capacitor (C5) is connected in parallel to the outside of the twenty-ninth resistor (R29) through a wire. A fourth diode (D4) is connected in parallel to the outside of the twenty-ninth resistor (R29) through a wire.

4. A low-power lightning peak acquisition circuit according to claim 1, characterized in that: The peak excitation circuit (4) includes a thirty-second resistor (R32). A sixth diode (D6) is connected to the thirty-second resistor (R32) through a wire. A seventh diode (D7) is connected to the thirty-second resistor (R32) through a wire. An eighth diode (D8) is connected to the seventh diode (D7) through a wire. An eleventh diode (D11) is connected to the eighth diode (D8) through a wire. A thirty-fifth resistor (R35) is connected to the eighth diode (D8) and the eleventh diode (D11) through a wire. A ninth diode (D9) is connected to the eighth diode (D8) and the eleventh diode (D11) through a wire. The ninth diode (D9), the sixth diode (D6), and the seventh diode (D7) are connected through a wire. A ninth capacitor (C9) is connected in parallel to the outside of the ninth diode (D9) through a wire. A thirty-fourth resistor (R34) is connected to the ninth capacitor (C9) through a wire. A tenth diode (D10) is connected to the thirty-fourth resistor (R34) through a wire. A thirty-sixth resistor (R36) is connected to the ninth capacitor (C9) through a wire. The tenth diode (D10) and the thirty-sixth resistor (R36) are connected through a wire. A fourth chip (U4) is connected in parallel to the outside of the tenth diode (D10) through a wire. A thirty-third resistor (R33) is connected to the fourth chip (U4) through a wire. A tenth capacitor (C10) is connected to the fourth chip (U4) through a wire. The tenth capacitor (C10) and the thirty-third resistor (R33) are connected through a wire.

5. A low-power lightning peak acquisition circuit according to claim 1, characterized in that: The digital tube power supply circuit (5) includes a first resistor (R1). A first triode (Q1) is connected to the first resistor (R1) through a wire. A second chip (U2) is connected to the first resistor (R1) and the first triode (Q1) through a wire.

6. The low-power lightning peak acquisition circuit according to claim 1, wherein: The GPRS power supply circuit (6) includes a second resistor (R2). A second triode (Q2) is connected to the second resistor (R2) through a wire. A first chip (U1) is connected to the second resistor (R2) and the second triode (Q2) through a wire.

7. A low-power lightning peak acquisition circuit according to claim 1, characterized in that: The GPRS communication circuit (7) includes a twenty-second resistor (R22). A twenty-third triode (Q3) is connected to the twenty-second resistor (R22) through a wire. A twenty-third resistor (R23) is connected to the twenty-third triode (Q3) through a wire. A twentieth resistor (R20) is connected to the twenty-third triode (Q3) through a wire. A second capacitor (C2) is connected to the twentieth resistor (R20) through a wire. The second capacitor (C2) and the twenty-third resistor (R23) are connected through a wire. Both the second capacitor (C2) and the twenty-third resistor (R23) are connected to the twenty-third triode (Q3) through a wire. A first chip (U1) is connected to the twenty-second resistor (R22) through a wire. Both the twentieth resistor (R20) and the twenty-third resistor (R23) are connected to the first chip (U1) through a wire. A twenty-first resistor (R21) is connected to the first chip (U1) through a wire. A twenty-fourth resistor (R24) is connected to the twenty-first resistor (R21) through a wire. The twenty-fourth resistor (R24) and the first chip (U1) are connected through a wire. A twenty-fifth resistor (R25) is commonly connected to the twenty-first resistor (R21) and the twenty-fourth resistor (R24) through a wire. A twenty-fourth triode (Q4) is connected to the twenty-fifth resistor (R25) through a wire. The twenty-fourth triode (Q4) and the first chip (U1) are connected through a wire. The twenty-fifth resistor (R25) and the first chip (U1) are connected through a wire.

8. A low-power lightning peak acquisition circuit according to claim 1, characterized in that: The key activation circuit (8) includes an eleventh resistor (R11). A first capacitor (C1) is connected to the eleventh resistor (R11) through a wire. A first switch (S1) is connected in parallel to the outside of the first capacitor (C1) through a wire.

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