Printed circuit board (PCB) structure with plane layer mixed by fake eight layers, circuit board and electronic device

Abstract

The utility model discloses a printed circuit board (PCB) structure, a circuit board and an electronic device with a false eight-layer mixed use plane layer, and relates to the technical field of printed circuit boards, the false eight-layer mixed use plane layer structure comprises six layers from top to bottom, and comprises a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer and a bottom layer; a first dielectric layer is arranged between the top layer and the first ground layer, a second dielectric layer is arranged between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are sequentially arranged between the first wiring layer and the second wiring layer, a fifth dielectric layer is arranged between the second wiring layer and the second ground layer, and a sixth dielectric layer is arranged between the second ground layer and the bottom layer; wherein the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer and the bottom layer are provided with signal lines. According to the scheme, the manufacturing difficulty and the manufacturing cost are reduced. And meanwhile, each layer is used for wiring, so that the utilization rate of the board layer is further improved.

Description

Technical Field

[0001] The utility model relates to the technical field of printed circuit boards, and particularly relates to a PCB structure, a circuit board and an electronic device with a false 8-layer structure that mixes plane layers. Background Technique

[0002] With the popularization of electronic products, the designs of products such as switches, servers, and intelligent terminals are becoming increasingly complex, posing higher requirements for circuit boards. To achieve the multi-functionality and high performance of products, the chips, components, and their interconnections on the circuit board have become more and more complex and dense, requiring the circuit board to provide more wiring layers to carry complex circuit connections. At the same time, high-speed digital signals, high-frequency analog signals, and high-power power voltages also pose higher requirements for the shielding and isolation of the circuit board, and the circuit board needs to have better interlayer shielding effects to reduce noise and crosstalk. Therefore, the circuit board designs of these products tend to adopt more laminations to meet the wiring requirements as well as the shielding and isolation requirements.

[0003] To achieve the above purpose, a common circuit board lamination design is an 8-layer PCB structure. The typical lamination sequence of an 8-layer PCB from top to bottom is: top layer, first ground layer, first signal layer, second ground layer, power layer, second signal layer, third ground layer, and bottom layer. In this structure, the ground layers play a shielding role, which can effectively reduce the crosstalk between signals of each layer and ensure the integrity and quality of the signals; the power layer is used for power supply and also plays a certain shielding role. This lamination structure uses multiple ground layers to comprehensively shield the signals, which can ensure the transmission quality of sensitive signals.

[0004] However, with the improvement of integration, the number of ground layers and power layers in an 8-layer PCB may exceed the actual needs of the product. Excessive ground layers and power layers not only increase the manufacturing difficulty of the PCB but also directly increase the material cost. In addition, the power layer and the ground layer itself also occupy the board layer resources available for wiring. To further reduce costs, a new PCB lamination technical solution is needed to appropriately reduce the number of ground layers and power layers in the PCB while ensuring signal integrity, so as to reduce the manufacturing difficulty and cost. Summary of the Utility Model

[0005] The main purpose of the utility model is to propose a PCB structure, a circuit board and an electronic device with a false 8-layer structure that mixes plane layers, aiming to solve the technical problem of how to reduce the manufacturing difficulty and cost of the PCB.

[0006] To achieve the above purpose, a PCB structure with a false 8-layer structure that mixes plane layers proposed by the utility model has a total of six layers from top to bottom, including: top layer, first ground layer, first wiring layer, second wiring layer, second ground layer, and bottom layer;

[0007] A first dielectric layer is provided between the top layer and the first ground layer, a second dielectric layer is provided between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are sequentially provided between the first wiring layer and the second wiring layer, a fifth dielectric layer is provided between the second wiring layer and the second ground layer, and a sixth dielectric layer is provided between the second ground layer and the bottom layer;

[0008] Signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer.

[0009] In one embodiment, both the first dielectric layer and the sixth dielectric layer are prepregs;

[0010] The second dielectric layer, the third dielectric layer, the fourth dielectric layer, and the fifth dielectric layer are prepregs or core boards.

[0011] In one embodiment, the signal lines include: high-speed signal lines, low-speed signal lines, ground lines, and power lines;

[0012] Electronic devices are also provided on the top layer and the bottom layer;

[0013] The spacing between the signal lines in the same layer is a preset safety spacing.

[0014] In one embodiment, when the layer spacing between two adjacent layers among the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer is less than 10 mil, the signal lines provided on the surfaces of the adjacent two layers are all parallelly distributed.

[0015] In one embodiment, the high-speed signal lines are all provided with corresponding local reference ground planes;

[0016] The local reference ground plane and the corresponding high-speed signal line are in the same wiring layer.

[0017] In one embodiment, filter capacitors are provided on the power lines;

[0018] The filter capacitors are used to filter out the power noise in the power voltage output through the power lines.

[0019] In one embodiment, the number of the filter capacitors is multiple, and the capacitance values of the filter capacitors are different. One end of each filter capacitor is connected to the positive pole of the corresponding power line, and the other end of the filter capacitor is connected to the ground line.

[0020] In addition, to achieve the above object, the present utility model also provides a circuit board, and the circuit board includes the PCB structure of the above-mentioned pseudo 8-layer hybrid use plane layer.

[0021] In addition, to achieve the above object, the present utility model further provides an electronic device, which includes one or more of the above-mentioned circuit boards.

[0022] The technical solution of the present utility model adopts a PCB structure with a false 8-layer mixed use of plane layers. The false 8-layer structure has a total of six layers from top to bottom, including: a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer, and a bottom layer; a first dielectric layer is provided between the top layer and the first ground layer, a second dielectric layer is provided between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are successively provided between the first wiring layer and the second wiring layer, a fifth dielectric layer is provided between the second wiring layer and the second ground layer, and a sixth dielectric layer is provided between the second ground layer and the bottom layer; signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer. Compared with the traditional 8-layer PCB, two layers are reduced. This solution simplifies the stack structure of the PCB, reduces the manufacturing difficulty and cost of the PCB. This is because the reduction of the number of layers directly reduces the amount of materials used in PCB manufacturing, and simplifies the complexity of PCB manufacturing processes such as lamination, drilling, and copper plating, reducing the manufacturing difficulty and cost. At the same time, each layer is used for wiring, further improving the utilization rate of the board layer. It solves the technical problem of how to reduce the manufacturing difficulty and cost of the PCB. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on the structures shown in these drawings.

[0024] Figure 1 It is a schematic structural diagram of Embodiment 1 provided by the present utility model;

[0025] Figure 2 It is a schematic structural diagram of the mixed practical plane layer of Embodiment 2 provided by the present utility model;

[0026] Figure 3 It is a schematic structural diagram of Embodiment 3 provided by the present utility model;

[0027] Figure 4 It is another schematic structural diagram of Embodiment 3 provided by the present utility model.

[0028] The realization of the object, functional features, and advantages of the present utility model will be further described in conjunction with the embodiments and with reference to the drawings. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0030] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of the present invention, the directional indications are only used to explain the relative positional relationship and movement conditions between components in a specific posture. If the specific posture changes, the directional indications will also change accordingly.

[0031] In addition, if there are descriptions such as "first", "second", etc. involved in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, if "and / or" or "and / or" appears throughout the text, its meaning includes three parallel solutions. Taking "A and / or B" as an example, it includes solution A, solution B, or a solution that satisfies both A and B at the same time. In addition, the technical solutions between the embodiments can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0032] The present invention provides a PCB structure with a false 8-layer mixed-use plane layer.

[0033] Please refer to Figure 1 , in an embodiment of the present invention, the false 8-layer structure with a mixed-use plane layer has a total of six layers from top to bottom, including: a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer, and a bottom layer;

[0034] A first dielectric layer is provided between the top layer and the first ground layer, a second dielectric layer is provided between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are sequentially provided between the first wiring layer and the second wiring layer, a fifth dielectric layer is provided between the second wiring layer and the second ground layer, and a sixth dielectric layer is provided between the second ground layer and the bottom layer;

[0035] Signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer.

[0036] Among them, the pseudo-8-layer structure uses a planar layer circuit board in a mixed manner. Herein, "pseudo-8-layer" means that the circuit board adopts the design concept of an 8-layer PCB, but simplifies the stack structure to 6 layers by deleting non-critical layers to reduce the manufacturing difficulty and cost; "using planar layers in a mixed manner" means that different types of signal lines are arranged on the planar layers in a mixed way to improve the utilization rate of the layers.

[0037] There are six layers from top to bottom, including: a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer, and a bottom layer. Among them, the top layer and the bottom layer are used to install and lead out electronic components; the first ground layer and the second ground layer are used for ground reference and can also be used for signal wiring according to needs; the first wiring layer and the second wiring layer are used for high-density signal wiring.

[0038] Each of the dielectric layers is used to isolate the layers to prevent signal crosstalk.

[0039] Signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer. Among them, the signal lines are used to transmit various signals, and the signal lines on different layers can be arranged in a mixed way within the safe spacing range according to needs.

[0040] The technical solution of the present utility model adopts a PCB structure with a pseudo-8-layer using planar layers in a mixed manner. The pseudo-8-layer structure using planar layers in a mixed manner has six layers from top to bottom, including: a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer, and a bottom layer; a first dielectric layer is provided between the top layer and the first ground layer, a second dielectric layer is provided between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are successively provided between the first wiring layer and the second wiring layer, a fifth dielectric layer is provided between the second wiring layer and the second ground layer, and a sixth dielectric layer is provided between the second ground layer and the bottom layer; among them, signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer. Compared with the traditional 8-layer PCB, the number of layers is reduced by 2. This solution simplifies the stack structure of the PCB, reduces the manufacturing difficulty and cost of the PCB. This is because the reduction in the number of layers directly reduces the amount of materials used in PCB manufacturing and simplifies the complexity of PCB manufacturing processes such as lamination, drilling, and copper plating, reducing the manufacturing difficulty and cost. At the same time, each layer is used for wiring, further improving the utilization rate of the board layer. It solves the technical problem of how to reduce the manufacturing difficulty and cost of the PCB.

[0041] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar content as that in the above-mentioned first embodiment can be referred to the above introduction and will not be elaborated hereinafter. For the wiring scheme, this embodiment gives a more specific implementation method. Refer to Figure 2 ;

[0042] Optionally, both the first dielectric layer and the sixth dielectric layer are prepregs; the second dielectric layer, the third dielectric layer, the fourth dielectric layer, and the fifth dielectric layer are prepregs or core boards.

[0043] Among them, the prepreg, also known as the "PP sheet", is one of the main materials in the production of multilayer boards. It is mainly composed of resin and reinforcing materials. The reinforcing materials are further divided into several types such as fiberglass cloth, paper base, and composite materials. Most of the prepregs (bonding sheets) used in the production of multilayer printed boards are made of fiberglass cloth as the reinforcing material.

[0044] The core board, also known as the core core board, has copper foils on both surfaces, which are used as conductive layers. A solid material is filled between the two surface layers, and it is composed of reinforcing material glass fiber impregnated with solid resin. It can be understood as a PP sheet with copper on both the upper and lower surfaces.

[0045] The use of PP for the outermost layer is mainly to optimize signal integrity and reduce signal loss, while the use of core core board for the intermediate layer is to improve the stability and conductivity of the circuit board. The application of these two materials together ensures the performance and reliability of the PCB.

[0046] Optionally, when the wiring space is tight, all six layers in this solution can be used for arranging signal lines, where the signal lines include: high-speed signal lines, low-speed signal lines, ground lines, and power lines;

[0047] The top layer and the bottom layer are also provided with electronic devices;

[0048] Among them, the high-speed signal line represents a transmission line for high-speed digital signals or high-frequency analog signals with high transmission rate and high frequency; the low-speed signal line represents a transmission line for low-speed digital signals or low-frequency analog signals with low transmission rate and low frequency; the ground line is used to transmit the reference ground; the power line is used to transmit various power supply voltages.

[0049] The top layer and the bottom layer are also provided with electronic devices;

[0050] Among them, the electronic devices include various active and passive electronic components, such as resistors, capacitors, inductors, transistors, integrated circuit chips, etc., which are arranged on the top layer and the bottom layer to achieve circuit functions.

[0051] The spacing between the signal lines in the same layer is a preset safety spacing. Specifically, for some high-speed and high-frequency signals, the 3W rule is set. The 3W rule: that is, 3 times the line width. The PCB space is efficiently utilized, and the safety spacing for ordinary signals is greater than 4MIL.

[0052] In addition, when the wiring space is not tight, a conventional wiring mode can also be adopted. For the structure of this solution, there are:

[0053] According to the wiring direction and signal distribution, key signals are pre-allocated to the optimal layer. The optimal wiring layer is the first wiring layer, followed by the second wiring layer. Finally, the top layer and the bottom layer are considered for wiring. If the board frame is small and the device density on the top layer and the bottom layer is high, wiring on the surface layer is not possible. Since the first wiring layer has a complete ground plane reference of the first ground layer, the signal loop of the first wiring layer is the best. If high-speed signals are routed on the second wiring layer, a local reference plane should be used to provide a complete loop for the signals.

[0054] Among them, the preset safety distance represents the minimum distance reserved between signal lines according to the requirements of PCB design rules to prevent interference and crosstalk between signals. The distance between signal lines in the same layer shall not be less than the preset safety distance.

[0055] Optionally, when wiring is tight, all layers are used for wiring. At this time, all high-speed signal lines are provided with corresponding local reference ground planes, and the local reference ground planes and the corresponding high-speed signal lines are in the same wiring layer.

[0056] Among them, the same wiring layer is the coplanar reference impedance layer, that is, the high-speed signal line and the local reference ground plane are on the same reference impedance plane layer, and this layer is provided by the plane layer where the corresponding signal line is arranged. The corresponding local reference refers to the adjacent layer area. All high-speed signal lines are provided with corresponding local reference ground planes. Among them, the local reference ground plane refers to a small-area grounding copper layer set near the high-speed signal line, which is used to provide a grounding reference for the high-speed signal line. Due to the characteristics of high signal frequency and steep edge change of high-speed signal lines, these high-speed signals are extremely prone to anisotropic radiation, generating electromagnetic interference to the surrounding environment, and are also easily affected by external noise, which will reduce the integrity and quality of high-speed signals. To improve the anti-interference ability of high-speed signal lines, a grounding reference, that is, a local reference ground plane, needs to be set near them. The local reference ground plane can absorb and shield the electromagnetic radiation generated by high-speed signal lines, preventing the interference of signal emission to the surrounding environment; at the same time, it can also form an electromagnetic barrier to avoid the influence of external noise on high-speed signal lines, thereby improving the integrity of high-speed signals.

[0057] The local reference ground plane and the corresponding high-speed signal line are arranged on the same wiring layer. Among them, the local reference ground plane is arranged on the same layer as the high-speed signal line, so that it can provide a grounding reference at the position closest to the high-speed signal line, thereby maximizing the improvement of the grounding reference effect corresponding to the high-speed signal line. This is because the closer the reference ground plane is to the signal line, the greater the shielding and anti-interference effects on the signal line. The local reference ground plane arranged on the same layer can provide a locally tight grounding reference due to the extremely small isolation distance from the high-speed signal line, forming a tight electromagnetic barrier, effectively suppressing and absorbing high-speed signal noise interference, and improving the integrity and quality of the signal. Compared with the ground plane arranged on different layers, the local reference ground plane arranged on the same layer can more effectively improve the shielding effect of the high-speed signal line.

[0058] Therefore, by setting the local reference ground plane on the same layer, it is possible to specifically provide a locally tight grounding reference for the high-speed signal line, form a local electromagnetic barrier, effectively improve the anti-interference ability of the high-speed signal line to the external environment, and also improve the isolation effect of the environment on the high-speed signal line, thereby ensuring the transmission quality and integrity of the high-speed signal. Realize the reliable transmission of high-speed signals.

[0059] Optionally, when the layer spacing between two adjacent layers among the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer is less than 10 mil, the signal lines arranged on the surfaces of the two adjacent layers are all parallelly distributed.

[0060] Among them, when the distance between two adjacent electrical layers of a PCB is less than 10 mil, it belongs to a more compact interlayer setting structure. In this structure, due to the relatively close interlayer distance, the crosstalk effect between electrical layers will become more obvious. If the signal lines on different layers are arranged in a vertically intersecting manner, then it is easy to generate capacitive coupling between the signal lines on different layers, causing signal interference with each other. This is because the signal line, as a conductor, will generate an electromagnetic field during operation. When the signal lines on different layers are vertically intersecting, due to the non-fixed distance between the lines, the coupling capacitance between the two lines will continuously change with the change of the distance between the lines, resulting in signal interaction and serious crosstalk problems, reducing the signal quality.

[0061] This solution further proposes a more specific adjacent wiring specification: when the top-bottom microstrip line and the inner-layer stripline are parallelly routed out, according to the set dielectric thickness between the layers. The safety distance between the ordinary low-speed signal line and the line is greater than 5 MIL. If the first ground layer wiring is to be parallelly routed out with the top-layer microstrip line, overlapping wiring should be avoided. Avoid crosstalk between signals.

[0062] Parallel routing out means routing in parallel along the same direction on the top layer, the first ground layer, or the first wiring layer, that is, multi-layer routing in the X direction or multi-layer routing in the Y direction.

[0063] To effectively reduce the coupling effect between signal lines of different layers, the signal lines of adjacent layers can be arranged in a parallel distribution. When the signal lines are arranged in parallel, since the distance between the two lines is fixed, the coupling capacitance between the signal lines of different layers will also remain fixed, and there will be no change in the coupling effect caused by the change in the distance between the lines. This can greatly reduce the capacitive coupling effect between the signal lines of different layers. Therefore, by adopting the parallel wiring method, the change in the signal coupling capacitance between different layers can be reduced, the safety distance between the signal lines of different layers can be ensured, the inter-layer crosstalk can be effectively reduced, and the signal integrity can be improved.

[0064] In contrast, when the inter-layer distance is large, a vertical cross signal wiring method can be adopted. Since the distance between the signal lines of different layers is far, the coupling effect is very small and will not have too much impact on the signal quality. However, for the case of a small inter-layer distance, the parallel wiring method should be adopted to reduce crosstalk. This solution optimizes the signal wiring and reduces the inter-layer crosstalk in the tightly stacked PCB through parallel wiring.

[0065] In summary, in the embodiments of the present application, due to the adoption of a series of technical means such as mixing plane layers and setting local reference ground planes, the wiring utilization rate is improved, the interference of high-speed signals is effectively controlled, the influence of high-density and high-speed mixed signal wiring on signal quality is solved, and thus a PCB design with high resource utilization rate and excellent performance is achieved.

[0066] Specifically, the embodiments of the present application propose to mix and arrange high-speed signal lines, low-speed signal lines, ground lines, and power lines on each layer, and at the same time arrange electronic devices on the top layer and the bottom layer. This way of mixing the use of plane resources breaks the limitation of the traditional dedicated wiring layer, realizes the mixed arrangement of signals with different rates, and greatly improves the utilization efficiency of the board layer. Compared with only using dedicated layers for wiring, this mixed use method can achieve more complex and intensive signal interaction with the same number of layers, fully exploits the potential of plane resources, and realizes the improvement of the cost performance and comprehensive wiring performance of the PCB.

[0067] In addition, for the problem of inter-layer crosstalk that occurs when high-density PCBs are stacked, the embodiments of the present application adopt the technical means of arranging the signal lines in parallel when the distance between adjacent layers is small. This wiring method ensures that the interval distance between the signal lines of adjacent layers does not change frequently, avoids drastic changes in the coupling capacitance, effectively reduces the inter-layer crosstalk in high-density stacked PCBs, and improves the signal transmission quality and integrity in complex routing environments. This arrangement optimizes the inter-layer isolation of high-density PCBs and is a simple and effective design for reducing crosstalk.

[0068] Finally, the embodiment of the present application also provides a partial reference ground plane, which is located on the same layer as the corresponding high-speed signal line, specifically establishing a partial ground plane coverage for high-speed signals that are prone to severe radiation, forming a tight electromagnetic barrier. This measure effectively controls the coupling interference of high-speed signals and ensures the transmission quality of high-speed signals in a complex mixed wiring environment.

[0069] In summary, through design means such as the mixed use of plane resources, optimization of parallel layout, and setting of partial reference ground planes, the embodiment of the present application solves the impact of high-density and high-speed signal mixed wiring on the performance of the PCB, realizing a PCB design scheme with high resource utilization rate and excellent stable performance. Its consideration of signal integrity and anti-interference takes into account economy and practicality, and it is an optimized PCB design idea.

[0070] Based on the first embodiment and / or the second embodiment of the present application, in the third embodiment of the present application, the same or similar content as in the above-mentioned first embodiment and second embodiment can be referred to the above introduction and will not be repeated hereinafter. Refer to Figure 3 and Figure 4 ,

[0071] Optionally, a filter capacitor is provided on the power line, and the filter capacitor is used to filter out the power noise in the power voltage output through the power line.

[0072] Due to the possible thickness of the intermediate substrate exceeding 1 mm and the mixed use of plane layers in the laminated structure of this solution, power noise problems will occur. To solve the power noise, filter capacitors need to be placed in the power path to reduce power noise and improve the reliability of power signals.

[0073] Refer to Figure 3 , in this solution, through one or more filter capacitors, the power line and the ground line are connected in parallel. The parallel filter capacitors transfer and consume the high-frequency noise of the power line to the ground line, preventing the noise from entering the circuit and affecting the signal, and ensuring the cleanliness and stability of the power supply circuit. The purified power is beneficial to improving the signal-to-noise ratio of the circuit, making the circuit less susceptible to noise interference and more capable of stably outputting the expected signal.

[0074] Optionally, further, the number of filter capacitors is multiple, and the capacitance values of the filter capacitors are different. One end of each filter capacitor is connected to the positive pole of the corresponding power line, and the other end of the filter capacitor is connected to the ground line.

[0075] Refer to Figure 4 , in this solution, in order to achieve a better filtering effect, two or more power lines are connected in parallel through multiple filter capacitors, and then each power line is connected to the ground line through a filter capacitor respectively.

[0076] This method constructs a multi-stage filtering circuit of capacitors through capacitors with multiple different capacitance values, realizes the filtering of noises with different frequencies, further improves the noise filtering effect, can give full play to the role of limited GND and capacitor resources, significantly improves the power quality, and enhances the anti-interference ability of the circuit. It rationally and efficiently utilizes the principle of multi-capacitor low-pass filtering to meet the PCB design requirements with tight GND resources and further improves the stability of the power supply.

[0077] The embodiment of the present application further provides a circuit board, and the circuit board is a PCB structure with a false 8-layer mixed use of plane layers.

[0078] The embodiment of the present application further provides an electronic device, and one or more of the above circuit boards are provided in the electronic device.

[0079] The above are only exemplary embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structural transformation made under the technical concept of the present invention by using the content of the specification and drawings of the present invention, or direct / indirect application in other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. A PCB structure with a false 8-layer mixed-use plane layer, characterized in that, The so-called pseudo-8-layer structure is a hybrid use of planar layer structures, with a total of six layers from top to bottom, including: a top layer, a first ground layer, a first wiring layer, a second wiring layer, a second ground layer, and a bottom layer; A first dielectric layer is provided between the top layer and the first ground layer, a second dielectric layer is provided between the first ground layer and the first wiring layer, a third dielectric layer and a fourth dielectric layer are successively provided between the first wiring layer and the second wiring layer, a fifth dielectric layer is provided between the second wiring layer and the second ground layer, and a sixth dielectric layer is provided between the second ground layer and the bottom layer; Signal lines are provided on the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer.

2. The PCB structure with a pseudo-8-layer mixed-use plane layer as described in claim 1, wherein Both the first dielectric layer and the sixth dielectric layer are prepregs; The second dielectric layer, the third dielectric layer, the fourth dielectric layer, and the fifth dielectric layer are prepregs or core boards.

3. The PCB structure with a false 8-layer mixed-use planar layer as described in claim 1, characterized in that, The signal lines include: high-speed signal lines, low-speed signal lines, ground lines, and power lines; Electronic devices are also provided on the top layer and the bottom layer; The spacing between each of the signal lines in the same layer is a preset safety spacing.

4. The PCB structure with a pseudo-8-layer hybrid use of planar layers according to claim 3, wherein When the layer spacing between two adjacent layers among the top layer, the first ground layer, the first wiring layer, the second wiring layer, the second ground layer, and the bottom layer is less than 10 mils, the signal lines provided on the surfaces of the two adjacent layers are all parallelly distributed.

5. The PCB structure with a pseudo 8-layer mixed-use plane layer as described in claim 3, characterized in that, Each of the high-speed signal lines is provided with a corresponding local reference ground plane; The local reference ground plane and the corresponding high-speed signal line are in the same wiring layer.

6. The PCB structure with a false 8-layer mixed-use plane layer as described in claim 3, characterized in that, Filter capacitors are provided on the power lines; The filter capacitors are used to filter out the power noise in the power voltage output through the power lines.

7. The PCB structure with a false 8-layer mixed-use plane layer as described in claim 6, characterized in that, The number of the filter capacitors is multiple, and the capacitance values of each of the filter capacitors are different. One end of each of the filter capacitors is connected to the positive electrode of the corresponding power line, and the other end of the filter capacitor is connected to the ground line.

8. A circuit board, characterized in that, The circuit board includes the PCB structure with a pseudo-8-layer hybrid use of planar layers according to any one of claims 1-7.

9. An electronic device, characterized in that, The electronic device includes one or more circuit boards according to claim 8.

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