Intelligent calculation switch
Through the design of intelligent computing switches, video compression and switching technology are integrated, network and storage pressure problems caused by the large amount of data of audio and video terminals are solved, efficient compression and optimized forwarding of streaming data are achieved, and bandwidth and storage resources are saved.
Patent Information
- Application Number
- CN202422580770.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-08-15
- Estimated Expiration
- 2034-10-25
AI Technical Summary
In the prior art, a large number of iterative applications of audio and video terminals have led to a large amount of data acquisition, circulation and exchange of video data, causing a blowout growth in network bandwidth and storage capacity, forming huge capacity and economic pressure.
A smart computing switch is designed, integrating video compression module and switching module, and the compression processing of video streams is realized through compression circuits and switching circuits, and a PSE module and power module are integrated to provide safe access and power support for terminals.
It realizes efficient compression of streaming data, reduces network transmission bandwidth rate pressure, optimizes storage space, ensures high-quality forwarding of video and storage streams, and reduces network bandwidth and storage space occupancy, saving bandwidth and commercial resources.
Smart Images

Figure CN223231203U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of switches, and in particular to an intelligent computing switch. Background Art
[0002] In the new data era, a large number of iterative applications of audio and video terminals, IPCam and AI generate huge data streams. The amount of video data collection, circulation and exchange is large, and video streams and storage streams have a great impact on network bandwidth and back-end storage capacity. The stream codec mainly adopts H264\H265, and the single video stream 1080P@25fps reaches 5-6Mbps, and the lossless stream reaches 4K / 600Mbps or more. Once a large number of video and storage streams are concurrent, the network bandwidth and storage capacity will increase dramatically, and it is necessary to continuously expand the hardware to cope with it, which will continuously cause capacity pressure, economic pressure and operation and maintenance pressure on the network and storage. Utility Model Content
[0003] To this end, one purpose of the present invention is to propose an intelligent computing switch to solve the problems mentioned in the background technology and overcome the shortcomings of the existing technology.
[0004] In order to achieve the above purpose, the utility model adopts the following technical solutions:
[0005] An intelligent computing switch includes a video compression module and a switching module, wherein the video compression module is connected to the switching module, the switching module is connected to a PSE module, and the video compression module, the switching module and the PSE module are connected to a power module.
[0006] Furthermore, the switching module is implemented through a switching circuit, which includes a first chip, a second chip, a third chip and a fourth chip. The first chip is a single-chip microcomputer chip, the second chip, the third chip and the fourth chip are PHY chips, the first chip is connected to the second chip, the third chip and the fourth chip, the second chip is connected to the video compression module, the third chip is connected to a network transformer, the network transformer is connected to a first connector, and the third chip is connected to a second connector.
[0007] Furthermore, the video compression module is implemented by a compression circuit, which includes a fifth chip and a sixth chip. The model of the fifth chip is RK3588, and the sixth chip is a PHY chip. The fifth chip is connected to the sixth chip, and the sixth chip is connected to the switching module.
[0008] Furthermore, the power supply module is implemented through a power supply circuit, which includes an AC power supply circuit and a DC / DC power supply circuit. The AC power supply circuit is connected to the DC / DC power supply circuit. The AC power supply circuit converts the input AC power into two DC voltages of 54V and 12V respectively, of which one 54V voltage is used to power the PSE module, and the other 12V voltage is stepped down by the DC / DC power supply circuit to output multiple DC low-voltage powers to power the video compression module and the switching module.
[0009] Furthermore, the PSE module includes a seventh chip, the model of the seventh chip is IP808AR, the seventh chip is connected to the network transformer and the switching module, and the seventh chip provides multiple power supply channels.
[0010] Furthermore, the video compression module is separately integrated into a compression board, the switching module, the PSE module and the power supply module are integrated into a switch mainboard, and the compression board and the switch mainboard are interconnected via an Ethernet interface.
[0011] Furthermore, the switch further includes a reset module and a clock module. The reset module is implemented by a reset circuit, and the clock module is implemented by a clock circuit. Both the reset module and the clock module are connected to the switching module.
[0012] Furthermore, the switch further includes a storage module, which is implemented by a storage circuit. The storage circuit includes a DDR memory circuit and a FLASH storage circuit. The storage module is connected to the switching module.
[0013] Furthermore, the switch also includes a shell, which is in the shape of a rectangular box. The compression board and the switch mainboard are both arranged in the shell. The first side of the shell is provided with a first connector port and a second connector port, and the second side opposite to the first side is provided with a three-phase power socket.
[0014] Furthermore, ears are provided on both sides of the shell, the ears are L-shaped, the ears are connected to the shell by screws, the two ears are arranged opposite to each other, and a plurality of ventilation holes are provided on the shell.
[0015] Therefore, the utility model has the following beneficial effects:
[0016] The utility model is an intelligent computing switch that integrates switching technology and video compression function into a communication switching device. Compression processing is realized from the formation of video streams and access to the network, which can realize stream data compression and terminal security access, fundamentally solving industry pain points, reducing the pressure on the bandwidth rate of network transmission stream data, and optimizing the compression effect of the back-end storage space, ensuring high-quality forwarding of video and storage streams while effectively reducing network bandwidth occupancy and storage space, saving release rate space for network forwarding of stream data, saving bandwidth and commercial resources, and saving storage hardware for the storage end.
[0017] The switch of this utility model not only ensures the forwarding of the flow but also ensures the reasonable continuity of network storage resources on the basis of optimizing bandwidth resources and storage hardware resources, and is particularly effective in cross-network audio and video applications. This utility model product is a multifunctional streaming video compression communication device with flexible application and obvious functional effects. It has good industry application prospects and advantages, helps to promote the business development of the audio and video industry, has the advantage of integrated streaming data exchange, and saves a lot of economic hard investment.
[0018] Additional aspects and advantages of the present invention will be given in part in the following description and in part will become apparent from the following description or learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0020] Figure 1 This is a structural diagram of the intelligent computing switch of the utility model;
[0021] Figure 2 This is a schematic diagram of a power supply circuit according to an embodiment of the present utility model;
[0022] Figure 3 This is a schematic diagram related to the first chip of the switching circuit of an embodiment of the present utility model;
[0023] Figure 4 This is a schematic diagram of a DDR memory circuit according to an embodiment of the present invention;
[0024] Figure 5 This is a schematic diagram of a reset circuit according to an embodiment of the present utility model;
[0025] Figure 6 This is a schematic diagram of a clock circuit according to an embodiment of the present utility model;
[0026] Figure 7 This is a schematic diagram of a FLASH storage circuit according to an embodiment of the present utility model;
[0027] Figure 8This is a schematic diagram of a serial port transceiver circuit according to an embodiment of the present utility model;
[0028] Figure 9 This is a schematic diagram related to the third chip in the embodiment of the present utility model;
[0029] Figure 10 This is a circuit diagram of the 1-8 ports of the network transformer according to the embodiment of the present utility model;
[0030] Figure 11 This is a circuit diagram of a 9-16 port network transformer according to an embodiment of the present utility model;
[0031] Figure 12 This is a schematic diagram related to the fourth chip in the embodiment of the present utility model;
[0032] Figure 13 This is a schematic diagram of the second connector according to an embodiment of the present utility model;
[0033] Figure 14 This is a schematic diagram related to the second chip of an embodiment of the present utility model;
[0034] Figure 15 This is a schematic diagram of the mainboard interface of the compression board of the embodiment of the utility model;
[0035] Figure 16 This is a schematic diagram of an LED driving circuit according to an embodiment of the present invention;
[0036] Figure 17 This is a panel light and PSE connector circuit of the embodiment of the utility model;
[0037] Figure 18 This is an axonometric view of the housing of the intelligent computing switch according to an embodiment of the present utility model;
[0038] Figure 19 This is a front view of the housing of the intelligent computing switch according to an embodiment of the present utility model;
[0039] Figure 20 This is a side view of the housing of the intelligent computing switch according to an embodiment of the present utility model;
[0040] Figure 21 This is a rear view of the housing of the intelligent computing switch according to an embodiment of the present utility model;
[0041] Figure 22 This is a schematic diagram of the first part of the compression circuit of the embodiment of the utility model;
[0042] Figure 23 This is a schematic diagram of the second part of the compression circuit of the embodiment of the utility model;
[0043] Figure 24 This is a schematic diagram of the third part of the compression circuit of the embodiment of the utility model;
[0044] Figure 25 This is a schematic diagram of the fourth part of the compression circuit of the embodiment of the utility model;
[0045] Figure 26 This is a schematic diagram of the fifth part of the compression circuit of the embodiment of the utility model;
[0046] Figure 27 This is a schematic diagram of the sixth part of the compression circuit of the embodiment of the utility model;
[0047] Figure 28 This is a schematic diagram of the seventh part of the compression circuit of the embodiment of the utility model;
[0048] Figure 29 This is a schematic diagram of the eighth part of the compression circuit of the embodiment of the utility model;
[0049] Figure 30 This is a schematic diagram of the ninth part of the compression circuit of the embodiment of the utility model;
[0050] Figure 31 This is a schematic diagram of the tenth part of the compression circuit of the embodiment of the utility model;
[0051] Figure 32 This is a schematic diagram of the eleventh part of the compression circuit of the embodiment of the utility model;
[0052] Figure 33 This is a schematic diagram of the twelfth part of the compression circuit of the embodiment of the utility model;
[0053] Figure 34 This is a schematic diagram of the thirteenth part of the compression circuit of the embodiment of the utility model;
[0054] Figure 35 This is a schematic diagram of the fourteenth part of the compression circuit of the embodiment of the utility model;
[0055] Figure 36 This is a schematic diagram of the fifteenth part of the compression circuit of the embodiment of the utility model;
[0056] Figure 37 This is a schematic diagram of the sixteenth part of the compression circuit of the embodiment of the utility model;
[0057] Figure 38 This is a schematic diagram of the seventeenth part of the compression circuit of the embodiment of the utility model;
[0058] Figure 39 This is a schematic diagram of the eighteenth part of the compression circuit of the embodiment of the utility model;
[0059] Figure 40 This is a schematic diagram of the nineteenth part of the compression circuit of the embodiment of the present utility model;
[0060] In the figure: 1. First side; 2. Second side; 3. First connector port; 4. Second connector port; 5. Ear piece; 6. Vent; 7. Three-phase power socket; 8. CONSOLE interface. DETAILED DESCRIPTION
[0061] The following describes in detail embodiments of the present invention, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present invention, and should not be construed as limiting the present invention.
[0062] In this utility model, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integral connection; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.
[0063] An intelligent computing switch, such as Figure 1 As shown, it includes a video compression module and a switching module. The video compression module is connected to the switching module. The switching module is connected to the PSE module. The video compression module, the switching module and the PSE module are connected to the power module.
[0064] The utility model is an intelligent computing switch that integrates switching technology and video compression function into a communication switching device. Compression processing is realized from the formation of video streams and access to the network, which can realize stream data compression and terminal security access, fundamentally solving industry pain points, and can reduce the pressure on the bandwidth rate of network transmission stream data. The stream compression effect is optimized by more than 10 times to the back-end storage space, ensuring high-quality forwarding of video and storage streams while effectively reducing network bandwidth occupancy and storage space, saving release rate space for network forwarding of stream data, saving bandwidth and commercial resources, and saving storage hardware for the storage end.
[0065] Furthermore, the switching module is implemented through a switching circuit, which includes a first chip, a second chip, a third chip and a fourth chip. The first chip is a single-chip microcomputer chip, the second chip, the third chip and the fourth chip are PHY chips, the first chip is connected to the second chip, the third chip and the fourth chip, the second chip is connected to the video compression module, the third chip is connected to a network transformer, the network transformer is connected to a first connector, and the third chip is connected to a second connector.
[0066] like Figure 3As shown, in this embodiment, the model of the first chip is RTL8382M, with a built-in MIPS-4KEc processor and a main frequency of 500MHz; it has a built-in 8-port 10 / 100 / 1000M Ethernet PHY and supports 5-way QSGMII interface. The PHY chip can provide a maximum of 28 10 / 100 / 1000M Ethernet electrical ports. As an implementation method, Figure 3 A specific schematic diagram of the first chip and its peripheral circuits is given and will not be described in detail here.
[0067] like Figure 14 As shown, in this embodiment, the model of the second chip is RTL8211FS-CG or RTL8218B. The RTL8218B chip supports 2-way QSGMII media and can provide 8-way 10 / 100 / 1000M Ethernet electrical ports; the RTL8214FC chip supports 1-way QSGMII media and can provide 4-way 10 / 100 / 1000M Ethernet electrical ports or 4-way 100 / 1000M fiber optic interfaces. As an implementation method, the second chip provides 1-way 10 / 100 / 1000M Ethernet electrical port to interconnect with the video compression module. Figure 14 A specific schematic diagram of the second chip and its peripheral circuits is given and will not be described in detail here.
[0068] like Figure 9 As shown, in this embodiment, the model of the third chip is RTL8218B. The RTL8218B chip supports 2-way QSGMII media and can provide 8-way 10 / 100 / 1000M Ethernet electrical ports for connecting to a network transformer. The network transformer is mainly used for signal isolation, impedance matching, signal conversion and electromagnetic compatibility. As an embodiment, the network transformer is specifically a 16-port network transformer, such as Figure 10 and Figure 11 As shown in the figure, they are the circuit schematics of the network transformer 1-8 ports and 9-16 ports respectively. Figure 9 The specific schematic diagram of the third chip and its peripheral circuits is given. Figure 10 and Figure 11 The specific schematic diagram of the network transformer is given and will not be repeated here.
[0069] like Figure 12 As shown, in this embodiment, the fourth chip model is RTL8214QF, and the fourth chip is connected to the second connector. Specifically, the second connector is an SFP connector, and the SFP connector ports are arranged in 2x1. A total of two SFP connectors are used to provide four 100 / 1000M Ethernet fiber interfaces. At the same time, the second connector is also connected to a bidirectional conversion switch, and the bidirectional conversion switch model is NCA9546. The first chip controls the four-way bidirectional conversion switch NCA9546 through the I2C bus. Figure 13Shown is the schematic diagram of the second connector, Figure 12 A specific schematic diagram of the fourth chip and its peripheral circuits is given and will not be described in detail here.
[0070] Furthermore, the video compression module is implemented by a compression circuit, which includes a fifth chip and a sixth chip. The fifth chip is RK3588, and the sixth chip is a PHY chip. The fifth chip is connected to the sixth chip, and the sixth chip is connected to the switching module.
[0071] The video compression module is responsible for compressing the input video stream and providing an MDI interface to interconnect with the switching module. The CPU chip model of the video compression module is RK3588. RK3588 is a quad-core ARM Cortex-A76 and quad-core ARM Cortex-A55 processor with a main frequency of up to 2.4GHz for the A76 core and 1.8GHz for the A55 core. The PHY chip is RTL8211F. The CPU is connected to the PHY chip through the GMAC0 interface to provide a Gigabit MDI to connect to the switching module. The video stream enters the video compression module through this channel.
[0072] In this embodiment, a compression circuit is provided. Figures 22-40 The compression module composed of the compression circuit shown in FIG. 1 realizes the compression processing of the video. The CPU chip of the video compression module is the fifth chip model RK3588, which has thousands of functional pins. Therefore, the compression circuit of the compression module is connected to the CPU chip of the video compression module. Figures 22-40 To display, such as Figure 22 The figure shows the schematic diagram of the power supply pins of the fifth chip RK3588 of the compression circuit. Figure 23 The figure shows the schematic diagram of the OSC / PLL / PMU pins of the fifth chip RK3588 of the compression circuit. Figure 24 The figure shows the schematic diagram of the DDR pins and filter circuit of the fifth chip RK3588 of the compression circuit; Figure 25 The figure shows the connection principle diagram of EMMC and VCCIO2 related pins of the fifth chip RK3588 of the compression circuit; Figure 26 The figure shows the connection principle diagram of the TYPEC / DP and USB2.0 HOST / OTG related pins of the fifth chip RK3588 of the compression circuit; Figure 27 The figure shows the connection principle diagram of VCCIO1, VCCIO3, SARADC / OTP related pins of the fifth chip RK3588 of the compression circuit; Figure 28 The figure shows the connection principle diagram of MIPI_D / C_PHY0 / 1 and MIPI_DPHY_CSI_RX_PHY related pins of the fifth chip RK3588 of the compression circuit; Figure 29The figure shows the connection principle diagram of HDMI2.1 TX and HDMI20 RX related pins of the fifth chip RK3588 of the compression circuit; Figure 30 The figure shows the connection principle diagram of the PCIE20 and PCIE30 related pins of the fifth chip RK3588 of the compression circuit; Figure 31 The figure shows the connection principle diagram of the VCCIO5, VCCIO6 and VCCIO4 related pins of the fifth chip RK3588 of the compression circuit; Figure 32 The figure shows the relevant pin connection principle diagram of the power management chip RK806-1 of the compression circuit; Figure 33 The figure shows the connection principle diagram of the relevant pins of the DC / DC regulator RK860-2, RK860-3, voltage regulator ETA3409 / SY8089AAC, and load switch SGM2576 / TT9107 of the compression circuit; Figure 34 The figure shows the connection principle diagram of the relevant pins of the compression circuit memory chip K4UBE3D4AB-MGCLLPDDR4_200P; Figure 35 The figure shows the connection principle diagram of the relevant pins of the compression circuit storage chip EMMC_B153_2L; Figure 36 and Figure 37 The figure shows the relevant pin connection schematic diagram of the two PHY chips RTL8211F of the compression circuit; Figure 38 、 Figure 39 and Figure 40 Shown is the circuit schematic diagram of peripheral circuits such as the connector of the compression circuit, power management circuit, USB interface circuit, etc.
[0073] Furthermore, the power module is implemented through a power supply circuit, which includes an AC power supply circuit and a DC / DC power supply circuit. The AC power supply circuit is connected to the DC / DC power supply circuit. The AC power supply circuit converts the input AC power into two DC voltages of 54V and 12V respectively. One 54V voltage is used to power the PSE module, and the other 12V voltage is stepped down by the DC / DC power supply circuit to output multiple DC low-voltage powers to power the video compression module and the switching module.
[0074] like Figure 2 As shown, in this embodiment, a schematic diagram of a portion of the DC / DC power supply circuit is provided. Specifically, the 12V DC input voltage is converted into voltages such as 3.3V, 1.8V, 1.5V, 1.2V, 1.1V, 1.0V, and 0.75V to power functional modules such as the video compression module and the switching module. The specific power supply circuit structure will not be described in detail here.
[0075] Furthermore, the PSE module includes a seventh chip, the model of the seventh chip is IP808AR, the seventh chip is connected to the network transformer and the switching module, and the seventh chip provides multiple power supply channels.
[0076] Specifically, the seventh chip, model IP808AR, supports the IEEE 802.3at standard and is compatible with the IEEE 802.3af standard. It provides eight power channels, each supporting a maximum of 30W. The PSE module's power channels connect to the primary tap of the network transformer and are powered via the network cable. The PSE module connects to the switch module via an I2C channel and is managed by the switch module.
[0077] Furthermore, the video compression module is separately integrated into a compression board, the switching module, the PSE module and the power supply module are integrated into a switch mainboard, and the compression board and the switch mainboard are interconnected via an Ethernet interface.
[0078] It can be understood that the video compression module is separately integrated into a compression board, while the other functional modules of the switch are separately integrated into a switch mainboard. The two are interconnected through an Ethernet interface. When there is only a switch mainboard, the intelligent switch of the present invention can realize the data forwarding, isolation and other functions that a general switch can realize. When the compression board and the switch mainboard are interconnected through the Ethernet interface, the switching technology and the video compression function are integrated into a communication switching device. Compression processing is realized from the formation of the video stream to access the network, and stream data compression can be realized.
[0079] As an implementation method, Figure 15 As shown, a single-port transformer connector interface circuit is provided on the switch mainboard to realize the connection between the switch mainboards of the compression card.
[0080] Furthermore, the switch further includes a reset module and a clock module. The reset module is implemented by a reset circuit, and the clock module is implemented by a clock circuit. Both the reset module and the clock module are connected to the switching module.
[0081] like Figure 5 and Figure 6 As shown, in this embodiment, schematic diagrams of the reset circuit and clock circuit are provided. The clock circuit provides a stable time reference signal for synchronizing and coordinating the various modules of the switch electronic circuit, ensuring that the various module components in the switch system operate according to a predetermined time sequence, thereby ensuring the stability and accuracy of the overall device; the reset circuit is used to restore the switch system or circuit to the initial state.
[0082] Furthermore, the switch also includes a storage module, which is implemented by a storage circuit. The storage circuit includes a DDR memory circuit and a FLASH storage circuit. The storage module is connected to the switching module. Figure 4 and Figure 7 As shown, in this embodiment, a schematic diagram of a DDR memory circuit and a FLASH storage circuit is provided.
[0083] Furthermore, the switch also includes several LED indicators, which are Figure 16 The LED driver circuit shown is used for driving control. The LED indicator can be directly integrated on the switch motherboard or connected externally through a connector.
[0084] Further, such as Figure 17 As shown, Figure 17 The circuit diagram of the panel light above the dotted line is used to indicate the power on or working status of the switch. The circuit diagram of the PSE connector below the dotted line is shown in the figure. Figure 14 As shown, the PSE module is connected to the power module, switching module and network transformer respectively. Figure 17 The three connectors in the PSE connector circuit are connected.
[0085] Further, such as Figures 18-21 As shown, the switch also includes a housing, which is in the shape of a rectangular box. The compression board and the switch mainboard are both arranged in the housing. The first side 1 of the housing is provided with a first connector port 3 and a second connector port 4, and the second side 2 opposite to the first side 1 is provided with a three-phase power socket 7.
[0086] It is understandable that the housing is adapted to the size and space occupied by the switch mainboard and the compression board, so that the compression board and the switch mainboard can be well arranged inside the housing. At the same time, it should be noted that the positions of the first connector port 3, the second connector port 4 and the three-phase power socket 7 on the housing are not limited to the above description. Those skilled in the art can selectively set them according to factors such as the shape and size of the switch housing and the specific positions of the relevant interfaces on the switch PCB mainboard.
[0087] Furthermore, ears 5 are provided on both sides of the shell. The ears 5 are L-shaped and connected to the shell by screws. The two ears 5 are arranged opposite to each other. A plurality of ventilation holes 6 are provided on the shell.
[0088] like Figure 19 As shown, a CONSOLE interface 8 is further provided on the first side surface 1 of the housing, and the ear piece 5 can be used to install and fix the switch.
[0089] In one embodiment, the CONSOLE interface 8 realizes interactive connection with the first chip through a serial port, such as Figure 8 The figure shows the schematic diagram of the serial port circuit.
[0090] As an embodiment, the shell is made of galvanized steel plate.
[0091] It is understandable that the vent holes 6 are used to dissipate heat from the internal circuit board of the switch. The present invention does not impose any specific restrictions on the number and position of the vent holes 6 on the housing, and those skilled in the art can selectively arrange them according to actual needs.
[0092] The utility model is an intelligent computing switch that integrates switching technology and video compression function into a communication switching device. Compression processing is realized from the formation of video streams and access to the network, which can realize stream data compression and terminal security access, fundamentally solving industry pain points, and can reduce the pressure on the bandwidth rate of network transmission stream data. The stream compression effect is optimized by more than 10 times to the back-end storage space, ensuring high-quality forwarding of video and storage streams while effectively reducing network bandwidth occupancy and storage space, saving release rate space for network forwarding of stream data, saving bandwidth and commercial resources, and saving storage hardware for the storage end.
[0093] The switch of this utility model not only ensures the forwarding of the flow but also ensures the reasonable continuity of network storage resources on the basis of optimizing bandwidth resources and storage hardware resources, and is particularly effective in cross-network audio and video applications. This utility model product is a multifunctional streaming video compression communication device with flexible application and obvious functional effects. It has good industry application prospects and advantages, helps to promote the business development of the audio and video industry, has the advantage of integrated streaming data exchange, and saves a lot of economic hard investment.
[0094] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0095] Those skilled in the art will readily understand that the present invention encompasses any combination of the various components described in the above specification and the detailed description, as well as the components shown in the accompanying drawings. Due to limited space and to maintain clarity, not all of the various solutions resulting from these combinations are described. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of this invention.
[0096] Although the embodiments of the present invention have been shown and described above, it should be understood that the above embodiments are illustrative and should not be construed as limiting the present invention. Those skilled in the art may make changes, modifications, substitutions, and variations to the above embodiments without departing from the principles and purpose of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. An intelligent computing switch, characterized in that: It includes a video compression module and a switching module. The video compression module is connected to the switching module. The switching module is connected to a PSE module. The video compression module, the switching module and the PSE module are connected to a power module.
2. The intelligent computing switch according to claim 1, characterized in that: The switching module is implemented through a switching circuit, which includes a first chip, a second chip, a third chip and a fourth chip. The first chip is a single-chip microcomputer chip, the second chip, the third chip and the fourth chip are PHY chips, the first chip is connected to the second chip, the third chip and the fourth chip, the second chip is connected to the video compression module, the third chip is connected to a network transformer, the network transformer is connected to a first connector, and the third chip is connected to a second connector.
3. The intelligent computing switch according to claim 1, characterized in that: The video compression module is implemented by a compression circuit, which includes a fifth chip and a sixth chip. The model of the fifth chip is RK3588, and the sixth chip is a PHY chip. The fifth chip is connected to the sixth chip, and the sixth chip is connected to the switching module.
4. The intelligent computing switch according to claim 1, characterized in that: The power supply module is implemented by a power supply circuit, which includes an AC power supply circuit and a DC / DC power supply circuit. The AC power supply circuit is connected to the DC / DC power supply circuit. The AC power supply circuit converts the input AC power into two DC voltages of 54V and 12V respectively. One 54V voltage is used to power the PSE module, and the other 12V voltage is stepped down by the DC / DC power supply circuit to output multiple DC low-voltage powers to power the video compression module and the switching module.
5. The intelligent computing switch according to claim 2, characterized in that: The PSE module includes a seventh chip, the model of which is IP808AR. The seventh chip is connected to the network transformer and the switching module, and provides multiple power supply channels.
6. The intelligent computing switch according to claim 1, characterized in that: The video compression module is independently integrated into a compression board, the switching module, the PSE module and the power supply module are integrated into a switch mainboard, and the compression board and the switch mainboard are interconnected via an Ethernet interface.
7. The intelligent computing switch according to claim 1, characterized in that: It also includes a reset module and a clock module. The reset module is implemented by a reset circuit, and the clock module is implemented by a clock circuit. Both the reset module and the clock module are connected to the switching module.
8. The intelligent computing switch according to claim 1, characterized in that: It also includes a storage module, which is implemented by a storage circuit. The storage circuit includes a DDR memory circuit and a FLASH storage circuit. The storage module is connected to the switching module.
9. The intelligent computing switch according to claim 6, characterized in that: It also includes a shell, which is in the shape of a rectangular box. The compression board and the switch mainboard are both arranged in the shell. The first side of the shell is provided with a first connector port and a second connector port, and the second side opposite to the first side is provided with a three-phase power socket.
10. The intelligent computing switch according to claim 9, characterized in that: Ear pieces are provided on both sides of the shell, and the ear pieces are L-shaped. The ear pieces are connected to the shell by screws, and the two ear pieces are arranged opposite to each other. The shell is provided with a plurality of ventilation holes.