Digital variable optical attenuator control circuit

Through the digital dimmable optical attenuator control circuit, the digital control and closed-loop feedback of the stepper motor is achieved using a microcontroller and Hall sensor, which solves the problems of large size, slow response speed and low resolution of the mechanical dimmable optical attenuator, and realizes high-precision light attenuation control.

CN223259967UActive Publication Date: 2025-08-22TIANJIN HONGYIGUANG TECH CO LTD
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Patent Information

Application Number
CN202422659803.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-01
Publication Date
2025-08-22
Estimated Expiration
2034-11-01

AI Technical Summary

Technical Problem

The existing mechanical dimmable optical attenuators have problems such as large size, slow response speed, poor integration and low resolution, which cannot meet the convenience, response speed and resolution requirements of the all-optical communication network.

Method used

The digital dimmable optical attenuator control circuit is adopted, and the stepper motor is controlled by a microcontroller through the pulse width modulation signal. Combined with the Hall sensor and optical power feedback circuit, digital control and closed-loop feedback of the dimmable optical attenuator are realized to improve control accuracy.

Benefits of technology

It realizes optical attenuator control with small size, good integration, fast response speed and high resolution to meet the needs of all-optical communication networks.

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Abstract

The utility model provides a control circuit for a digital variable optical attenuator, which relates to the technical field of optical communication and mainly comprises a power supply management circuit, a main control circuit, a communication interface circuit and a motor driving circuit. The main control circuit comprises a singlechip which is electrically connected with the power supply management circuit, the communication interface circuit, the motor driving circuit and the like respectively; the motor driving circuit comprises a stepping motor driving chip; the communication interface circuit comprises an RS232 communication circuit and / or a CAN communication circuit. According to the scheme, digital control is carried out on the motor of the variable optical attenuator in a pulse width modulation mode by utilizing the single chip microcomputer; a Hall sensor can be arranged on the main shaft of the motor, so that internal closed-loop feedback is facilitated, and the control precision is improved; a photoelectric detection sensor can be arranged at the output end of the light path, so that external closed-loop feedback is realized, and the control precision is further improved; the scheme has the characteristics of small size, good integration, high response speed, high resolution and the like.
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Description

Technical Field

[0001] The utility model relates to the technical field of optical communications, in particular to a digital adjustable optical attenuator control circuit. Background Art

[0002] When optically interconnecting different devices or measuring laser parameters, it is often necessary to attenuate the laser's intensity. The device that performs this function is called an optical attenuator. Optical attenuators can be broadly categorized into two types: fixed attenuators with a fixed attenuation value and adjustable attenuators. Adjustable attenuators are the most widely used.

[0003] Currently, variable optical attenuators (VAOs), a key passive component, have long remained mechanically adjustable. Mechanical VAOs primarily consist of a stepper motor, a light-blocking element, and a fiber collimator. A motor drives the light-blocking element to rotate between two fiber collimators, attenuating the optical power. While these VAOs meet optical requirements, possess mature technology, and require no temperature control, they also suffer from drawbacks such as bulk, slow response, poor integration, and low resolution.

[0004] As all-optical communication networks place increasingly higher demands on the convenience, response speed, and resolution of components, the industry urgently needs to develop adjustable optical attenuators with small size, good integration, fast response speed, and high resolution. Utility Model Content

[0005] The purpose of the present utility model is to provide a digital adjustable optical attenuator control circuit to solve at least one of the above technical problems existing in the prior art.

[0006] To solve the above technical problems, the present invention provides a digital adjustable optical attenuator control circuit, which mainly includes a power supply management circuit, a main control circuit, a communication interface circuit and a motor drive circuit:

[0007] The power supply management circuit is used to supply power to the motor drive circuit, the main control circuit and the communication interface circuit respectively;

[0008] The main control circuit includes a single-chip microcomputer (such as STM32), which is electrically connected to the power supply management circuit, the communication interface circuit and the motor drive circuit, and is used to output pulse width modulation signals to the motor drive circuit and collect the latter's status monitoring data in a program-controlled manner; and realize information exchange with the communication interface circuit;

[0009] The communication interface circuit is used to interact with the outside through a standard protocol interface;

[0010] The motor drive circuit includes a stepper motor drive chip, which is used to: control the rotation angle of the stepper motor main shaft through the duty cycle of the pulse width modulation signal; and monitor the working state of the stepper motor.

[0011] The above structure implements the following operating process: receiving a required optical power value transmitted from an external source via a communication interface circuit; calculating an attenuation value between the required optical power value and the current optical power value via a main control circuit; calculating the rotational step angle of the motor of the adjustable optical attenuator based on the attenuation value; calculating the duty cycle and frequency of a pulse width modulation (PWM) signal based on the rotational step angle, and inputting the PWM signal into a motor drive circuit; and driving the stepper motor of the adjustable optical attenuator via the motor drive circuit and feeding back the operating status of the stepper motor to the single-chip microcomputer, wherein the operating status includes the actual rotational angle of the motor main shaft.

[0012] In a feasible embodiment, the power supply management circuit includes two linear voltage regulator power supply chips (LDOs), which respectively convert an external power supply, such as a +12V power supply, into a first power supply, such as a +5V power supply, and a second power supply, such as a +3.3V power supply: the first power supply is used to power the motor drive circuit; the second power supply is used to power the main control circuit and the communication interface circuit; this can meet the conventional power supply configuration requirements.

[0013] In a feasible implementation manner, the communication interface circuit includes an RS232 communication circuit and / or a CAN communication circuit:

[0014] The RS232 communication circuit is used to realize point-to-point control with a host computer (such as a computer) through an RS232 standard protocol interface;

[0015] The CAN communication circuit is used to connect to a higher-level device or a device of the same level in series via a CAN standard protocol interface;

[0016] Of course, other standard protocol interface communication circuits known in the art may also be used according to actual needs.

[0017] In a feasible embodiment, the control circuit also includes a Hall sensor, which is connected to the stepper motor spindle through a mechanical structure such as a coupling to ensure the synchronous rotation of the light blocking element, the stepper motor spindle and the Hall sensor; the Hall sensor is electrically connected to the single-chip microcomputer to collect and feedback the actual rotation angle of the stepper motor spindle to achieve closed-loop control and further improve the control accuracy; the Hall sensor is connected to the second power supply.

[0018] In a feasible embodiment, the control circuit also includes an optical power feedback circuit, which is arranged at the optical path output end of the adjustable optical attenuator and is electrically connected to the second power supply and the main control circuit respectively. The optical power feedback circuit is used to collect the optical power signal at the optical path output end and convert it into a current signal; then, according to Ohm's law, the current signal is converted into a voltage signal and fed back to the single-chip microcomputer; the single-chip microcomputer also calculates the actual optical power value based on the voltage signal and compares it with the required optical power value, and then iteratively compensates the rotation step angle; thus, a closed-loop feedback loop of optical power is formed, which can compensate for the error in optical power caused by the mechanical structure transmission and other links of the adjustable optical attenuator, thereby improving the overall attenuation accuracy of the optical attenuator.

[0019] By adopting the above technical solution, the utility model has the following beneficial effects:

[0020] The utility model provides a digital adjustable optical attenuator control circuit, which uses a single-chip microcomputer to digitally control the adjustable optical attenuator motor through pulse width modulation. A Hall sensor can be set on the motor spindle, which is conducive to internal closed-loop feedback and improves control accuracy. A photoelectric detection sensor can also be set at the output end of the optical path to achieve external closed-loop feedback, further improving control accuracy. This solution has the characteristics of small size, good integration, fast response speed and high resolution. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 A simplified diagram of the structural relationship of a digital adjustable optical attenuator control circuit provided by an embodiment of the utility model;

[0023] Figure 2 A layout diagram of a power supply management circuit provided in an embodiment of the present utility model;

[0024] Figure 3 A main control circuit layout diagram provided for an embodiment of the present utility model;

[0025] Figure 4 Layout diagram of the RS232 communication circuit provided by the embodiment of the utility model;

[0026] Figure 5 CAN communication circuit layout diagram provided for an embodiment of the present utility model;

[0027] Figure 6 A motor drive circuit layout diagram provided for an embodiment of the present utility model;

[0028] Figure 7 Layout diagram of the optical power feedback circuit provided by the embodiment of the utility model;

[0029] Figure 8 A layout diagram of a power-on protection circuit provided in an embodiment of the present utility model;

[0030] Figure 9 This is a circuit layout diagram of the download port provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0031] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0032] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating positions or relationships, are based on the positions or relationships shown in the accompanying drawings and are intended solely to facilitate the description of this utility model and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0033] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on the specific circumstances.

[0034] The present invention will be further explained below in conjunction with specific implementation methods.

[0035] It should also be noted that the following specific embodiments or specific implementation methods are a series of optimized settings listed in the present invention to further explain the specific solution content, and these settings can be combined or used in association with each other.

[0036] Example 1:

[0037] like Figure 1 As shown, this embodiment provides a digital adjustable optical attenuator control circuit, including a power management circuit (power supply and distribution system), a main control circuit (STM32 / FPGA main control), a communication interface circuit (connecting to a host computer and upper-level equipment), and a motor drive circuit:

[0038] The power management circuit includes two linear voltage regulator chips (LDOs), which convert the +12V power supply into a +5V power supply and a +3.3V power supply respectively:

[0039] The +5V power supply is used to power the motor drive circuit. Figure 2 As shown in the upper middle part, it mainly includes: LDO linear voltage-regulated power supply chip U5 (AMS1117-5), capacitor C12 (10μF), capacitor C13 (4.7μF), capacitor C14 (4.7μF) and capacitor C15 (10μF): the input pin of the LDO linear voltage-regulated power supply chip U5 is connected to the +12V power supply, the ground pin is grounded, the two output pins are short-circuited, and the output voltage is +5V; the capacitor C12 and the capacitor C13 are connected in parallel between the input pin and the ground pin of the LDO linear voltage-regulated power supply chip U5, so that they can be used as input and output capacitors for energy storage filtering; the capacitor C14 and the capacitor C15 are connected in parallel between the output pin and the ground pin of the LDO linear voltage-regulated power supply chip U5, so that the output load capacity can be further enhanced while realizing the power supply filtering function;

[0040] The +3.3V power supply is used to power the main control circuit and the communication interface circuit. Figure 2 As shown in the lower middle part, it mainly includes: LDO linear voltage-regulated power supply chip U6 (AMS1117-3.3), capacitor C16 (10μF), capacitor C17 (4.7μF), capacitor C18 (4.7μF) and capacitor C19 (10μF): the input pin of the LDO linear voltage-regulated power supply chip U6 is connected to the +12V power supply, the ground pin is grounded, the two output pins are short-circuited, and the output voltage is +3.3V; the capacitor C16 and the capacitor C17 are connected in parallel between the input pin and the ground pin of the LDO linear voltage-regulated power supply chip U6, so that they can be used as input and output capacitors for energy storage filtering; the capacitor C18 and the capacitor C19 are connected in parallel between the output pin and the ground pin of the LDO linear voltage-regulated power supply chip U6, so that the output load capacity can be further enhanced while realizing the power supply filtering function;

[0041] The main control circuit includes a single-chip microcomputer U7 (STM32G47RET6), which is electrically connected to the power supply management circuit, the communication interface circuit and the motor drive circuit, and is used to output a pulse width modulation signal to the motor drive circuit and collect the latter's status monitoring data through program control; and realize information exchange with the communication interface circuit;

[0042] The circuit diagram of the main control circuit is as follows: Figure 3 As shown, it mainly includes: a single-chip microcomputer U7, a capacitor C25 (100nF) and a capacitor C26 (100nF): the PB1 pin, PB2 pin, VSSA pin (the working analog negative voltage pin of the chip) and VREF+ pin (ADC reference positive voltage pin) of the single-chip microcomputer U7 are respectively electrically connected to the motor drive circuit, for outputting a pulse width modulation (PWM) signal and collecting the latter's status monitoring data; the VSSA pin is grounded; the VREF+ pin is connected to a +3.3V power supply; the capacitor C25 and the capacitor C26 are connected in parallel between the VSSA pin and the VREF+ pin for filtering; the PC4 / USART1_TX pin, PC5 / USART1_RX pin, PA12 / CAN_TX pin and PA11 / CAN_RX pin of the single-chip microcomputer U7 are respectively electrically connected to the communication interface circuit for realizing information interaction;

[0043] Furthermore, the main control circuit also includes a capacitor C20 (100nF), a capacitor C21 (22pF), a capacitor C22 (22pF), a capacitor C23 (100nF), a capacitor C24 (100nF), a resistor R14 (0Ω) and a crystal oscillator Y1 (8MHz): the PF0-0SC_IN pin of the single-chip microcomputer U7 is connected to one end of the capacitor C21, and the other end of the capacitor C21 is grounded for filtering; the PF1-0SC_OUT pin of the single-chip microcomputer U7 is connected to one end of the capacitor C22, and the other end of the capacitor C22 is grounded for filtering; the crystal oscillator Y1 is connected in parallel between the PF1-0SC_OUT pin and the PF0-0SC_IN pin of the single-chip microcomputer U7 to provide a clock frequency; the VSS15 pin of the single-chip microcomputer U7 (one of the working negative voltage pins of the chip) is connected to the capacitor One end of C23, the other end of the capacitor C23 is connected to the VDD16 pin of the single-chip microcomputer U7 (one of the working positive voltage pins of the chip) and connected to the +3.3V power supply for filtering; the VDD64 pin of the single-chip microcomputer U7 (one of the working positive voltage pins of the chip) is connected to the +3.3V power supply and connected to one end of the capacitor C20, and the other end of the capacitor C20 is grounded for filtering; the PB8-B00T0 pin of the single-chip microcomputer U7 is connected to one end of the resistor R14, and the other end of the resistor R14 is grounded for noise suppression; the VDD48 pin of the single-chip microcomputer U7 (one of the working positive voltage pins of the chip) is connected to the +3.3V power supply and connected to one end of the capacitor C24, and the other end of the capacitor C24 is grounded and connected to the VSS47 pin of the single-chip microcomputer U7 (one of the working negative voltage pins of the chip) for filtering;

[0044] The communication interface circuit includes an RS232 communication circuit and / or a CAN communication circuit:

[0045] The RS232 communication circuit is used to realize point-to-point control with a host computer (such as a computer) through an RS232 standard protocol interface. Figure 4 As shown, it mainly includes transceiver U2, capacitor C4 (100nF), capacitor C5 (100nF), capacitor C6 (100nF), capacitor C7 (100nF), capacitor C8 (100nF) and port J1 (DB-9):

[0046] The specific model of the transceiver U2 is MAX3232, its C1+ pin is connected to one end of the capacitor C4, and the other end of the capacitor C4 is connected to the C1- pin of the transceiver U2 for filtering; the V+ pin of the transceiver U2 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is grounded for filtering; the C2+ pin of the transceiver U2 is connected to one end of the capacitor C7, and the other end of the capacitor C7 is connected to the C2- pin of the transceiver U2 for filtering; the V- pin of the transceiver U2 is connected to one end of the capacitor C8, and the other end of the capacitor C8 is grounded for filtering; the T1IN pin (the first logic data input pin) of the transceiver U2 is connected to the PC4 / USART1_TX pin of the microcontroller U7; the R1OUT pin (the first logic data output pin) of the transceiver U2 is connected to the PC5 / USART1_RX pin of the microcontroller U7; The R1IN pin of the transceiver U2 is connected to terminal 3 of port J1; the T1OUT pin (RS232 line data output pin) of the transceiver U2 is connected to terminal 4 of port J1; the GND pin (ground pin) of the transceiver U2 is grounded; the VCC pin (positive power supply pin) of the transceiver U2 is connected to one end of capacitor C6 and to a +3.3V power supply, and the other end of the capacitor C6 is grounded for filtering; in this way, a transfer line, such as USB to RS232, can be used to connect the digital variable optical attenuator to the host computer.

[0047] The CAN communication circuit is used to connect to the upper level device or the same level device in series through the CAN standard protocol interface. Figure 5 As shown, it mainly includes transceiver U3, resistor R4 (0Ω), resistor R5 (10KΩ), resistor R6 (4.7Ω), resistor R7 (0Ω), resistor R8 (120Ω), resistor R9 (0Ω), resistor R10 (0Ω), resistor R11 (10KΩ), capacitor C9 (100nF) and port P1 (Header 2):

[0048] The specific model of the transceiver U3 is SN65HVD234DR. The TXD pin (transmit data pin) of the transceiver U3 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the PA12 / CAN_TX pin of the microcontroller U7 for overcurrent protection during data transmission; the GND pin of the transceiver U3 is grounded; the VCC pin (positive power supply pin) of the transceiver U3 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the +3.3V power supply. The VCC pin is also connected to one end of the capacitor C9, and the other end of the capacitor C9 is grounded for filtering; the RXD pin (receive data pin) of the transceiver U3 is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the PA11 / CAN_RX pin of the microcontroller U7 for overcurrent protection during data reception; the transceiver The EN pin (enable pin) of U3 is connected to one end of resistor R11, the other end of which is connected to a +3.3V power supply for current limiting when transceiver U3 is activated. The CANL pin (low pin) of transceiver U3 is connected to one end of resistor R9, the other end of which is connected to terminal 2 of port P1. The CANH pin (high pin) of transceiver U3 is connected to one end of resistor R7, the other end of which is connected to terminal 1 of port P1. A resistor R8 is connected in parallel between the CANL and CANH pins for impedance matching, especially to prevent communication signal reflections when the digital variable optical attenuator is at the end of a cascaded device. The RS pin (mode select pin) of transceiver U3 is connected to one end of resistor R5, the other end of which is grounded, for selecting ramp control mode for transceiver U3.

[0049] The motor drive circuit for controlling the rotation angle of the stepper motor spindle by the duty cycle of the pulse width modulation signal; monitoring the working state of the stepper motor;

[0050] The circuit diagram of the motor drive circuit is as follows: Figure 6As shown, it mainly includes a stepper motor driver chip U1 (DRV8833), a resistor R1 (200MΩ), a resistor R2 (200MΩ), a resistor R3 (4.7KΩ), a capacitor C1 (2.2μF), a capacitor C2 (100nF), a capacitor C3 (4.7μF) and a polarity capacitor E1 (10μF): the ALSEN pin of the stepper motor driver chip U1 is connected to one end of the resistor R1, and the other end of the resistor R1 is grounded; the BLSEN pin of the stepper motor driver chip U1 is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded, which is used to adjust the stepper motor driver chip U1. The stepper motor driving current can be changed by changing the resistance values ​​of resistors R1 and R2, so that the maximum output current of the stepper motor driver chip U1 (at least 2A) can be controlled to be lower than the rated current of the stepper motor during the debugging process, thereby avoiding overcurrent and burning of the stepper motor; the nSLEEP pin of the stepper motor driver chip U1 is a sleep mode pin. When the device is turned on and not used for a long time, setting the pin to a high level will put the stepper motor driver chip U1 into sleep mode, thereby reducing power consumption; the AOUT1 pin, AOUT2 pin, and BO pin of the stepper motor driver chip U1 The UT1 pin and the BOUT2 pin are respectively connected to the input winding of the stepper motor to drive the stepper motor to rotate; the nFAULT pin of the stepper motor driver chip U1 is connected to one end of the resistor R3 to limit the current when sampling the fault information of the stepper motor driver chip; the AIN1 pin, AIN2 pin, BIN1 pin and BIN2 pin of the stepper motor driver chip U1 are respectively connected to the PB1 pin, PB2 pin, VSSA pin and VREF+ pin of the microcontroller U7 to input the pulse width modulation (PWM) signal and adjust the stepper motor by changing the duty cycle of the pulse width modulation (PWM) signal. Rotation angle; the VINT pin (internal power supply bypass pin) of the stepper motor driver chip U1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded for input power decoupling; the capacitor C2 is connected to the VM pin (power supply pin) and the VCP pin (high-side gate drive voltage pin) of the stepper motor driver chip U1 for input power filtering; the capacitor C3 and the polar capacitor E1 are connected in parallel between the VM pin and ground, and the positive pole of the polar capacitor E1 is connected to the VM pin and connected to the +5V power supply for input power energy storage, so as to realize the function of stable operation of the stepper motor under high load conditions.

[0051] The above structure can realize the following working process: receiving the required optical power value transmitted from the outside through the communication interface circuit; calculating the attenuation value of the required optical power value and the current optical power value through the main control circuit; calculating the rotation step angle of the adjustable optical attenuator motor based on the attenuation value; and calculating the rotation step angle based on the formula:

[0052] Duty cycle = (motor control accuracy / rotation step angle) x 100%;

[0053] Frequency = maximum motor speed x number of pulses in a single step;

[0054] The duty cycle and frequency of a pulse width modulation (PWM) signal are calculated respectively, and the PWM signal is input into a motor drive circuit; the stepper motor of the variable optical attenuator is driven by the motor drive circuit to operate and the working status of the stepper motor is fed back to the single chip microcomputer, and the working status may include the actual rotation angle of the motor main shaft.

[0055] Furthermore, the control circuit also includes a Hall sensor, which is connected to the stepper motor spindle through a mechanical structure such as a coupling or a coaxial device to ensure the synchronous rotation of the light blocking element, the stepper motor spindle and the Hall sensor; the Hall sensor is electrically connected to the single-chip microcomputer to collect and feedback the actual rotation angle of the stepper motor spindle, thereby realizing closed-loop control and further improving control accuracy; the Hall sensor is connected to the +3.3V power supply.

[0056] Example 2:

[0057] In this embodiment, based on the first embodiment, the control circuit further includes an optical power feedback circuit, which is disposed at the optical path output end of the adjustable optical attenuator and is electrically connected to the single-chip microcomputer and the +3.3V power supply, respectively. The control circuit is configured to collect an optical power signal at the optical path output end and convert it into a current signal, using the formula: current signal = optical power signal × photoelectric conversion efficiency. The current signal is then converted into a voltage signal based on Ohm's law and fed back to the single-chip microcomputer, using the formula: voltage signal = current signal × preset resistance value. The single-chip microcomputer further calculates an actual optical power value based on the voltage signal, compares it with a required optical power value, and iteratively compensates for the rotation step angle, using the formula: actual optical power value = voltage signal / (photoelectric conversion efficiency × preset resistance value). This forms a closed-loop optical power feedback loop, which can compensate for errors in optical power caused by the mechanical structure transmission and other aspects of the adjustable optical attenuator, thereby improving the overall attenuation accuracy of the optical attenuator.

[0058] The optical power feedback circuit, such as Figure 7 As shown, it mainly includes operational amplifier U4 (OAP2188), resistor R12 (1KΩ), resistor R13 (1KΩ), capacitor C10 (100nF), capacitor C11 (100nF) and photoelectric probe PD:

[0059] The OUTA pin (channel A output pin), INA- pin (channel A negative input signal pin), INA+ pin (channel A positive input signal pin), GND pin and INB+ pin (channel B positive input signal pin) of the operational amplifier U4 are all grounded; the capacitor C11 and the resistor R13 are connected in parallel between the INB+ pin and the INB- pin (channel B negative input signal pin) of the operational amplifier U4; the INB- pin is also connected to pin 2 of the photoelectric probe PD; pin 1 of the photoelectric probe PD is grounded; pin 3 of the photoelectric probe PD is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the VCC pin of the operational amplifier U4; the capacitor C10 is connected between the VCC pin and ground, and is used to decouple the input power supply of the operational amplifier U4 to prevent the operational amplifier U4 from being affected by power supply ripple when collecting weak signals; the OUTB pin of the operational amplifier U4 is connected to the PC3 / ADC12_IN9 pin of the microcontroller U7, and is used to feed back the voltage signal to the microcontroller U7.

[0060] Example 3:

[0061] In this embodiment, based on the first embodiment, the main control circuit further includes a power-on protection circuit, such as Figure 8 As shown, it specifically includes: terminal P2, polarized capacitor E2 (22μF), polarized capacitor E3 (22μF), capacitor C27 (2.2nF), capacitor C28 (2.2nF), resistor R19 (4.7KΩ), common-mode filter L1 (SMW7060S701NTT), fuse F1 (1206 / 3A), Schottky diode D1 (SS34) and light-emitting diode D2 (OP_LED_G):

[0062] Terminal 1 of the wiring terminal P2 is connected to an external +12V power supply and connected to one end of the capacitor C27, and the other end of the capacitor C27 is connected to the protective neutral line (PE) for filtering; Terminal 1 of the wiring terminal P2 is also connected to one end of the fuse F1, and the other end of the fuse F1 is connected to pin 1 of the common-mode filter L1, so that it can be blown in time after a short-circuit fault occurs in the downstream equipment to protect the upstream equipment from interference; Terminal 2 of the wiring terminal P2 is connected to an external ground and connected to one end of the capacitor C28, and the other end of the capacitor C28 is connected to the protective neutral line (PE) for filtering; the positive electrode of the polarity capacitor E2 is connected to terminal 1 of the wiring terminal P2, and the negative electrode of the polarity capacitor E2 is connected to terminal 2 of the wiring terminal P2 to filter out power bus interference; Terminal 2 of the wiring terminal P2 is also connected to the common-mode Pin 2 of the filter L1; the negative pole of the Schottky diode D1 is connected to pin 1 of the common-mode filter L1, and the positive pole of the Schottky diode D1 is connected to pin 2 of the common-mode filter L1, so as to prevent the digital adjustable attenuator from being burned when the positive and negative poles of the input bus are connected in reverse; pin 3 of the common-mode filter L1 is connected to one end of the resistor R19, and the other end of the resistor R19 is connected to the positive pole of the light-emitting diode D2, and the negative pole of the light-emitting diode D2 is grounded for indicating the conduction state; the positive pole of the polarity capacitor E3 is connected to pin 3 of the common-mode filter L1, and the negative pole of the polarity capacitor E3 is connected to pin 4 of the common-mode filter L1 for further filtering out interference from the power bus; pin 4 of the common-mode filter L1 is grounded; in this way, the common-mode interference of the power bus can be filtered out by the common-mode filter L1, etc., thereby enhancing the service life of the digital adjustable attenuator;

[0063] Example 4:

[0064] In this embodiment, based on the first embodiment, the main control circuit further includes a download port circuit, such as Figure 9 As shown, it specifically includes: port P3 (STDC14); terminal 3 of the port P3 is connected to the +3.3V power supply; terminal 5 and terminal 7 of the port P3 are grounded; terminal 9 and terminal 6 of the port P3 are connected to the PA14 / SWCLK pin of the microcontroller U7; terminal 13 of the port P3 is connected to the PA9 pin (RXD pin) of the microcontroller U7; terminal 14 of the port P3 is connected to the PA10 pin (TXD pin) of the microcontroller U7; terminal 10 of the port P3 is connected to the PA15 / JDTI pin (JDI pin) of the microcontroller U7; terminal 8 of the port P3 is connected to the PB3 / JTDO pin (JDO pin) of the microcontroller U7; terminal 4 of the port P3 is connected to the PA13 / SWDIO pin of the microcontroller U7; this facilitates independent debugging and programming of the microcontroller U7.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A digital adjustable optical attenuator control circuit, characterized in that: Including power supply management circuit, main control circuit, communication interface circuit and motor drive circuit: The power supply management circuit includes two linear voltage-stabilized power supply chips, which convert the external power supply into a first power supply and a second power supply respectively; The main control circuit includes a single-chip microcomputer U7, a capacitor C25 and a capacitor C26: the PB1 pin, the PB2 pin, the VSSA pin and the VREF+ pin of the single-chip microcomputer U7 are electrically connected to the motor drive circuit respectively; the VSSA pin is grounded; the VREF+ pin is connected to a second power supply; the capacitor C25 and the capacitor C26 are connected in parallel between the VSSA pin and the VREF+ pin; the PC4 / USART1_TX pin, the PC5 / USART1_RX pin, the PA12 / CAN_TX pin and the PA11 / CAN_RX pin of the single-chip microcomputer U7 are electrically connected to the communication interface circuit respectively; The communication interface circuit includes an RS232 communication circuit and / or a CAN communication circuit; The motor drive circuit includes a stepper motor drive chip U1, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3 and a polarity capacitor E1: the ALSEN pin of the stepper motor drive chip U1 is connected to one end of the resistor R1, and the other end of the resistor R1 is grounded; the BLSEN pin of the stepper motor drive chip U1 is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded; the AOUT1 pin, AOUT2 pin, BOUT1 pin and BOUT2 pin of the stepper motor drive chip U1 are respectively connected to the input winding of the stepper motor; the nFA of the stepper motor drive chip U1 The ULT pin is connected to one end of the resistor R3; the AIN1 pin, AIN2 pin, BIN1 pin and BIN2 pin of the stepper motor driver chip U1 are respectively connected to the PB1 pin, PB2 pin, VSSA pin and VREF+ pin of the microcontroller U7; the VINT pin of the stepper motor driver chip U1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded; the capacitor C2 is connected to the VM pin and VCP pin of the stepper motor driver chip U1; the capacitor C3 and the polar capacitor E1 are connected in parallel between the VM pin and the ground, and the positive pole of the polar capacitor E1 is connected to the VM pin and the first power supply.

2. The circuit according to claim 1, characterized in that The power supply management circuit of the first power supply includes an LDO linear voltage-regulated power supply chip U5, a capacitor C12, a capacitor C13, a capacitor C14 and a capacitor C15: the input pin of the LDO linear voltage-regulated power supply chip U5 is connected to the external power supply, the ground pin is grounded, the two output pins are short-circuited, and the output voltage is the voltage of the first power supply; the capacitor C12 and the capacitor C13 are connected in parallel between the input pin and the ground pin of the LDO linear voltage-regulated power supply chip U5; the capacitor C14 and the capacitor C15 are connected in parallel between the output pin and the ground pin of the LDO linear voltage-regulated power supply chip U5.

3. The circuit according to claim 1, wherein: The power supply management circuit of the second power supply includes an LDO linear voltage-regulated power supply chip U6, a capacitor C16, a capacitor C17, a capacitor C18 and a capacitor C19: the input pin of the LDO linear voltage-regulated power supply chip U6 is connected to the external power supply, the ground pin is grounded, the two output pins are short-circuited, and the output voltage is the voltage of the second power supply; the capacitor C16 and the capacitor C17 are connected in parallel between the input pin and the ground pin of the LDO linear voltage-regulated power supply chip U6; the capacitor C18 and the capacitor C19 are connected in parallel between the output pin and the ground pin of the LDO linear voltage-regulated power supply chip U6.

4. The circuit according to claim 1, wherein: The RS232 communication circuit includes a transceiver U2, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8 and a port J1: the C1+ pin of the transceiver U2 is connected to one end of the capacitor C4, and the other end of the capacitor C4 is connected to the C1- pin of the transceiver U2; the V+ pin of the transceiver U2 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is grounded; the C2+ pin of the transceiver U2 is connected to one end of the capacitor C7, and the other end of the capacitor C7 is connected to the C2- pin of the transceiver U2; the V- pin of the transceiver U2 is connected to one end of the capacitor C8, and the other end of the capacitor C8 is grounded; the T1IN pin of the transceiver U2 is connected to the PC4 / USART1_TX pin of the microcontroller U7; the R1OUT pin of the transceiver U2 is connected to the PC5 / USART1_RX pin of the microcontroller U7; The R1IN pin of the transceiver U2 is connected to terminal 3 of port J1; the T1OUT pin of the transceiver U2 is connected to terminal 4 of port J1; the GND pin of the transceiver U2 is grounded; the VCC pin of the transceiver U2 is connected to one end of the capacitor C6 and to the second power supply, and the other end of the capacitor C6 is grounded.

5. The circuit according to claim 1, wherein: The CAN communication circuit includes a transceiver U3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C9 and a port P1: The TXD pin of the transceiver U3 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the PA12 / CAN_TX pin of the microcontroller U7; the GND pin of the transceiver U3 is grounded; the VCC pin of the transceiver U3 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the second power supply, and the VCC pin is also connected to one end of the capacitor C9, and the other end of the capacitor C9 is grounded; the RXD pin of the transceiver U3 is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the PA11 / CAN_RX pin of the microcontroller U7 pin; the EN pin of the transceiver U3 is connected to one end of the resistor R11, and the other end of the resistor R11 is connected to the second power supply; the CANL pin of the transceiver U3 is connected to one end of the resistor R9, and the other end of the resistor R9 is connected to terminal 2 of port P1; the CANH pin of the transceiver U3 is connected to one end of the resistor R7, and the other end of the resistor R7 is connected to terminal 1 of port P1; a resistor R8 is also connected in parallel between the CANL pin and the CANH pin; the RS pin of the transceiver U3 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded.

6. The circuit according to claim 1, wherein: It also includes a Hall sensor: the Hall sensor is connected to the stepper motor main shaft through a coupling or a coaxial device; the Hall sensor is electrically connected to the single-chip microcomputer; and the Hall sensor is connected to the second power supply.

7. The circuit according to claim 1, wherein: It also includes an optical power feedback circuit, which is set at the optical path output end of the adjustable optical attenuator, including an operational amplifier U4, a resistor R12, a resistor R13, a capacitor C10, a capacitor C11 and a photoelectric probe PD: The OUTA pin, INA- pin, INA+ pin, GND pin and INB+ pin of the operational amplifier U4 are all grounded; the capacitor C11 and the resistor R13 are connected in parallel between the INB+ pin and the INB- pin of the operational amplifier U4; the INB- pin is also connected to pin 2 of the photoelectric probe PD; pin 1 of the photoelectric probe PD is grounded; pin 3 of the photoelectric probe PD is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the VCC pin of the operational amplifier U4; the capacitor C10 is connected between the VCC pin and ground; the OUTB pin of the operational amplifier U4 is connected to the PC3 / ADC12_IN9 pin of the microcontroller U7.

8. The circuit according to claim 1, wherein: The main control circuit also includes a power-on protection circuit, specifically including: a terminal P2, a polarity capacitor E2, a polarity capacitor E3, a capacitor C27, a capacitor C28, a resistor R19, a common mode filter L1, a fuse F1, a Schottky diode D1 and a light-emitting diode D2: Terminal 1 of the wiring terminal P2 is connected to an external power supply and connected to one end of a capacitor C27, and the other end of the capacitor C27 is connected to a protective neutral line; Terminal 1 of the wiring terminal P2 is also connected to one end of a fuse F1, and the other end of the fuse F1 is connected to pin 1 of a common-mode filter L1; Terminal 2 of the wiring terminal P2 is connected to an external ground, connected to one end of a capacitor C28, and the other end of the capacitor C28 is connected to a protective neutral line; the positive electrode of the polarity capacitor E2 is connected to terminal 1 of the wiring terminal P2, and the negative electrode of the polarity capacitor E2 is connected to terminal 2 of the wiring terminal P2; the wiring terminal Terminal No. 2 of sub-P2 is also connected to pin No. 2 of the common-mode filter L1; the cathode of the Schottky diode D1 is connected to pin No. 1 of the common-mode filter L1, and the anode of the Schottky diode D1 is connected to pin No. 2 of the common-mode filter L1; pin No. 3 of the common-mode filter L1 is connected to one end of the resistor R19, and the other end of the resistor R19 is connected to the anode of the light-emitting diode D2, and the cathode of the light-emitting diode D2 is grounded; the anode of the polar capacitor E3 is connected to pin No. 3 of the common-mode filter L1, and the cathode of the polar capacitor E3 is connected to pin No. 4 of the common-mode filter L1; pin No. 4 of the common-mode filter L1 is grounded.

9. The circuit according to claim 1, wherein: The main control circuit also includes a download port circuit, specifically including: port P3; terminal No. 3 of the port P3 is connected to the second power supply; terminal No. 5 and terminal No. 7 of the port P3 are grounded; terminal No. 9 and terminal No. 6 of the port P3 are connected to the PA14 / SWCLK pin of the microcontroller U7; terminal No. 13 of the port P3 is connected to the PA9 pin of the microcontroller U7; terminal No. 14 of the port P3 is connected to the PA10 pin of the microcontroller U7; terminal No. 10 of the port P3 is connected to the PA15 / JDTI pin of the microcontroller U7; terminal No. 8 of the port P3 is connected to the PB3 / JTDO pin of the microcontroller U7; terminal No. 4 of the port P3 is connected to the PA13 / SWDIO pin of the microcontroller U7.

10. The circuit according to claim 1, wherein: The external power supply is a +12V power supply; the first power supply is a +5V power supply; and the second power supply is a +3.3V power supply.