Mask public plate structure and mask plate graph structure

Abstract

The utility model relates to the field of integrated circuits, in particular to a mask public plate structure and a mask plate graph structure. The mask male plate structure comprises a blank exposure area used for designing an exposure pattern; and the peripheral area surrounds the exposure area and is provided with a plurality of peripheral common patterns. The blank exposure area and the peripheral area of the mask public plate structure are designed, so that when a mask plate layout of each product is specifically arranged, an exposure pattern is designed in the blank exposure area on the basis of the mask public plate structure, and the mask plate preparation efficiency is effectively improved. In the mask layout, any one of the exposure pattern and the peripheral shared pattern does not occupy the area of the other one, so that the number of design modification times of the mask is reduced, and the preparation efficiency of the mask is further improved. Due to the fact that the position of the exposure area is determined, when the mask pattern structure is designed, the mask pattern structure can be obtained only by arranging the sub-exposure patterns, the number of times of design modification of the mask is reduced, and the mask preparation efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a mask master structure and a mask layout structure. Background Art

[0002] A mask is a pattern master commonly used in photolithography. The mask has multiple patterns on it, and the photolithography process transfers the patterns on the mask to the product substrate through processes such as exposure.

[0003] Conventional technology requires designing a unique mask layout for each photolithography product, as the size and pattern vary. This design process then generates a reticle based on the design. This process requires repeated adjustments based on the dimensional parameters of each photolithography product, which reduces reticle production efficiency. Utility Model Content

[0004] Based on this, it is necessary to provide a mask master structure and a mask layout structure to address the problem of low mask preparation efficiency in the prior art.

[0005] In order to achieve the above objectives, a mask master structure is provided, comprising:

[0006] Blank exposure area, used for designing exposure patterns;

[0007] The peripheral area surrounds the exposure area and is provided with a plurality of peripheral common patterns.

[0008] In one embodiment, the peripheral common graphics include:

[0009] a marking pattern, the marking pattern being distributed around the exposure area;

[0010] The measurement pattern is located between the mark pattern and the exposure area. The measurement pattern includes a plurality of measurement sub-patterns, and at least part of the measurement sub-patterns extends along a preset direction.

[0011] In one embodiment, the measurement pattern includes a plurality of critical dimension measurement bars and / or a plurality of electrical property measurement keys, and the plurality of critical dimension measurement bars and / or the plurality of electrical property measurement keys are located on both sides of the blank exposure area.

[0012] In one embodiment, the peripheral area includes:

[0013] The repeated exposure blocking area is located at the edge of the peripheral area, and the peripheral common pattern is located between the repeated exposure blocking area and the exposure area.

[0014] In one embodiment, the repeated exposure blocking area is L-shaped.

[0015] In one embodiment, the peripheral area further comprises:

[0016] A dummy exposure pattern is located between adjacent peripheral common patterns.

[0017] In one embodiment, the peripheral area includes multiple sub-areas, and the dummy exposure pattern is set in a sub-area where the pattern density is lower than a preset value, and the pattern density is the area ratio of the peripheral common pattern in each sub-area to the sub-area.

[0018] On the other hand, a mask layout structure is also provided, including:

[0019] The mask master structure as described in any of the aforementioned embodiments;

[0020] The exposure pattern is located in the exposure area.

[0021] In one embodiment, the exposure pattern includes a plurality of sub-exposure patterns, the plurality of sub-exposure patterns have the same size, and the plurality of sub-exposure patterns are arranged in an array.

[0022] In one embodiment, the exposure pattern includes a plurality of sub-exposure patterns, the sizes of the plurality of sub-exposure patterns are inconsistent, and the plurality of sub-exposure patterns are arranged in a preset manner.

[0023] The mask master structure and mask layout structure of this application have the following beneficial effects: by designing the blank exposure area and peripheral area of ​​the mask master structure, when setting up the mask layout for each product, the exposure pattern can be designed in the blank exposure area based on the mask master structure, thereby effectively improving the efficiency of mask production. At the same time, within the mask layout, neither the exposure pattern nor the peripheral shared pattern will occupy the area of ​​the other, thereby reducing the number of mask design modifications and further improving the efficiency of mask production. Because the position of the exposure area is already determined, when designing the mask layout structure, it is only necessary to arrange the sub-exposure patterns to obtain the mask layout structure, reducing the number of mask design modifications and improving the efficiency of mask production. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1is a schematic diagram of a mask master structure provided in one embodiment;

[0026] Figure 2 A schematic diagram of a mask master structure provided in another embodiment;

[0027] Figure 3 is a schematic diagram of a mask master structure provided in yet another embodiment;

[0028] Figure 4 is a schematic diagram of a sub-exposure pattern provided in one embodiment;

[0029] Figure 5 FIG. 1 is a schematic diagram of a sub-exposure pattern provided in another embodiment.

[0030] Explanation of reference numerals: mask master structure 100 ; exposure area 110 ; sub-exposure pattern 111 ; peripheral area 120 ; marking pattern 121 ; measurement pattern 122 ; repeated exposure blocking area 123 ; first pattern 1231 ; second pattern 1232 ; dummy exposure pattern 124 .

[0031] In order to better describe and illustrate the embodiments and / or examples of the utility model of this specification, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered to limit the scope of any of the utility models of this specification, the embodiments and / or examples currently described, and the best mode of these utility models currently understood. DETAILED DESCRIPTION

[0032] To facilitate understanding of the present application, a more comprehensive description of the present application will be provided below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0034] In each embodiment, unless otherwise specified or limited, the terms "installed," "connected," "connected," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two elements, or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in each embodiment based on the specific circumstances.

[0035] It should be understood that when an element or layer is referred to as being "on," "adjacent to," or "connected to" another element or layer, it can be directly on, adjacent to, or connected to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," or "directly connected to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present embodiments, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part.

[0036] Spatially relative terms such as "below," "beneath," "beneath," "above," "above," etc., may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, an element or feature described as "below" or "beneath" or "beneath" the other elements will be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "below" can include both the above and below orientations. In addition, the device can also include alternative orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0037] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "comprising" and / or "including" are used in this specification, they may specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0038] While embodiments are described herein with reference to schematic diagrams that represent idealized embodiments (and intermediate structures) of the present disclosure, variations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Thus, embodiments of the present disclosure should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes due to, for example, manufacturing techniques. The regions shown in the figures are schematic in nature, and their shapes do not represent actual shapes of regions of a device and do not limit the scope of the present disclosure.

[0039] See also Figure 1 This embodiment provides a mask template structure 100. It is understood that the mask template structure 100 can be a universal design version of a mask. The mask template structure 100 provided in this embodiment includes a blank exposure area 110 and a peripheral area 120.

[0040] The blank exposure area 110 is used to design an exposure pattern. The exposure area 110 in the mask template structure 100 may not have an exposure pattern, and the blank exposure area 110 may only serve as a reserved area.

[0041] The blank exposure area 110 is located in the center of the mask template structure 100. In one example, the blank exposure area 110 can be arranged symmetrically about the center line of the mask template structure 100. In another example, the blank exposure area 110 can be offset to one side of the mask template structure 100.

[0042] Peripheral region 120 surrounds exposure region 110. Peripheral region 120 is provided with a plurality of peripheral common patterns. For example, the peripheral common patterns may be patterns commonly used in photolithography processes. For example, the peripheral common patterns may include at least a mark cell pattern 121 and a measurement pattern 122.

[0043] This embodiment does not impose specific restrictions on the size of the mask public structure 100, the size of the blank exposure area 110, and the size of the peripheral area 120. For example, the size of the mask public structure 100 can be 25.5mm*32.5mm, the blank exposure area 110 can be located at the center of the mask public structure 100 and the size of the blank exposure area 110 can be 20mm*25mm, and the remaining area is the peripheral area 120. The area ratio of the peripheral area 120 and the exposure area 110 can be within a preset range. For example, the area ratio of the blank exposure area 110 and the peripheral area 120 in the mask public structure 100 can be 7:3, or 2:8, etc. The above data are only for example. In actual embodiments, the size of the mask public structure 100, the size of the blank exposure area 110, and the size of the peripheral area 120 are not limited to the above data.

[0044] In this embodiment, by designing the blank exposure area 110 and peripheral area 120 of the mask master structure 100, when setting up the reticle layout for each product, the exposure pattern can be designed in the blank exposure area 110 based on the mask master structure 100, effectively improving reticle production efficiency. Furthermore, within the reticle layout, neither the exposure pattern nor the peripheral shared pattern occupies the area of ​​the other, thereby reducing the number of reticle design revisions and further improving reticle production efficiency.

[0045] In one embodiment, see Figure 2 and Figure 3 , the peripheral common graphics include a marking graphic 121 and a measurement graphic 122 .

[0046] Marking pattern 121 is located at the edge of peripheral region 120. Marking pattern 121 is used to locate the specific position of the reticle. For example, marking pattern 121 can be used to determine whether the exposure pattern on the reticle is aligned with the target position on the wafer, thereby ensuring that the exposure pattern is accurately transferred to the wafer, thereby achieving high-precision manufacturing.

[0047] In one example, the marking pattern 121 is distributed around the blank exposure area 110, thereby more accurately positioning the reticle. In another example, the marking pattern 121 can also be distributed on three or two sides of the blank exposure area 110, thereby saving the area of ​​the peripheral area 120. In yet another example, the marking pattern 121 can include multiple marking sub-patterns. One edge of the peripheral area 120 can have multiple marking sub-patterns, and the multiple marking sub-patterns can be arranged in parallel. Each marking sub-pattern can include multiple groove patterns, or circular patterns, etc.

[0048] Measurement pattern 122 is used to measure the exposure pattern. In one example, measurement pattern 122 is located between marking pattern 121 and the blank exposure area 110, facilitating accurate measurement of the exposure pattern. In another example, measurement pattern 122 can also be located at the edge of peripheral area 120 to balance the light transmittance of peripheral area 120.

[0049] The measurement pattern 122 may include multiple measurement sub-patterns. Multiple measurement sub-patterns may be located on the same side of the edge of the peripheral region 120. These multiple measurement sub-patterns may extend along a predetermined direction, thereby reducing the difficulty of arranging the measurement pattern 122. As an example, the predetermined direction may be the direction in which the mask extends.

[0050] Illustratively, measurement pattern 122 includes multiple critical dimension measurement bars (Cdbars) and / or multiple electrical property measurement keys (TSKs). The Cdbars can be used to measure the precise dimensions of the exposed pattern, further determining whether the exposed pattern meets requirements, thereby monitoring and ensuring the pattern transfer accuracy of the mask. If the measurement results indicate that the exposed pattern does not meet requirements, it may indicate a problem with the photolithography process (e.g., film thickness), requiring adjustment or improvement. The electrical property measurement keys can be used to test the electrical properties (such as resistance and capacitance) of the exposed pattern.

[0051] Multiple critical dimension measurement bars and / or multiple electrical property measurement keys may be located on both sides of the blank exposure area 110. In one example, multiple critical dimension measurement bars may be located on both sides of the blank exposure area 110. In another example, multiple electrical property measurement keys may be located on both sides of the blank exposure area 110. In yet another example, the critical dimension measurement bars and electrical property measurement keys may be located on both sides of the blank exposure area 110, respectively.

[0052] Furthermore, multiple CD measurement bars and / or electrical measurement keys can be positioned around the exposure area 110 to monitor the consistency of the photolithography process. For example, electrical measurement keys can be positioned around the exposure area 110. By comparing the electrical characteristics of the electrical measurement keys in different regions, the stability of the photolithography process can be determined, allowing timely adjustment of photolithography process parameters to ensure the quality of the resulting lithography product. Similarly, CD measurement bars can be positioned around the exposure area 110. By comparing the measurement results of the CD measurement bars in different regions with the exposure pattern, it can be determined whether the photolithography process meets requirements.

[0053] This embodiment does not impose any specific restrictions on the size of the marking pattern 121, the size of the measurement pattern 122, or the area ratio of the marking pattern 121 and the measurement pattern 122 in the peripheral area 120. As an example, the area ratio of the marking pattern 121 and the measurement pattern 122 in the peripheral area 120 can be 1:1.

[0054] In this embodiment, by determining the positions of the marking pattern 121 and the measurement pattern 122 , the design efficiency of the marking pattern 121 and the measurement pattern 122 is improved, thereby improving the mask manufacturing efficiency.

[0055] In one embodiment, see Figure 3 , the peripheral area 120 includes a repeated exposure blocking area 123 (Block).

[0056] The repeated exposure blocking area 123 is located at the edge of the peripheral area 120. The repeated exposure blocking area 123 is used to block the repeated exposure of the mask. The peripheral common pattern can be located between the repeated exposure blocking area 123 and the blank exposure area 110. As an example, when a mask is used to continuously expose adjacent areas on a film layer, the adjacent portions of the adjacent areas may be repeatedly exposed, and overexposure may cause distortion or damage to the pattern. At this time, if the repeated exposure blocking area 123 is set at the edge of the peripheral area 120, when the mask is used to continuously expose adjacent areas, the adjacent portions of the adjacent areas can be exposed only once, thereby ensuring that the edges of the pattern are clear and the line thickness is consistent, thereby improving the accuracy and reliability of the lithography product.

[0057] In one example, the repeated exposure blocking area 123 can be L-shaped. For example, the repeated exposure blocking area 123 can include a first pattern 1231 and a second pattern 1232. The first pattern 1231 and the second pattern 1232 can be connected, or they can be spaced apart, so that the two together form an L-shape. The first pattern 1231 can be located on the short side of the mask template structure 100, and the second pattern 1232 can be located on the long side of the mask template structure 100, thereby facilitating movement of the mask in two mutually perpendicular directions. Furthermore, the second pattern 1232 can be set to be approximately the same length as the long side of the mask template structure 100, or the first pattern 1231 can be set to be approximately the same length as the short side of the mask template structure 100, thereby more completely blocking repeated exposure. In another example, the repeated exposure blocking area 123 can have other shapes. For example, the repeated exposure blocking area 123 can be in the shape of an "I" or the like.

[0058] In this embodiment, by setting a repeated exposure blocking area 123 in the mask public structure 100, that is, reserving the repeated exposure blocking area 123 when setting the peripheral common pattern, the mask preparation efficiency is improved and the probability of repeated exposure of adjacent areas of the film layer can also be reduced.

[0059] In one embodiment, see Figure 3 The peripheral area 120 is further provided with a dummy exposure pattern 124 (Dummy).

[0060] The dummy exposure pattern 124 is located between adjacent peripheral common patterns. The dummy exposure pattern 124 can fill the area outside the peripheral common pattern and the repeated exposure blocking area 123 in the peripheral area 120. It is understood that although the dummy exposure pattern 124 has a pattern, it may not have a substantial function.

[0061] Furthermore, the peripheral area may include multiple sub-areas. The dummy exposure pattern may be set in a sub-area where the pattern density is lower than a preset value. The pattern density can be the area ratio of the peripheral common pattern (marking pattern 121 and measurement pattern 122) within each sub-area. For example, when the pattern density of a first sub-area is lower than a preset value, the dummy exposure pattern 124 may be filled in the first sub-area. When the pattern density of a second sub-area is higher than or equal to the preset value, the dummy exposure pattern 124 may not be filled in the second sub-area. This embodiment does not impose specific restrictions on the area of ​​the sub-areas or the preset value. For example, the preset value may be between 10% and 50%.

[0062] In this embodiment, the dummy exposure pattern 124 can be placed in a region of the peripheral region 120 with lower pattern density, thereby increasing the transmittance of this region and ensuring a consistent pattern density across all subregions of the peripheral region 120. This allows light to pass through the reticle more evenly during the photolithography process and irradiate the film more evenly. This not only balances the reticle's transmittance but also reduces warping of the film surface.

[0063] In addition, the mask template structure 100 includes the peripheral area 120 and may further include overlay patterns, process control monitoring patterns, identification patterns, and wafer acceptance test patterns. As an example, these overlay patterns, process control monitoring patterns, identification patterns, and wafer acceptance test patterns may replace the aforementioned dummy exposure patterns 124 and repeated exposure blocking areas 123.

[0064] Based on the same concept, in one embodiment, a mask layout structure is provided, which includes the mask template structure 100 provided in any one or more of the aforementioned embodiments, and an exposure pattern, wherein the exposure pattern is located in an exposure area 110 (Shot Size).

[0065] The exposure pattern may be a pattern that requires effective exposure, for example, the exposure pattern may include a plurality of parallel grooves.

[0066] In an example, see Figure 4 The exposure pattern includes a plurality of sub-exposure patterns 111 , and the sizes of the plurality of sub-exposure patterns 111 are consistent. In this case, the plurality of sub-exposure patterns 111 can be arranged in an array.

[0067] In another example, see Figure 5, the sizes of the multiple sub-exposure patterns 111 are inconsistent, and the multiple sub-exposure patterns 111 are arranged in a preset manner. For example, after obtaining the block size of each sub-exposure pattern 111, the position requirement of each sub-exposure pattern 111 in the exposure area 110, and the requirement of each sub-exposure pattern 111 for adjacent sub-exposure patterns 111, a computer or other method can be used to calculate the arrangement of the multiple sub-exposure patterns 111 in the exposure area 110. Simultaneously, the utilization rate of each arrangement can be obtained. The arrangement with the highest utilization rate is then used as the preset arrangement. Of course, the preset arrangements are not limited to the arrangements shown in this example.

[0068] After obtaining the mask layout structure, the exposure pattern can be cut and processed, and then tapeout can be carried out in the mask factory. At this time, the mask can be made of materials such as quartz, glass, metal, and organic materials.

[0069] In addition, if the photolithography product has a special design for the mark pattern 121, the specially designed mark pattern 121 can be used to replace the mark pattern 121 in the peripheral cutting lanes of the mask public structure 100 to reduce the impact on the mask layout structure.

[0070] In this embodiment, since the position of the exposure area 110 has been determined, it is only necessary to arrange the sub-exposure patterns 111 to obtain the mask layout structure, which reduces the number of mask design modifications and improves the mask preparation efficiency.

[0071] In the description of this specification, the reference terms "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that "this embodiment" or "one embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment.

[0072] The technical features of the above-mentioned embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0073] The embodiments described above only express several implementation methods of the present application, and their descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that for ordinary technicians in this field, without departing from the concept of the present application, several variations and improvements can be made, which all fall within the scope of protection of the present application. Therefore, the scope of protection of the patent application of this application shall be based on the attached claims. The above description is only the preferred implementation method of the present application, and does not limit the scope of the patent application of this application. All equivalent structural transformations made by using the contents of the description and drawings of this application under the concept of this application, or direct / indirect application in other related technical fields are included in the scope of patent protection of this application.

Claims

1. A mask master structure, characterized in that: include: Blank exposure area, used to design exposure patterns; The peripheral area surrounds the exposure area and is provided with a plurality of peripheral common patterns.

2. The mask master structure according to claim 1, characterized in that: The peripheral common graphics include: a marking pattern, the marking pattern being distributed around the exposure area; The measurement pattern is located between the mark pattern and the exposure area. The measurement pattern includes a plurality of measurement sub-patterns, and at least part of the measurement sub-patterns extends along a preset direction.

3. The mask master structure according to claim 2, characterized in that: The measurement pattern includes a plurality of critical dimension measurement bars and / or a plurality of electrical property measurement keys, and the plurality of critical dimension measurement bars and / or the plurality of electrical property measurement keys are located on both sides of the exposure area.

4. The mask master structure according to claim 1, characterized in that: The peripheral area includes: The repeated exposure blocking area is located at the edge of the peripheral area, and the peripheral common pattern is located between the repeated exposure blocking area and the exposure area.

5. The mask master structure according to claim 4, characterized in that: The repeated exposure blocking area is L-shaped.

6. The mask master structure according to claim 1, characterized in that: The peripheral area also includes: A dummy exposure pattern is located between adjacent peripheral common patterns.

7. The mask master structure according to claim 6, characterized in that: The peripheral area includes a plurality of sub-areas, and the dummy exposure pattern is set in a sub-area where the pattern density is lower than a preset value. The pattern density is the area ratio of the peripheral common pattern in each sub-area to the sub-area.

8. A mask layout structure, characterized in that: include: The mask master structure according to any one of claims 1 to 7; The exposure pattern is located in the exposure area.

9. The mask layout structure according to claim 8, characterized in that: The exposure pattern includes a plurality of sub-exposure patterns, the plurality of sub-exposure patterns have the same size, and the plurality of sub-exposure patterns are arranged in an array.

10. The mask layout structure according to claim 8, characterized in that: The exposure pattern includes a plurality of sub-exposure patterns, the sizes of the plurality of sub-exposure patterns are inconsistent, and the plurality of sub-exposure patterns are arranged in a preset manner.

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