Automatic reset circuit and terminal equipment

Abstract

The utility model discloses an automatic reset circuit and a terminal device, the automatic reset circuit comprises a charging protection circuit, one end of a voltage-regulator tube TVS12NC is grounded, the other end of the voltage-regulator tube TVS12NC is connected with a switch tube VBUS, the voltage-regulator tube TVS12NC and the switch tube VBUS are simultaneously connected with one end of a thermistor PTC1, the other end of the thermistor PTC1 is connected with the charging protection circuit, and the other end of the thermistor PTC1 is connected with the charging protection circuit. The other end of the thermistor PTC1 is respectively connected with a capacitor C42, a capacitor C43 and a resistor R53 in series, the capacitor C42, the capacitor C43 and the resistor R53 are connected in parallel, and the other ends of the capacitor C42, the capacitor C43 and the resistor R53 are grounded; one end, connected with the thermistor PTC1, of the capacitor C43 is simultaneously connected with a voltage input end, and the Power Off and Power On processes of the MCU are realized through the process, so that the power On automatic reset of the MCU is also realized. According to the utility model, MCU resetting is automatically realized, and manual key pressing triggering is not needed.

Description

Technical Field

[0001] The utility model relates to the technical field of elderly products, in particular to an automatic resetting circuit and terminal equipment. Background Art

[0002] In daily life, we often encounter non-detachable electronic products with charging ports. When the MCU power-on timing is abnormal, the MCU cannot operate normally, resulting in the watchdog not being initialized normally. The watchdog cannot work normally, resulting in the MCU being unable to automatically reset the watchdog. When the MCU is struck by ESD and crashes, the watchdog circuit cannot work normally, which also results in the MCU being unable to automatically reset the watchdog. The currently used reset button must be an independent button, and a physical button must be reserved on the product appearance, which affects the product appearance. The reset button must usually be relatively hidden and not easily touched by users. However, when it is urgently needed, there is no metal rod to trigger the reset button. Moreover, the reset button must be triggered manually, and automatic reset without feeling is impossible. It is not convenient to use. For this reason, the utility model has designed a circuit that can automatically reset the MCU power on by charging. Utility Model Content

[0003] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and in the abstract and title of the utility model to avoid obscuring the purpose of this section, the abstract and the title of the utility model, and such simplifications or omissions shall not be used to limit the scope of the present invention.

[0004] In view of the above problems or problems existing in the prior art, the present utility model is proposed.

[0005] Therefore, the purpose of this utility model is to provide an automatic reset circuit and terminal device. 1. Automatically reset the MCU through normal user charging operation, eliminating the need for manual keystrokes. 2. By sharing the charging interface circuit, there is no need for an additional button on the product. The charging operation also automatically resets the MCU on power-on, preventing the watchdog from malfunctioning or the MCU from malfunctioning due to ESD.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions: an automatic reset circuit, which includes a charging protection circuit, one end of the voltage regulator tube TVS12NC is grounded, the other end of the voltage regulator tube TVS12NC is connected to the switch tube VBUS, the voltage regulator tube TVS12NC and the switch tube VBUS are simultaneously connected to one end of the thermistor PTC1, the other end of the thermistor PTC1 is respectively connected in series with the capacitor C42, the capacitor C43 and the resistor R53, and the capacitor C42, the capacitor C43 and the resistor R53 are connected in parallel, and at the same time, the other ends of the capacitor C42, the capacitor C43 and the resistor R53 are all connected to Ground; one end of the capacitor C43 connected to the thermistor PTC1 is also connected to the voltage input end, and the other end of the resistor R53 connected to the thermistor PTC1 is also connected to the voltage output end; one end of the thermistor PTC1 connected in parallel with the capacitor C42, the capacitor C43 and the resistor R53 is also connected to the VDD end of the step-down voltage regulator circuit. After the connection, the voltage regulator tube TVS12NC, the switching tube VBUS, the thermistor PTC1, the capacitor C42, the capacitor C43 and the resistor R53 form a charging protection circuit. By connecting the reset control circuit to the charging circuit, the reset control circuit is automatically triggered by the voltage of the charging circuit.

[0007] As a preferred solution of the automatic reset circuit described in the utility model, one end of the resistor R15 is connected to the 5V voltage of VBUS, and the other end of the resistor R15 is connected in series with the resistor R19, the other end of the resistor R19 is grounded, and one end of the capacitor C28 is connected between the resistor R15 and the resistor R19, the other end of the capacitor C28 is connected to the drain of the transistor Q1 and the resistor R20 at the same time, the other end of the resistor R20 is grounded, and the gate of the transistor Q1 is grounded.

[0008] As a preferred solution of the automatic reset circuit described in the utility model, the source of the transistor Q1 is connected in parallel with the output ends of the diode D1 and the output ends of the diode D2, the input end of the diode D2 is provided with an EN pin, the input end of the diode D1 is connected to one end of the resistor R14, and the other end of the resistor R14 is provided with a VDD interface. After the connection, the resistors R15, R19, R20, R14 and the capacitor C28 and the transistor Q1 and the diodes D1 and D2 form a reset control circuit.

[0009] As a preferred solution of the automatic reset circuit described in the utility model, when the external power supply is inserted through the Type-C 16P interface, VBUS reaches the specified voltage, and C28 is charged through R15 at the moment the specified voltage is powered on.

[0010] As a preferred solution of the automatic reset circuit described in the present invention, when the voltage on C28 rises to a level capable of turning on transistor Q1, both D1 and D2 are turned on to GND, and the voltages at VDD and EN points are both pulled down below the threshold.

[0011] As a preferred solution of the automatic reset circuit described in the present invention, when VDD is pulled down below the threshold, it is equivalent to pulling down the power supply of the subsequent MCU below the threshold, so that the MCU enters the Power Off state, and EN is pulled down below the threshold.

[0012] As a preferred solution of the automatic reset circuit described in the utility model, when the voltage across C28 no longer changes, a DC voltage is applied across C28, and the voltage on C28 is discharged through R20. When the voltage between C28 and Q1 is too low to turn on Q1, the VDD and EN pins resume output.

[0013] In addition, a terminal device is also provided, comprising the automatic reset circuit as described above.

[0014] The beneficial effects of this utility model are as follows: When an external power supply is inserted through the Type-C 16P interface, VBUS reaches a specified voltage. The specified voltage is immediately charged through R15, and when the voltage on C28 rises to a level sufficient to turn on transistor Q1, both D1 and D2 are connected to GND, at which point the voltages at both VDD and EN are pulled below a threshold. The specified VBUS voltage is 5V. Pulling VDD below the threshold effectively pulls the power supply to the subsequent MCU below the threshold, causing the MCU to enter the Power Off state. Pulling EN below the threshold prohibits the CE6232B33M chip from continuously inputting 3.3V. When the voltage across C28 no longer changes, a DC voltage is applied across C28, and the voltage on C28 is discharged through R20. When the voltage between C28 and Q1 drops too low to turn on Q1, the VDD and EN pins resume output. The EN pin is pulled high by R16, and the MCU enters the Power On state. In the above process, the duration of the VDD and EN output low levels can be changed by adjusting the values ​​of C28 and R20 to meet the reset timing requirements of different MCUs. This process implements the MCU's power off and power on processes, thus also achieving automatic reset when the MCU is powered on. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without inventive work. Among them:

[0016] Figure 1 Schematic diagram of a charging protection circuit with automatic reset.

[0017] Figure 2 This is a reset control circuit control diagram for an automatic reset circuit.

[0018] Figure 3 Schematic diagram of a step-down voltage regulator circuit with automatic reset.

[0019] Figure 4 Schematic diagram of the charging interface circuit for the automatic reset circuit. DETAILED DESCRIPTION

[0020] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below with reference to the accompanying drawings.

[0021] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0022] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0023] Example 1

[0024] This embodiment provides an automatic reset circuit, such as Figure 1 and Figure 2 As shown, it includes: on the one hand, one end of the voltage regulator tube TVS12NC is grounded, the other end of the voltage regulator tube TVS12NC is connected to the switching tube VBUS, the voltage regulator tube TVS12NC and the switching tube VBUS are simultaneously connected to one end of the thermistor PTC1, the other end of the thermistor PTC1 is respectively connected in series with the capacitor C42, the capacitor C43 and the resistor R53, and the capacitor C42, the capacitor C43 and the resistor R53 are connected in parallel, and at the same time, the other ends of the capacitor C42, the capacitor C43 and the resistor R53 are all grounded; the end of the capacitor C43 connected to the thermistor PTC1 is simultaneously connected to the voltage input end, and the end of the resistor R53 connected to the thermistor PTC1 is simultaneously connected to the voltage output end; the end of the thermistor PTC1 connected in parallel with the capacitor C42, the capacitor C43 and the resistor R53 is also connected to the VDD end of the step-down voltage regulator circuit.

[0025] The capacitor C42 has a value of 10 μF, the capacitor C43 has a value of 0.1 μF, and the resistor R53 has a value of 2 KΩ.

[0026] Through the above solution, after connection, the voltage regulator tube TVS12NC, the switching tube VBUS, the thermistor PTC1, the capacitor C42, the capacitor C43, and the resistor R53 form a charging protection circuit.

[0027] After the voltage regulator TVS2NC is connected in parallel with the capacitors C23, C24 and the resistor R16, it is finally connected in series with the Vi interface of the CE6232B33M chip. One end of the resistor R16 is connected to the Vi interface, while the other end of the resistor R16 is connected to the CE interface of the CE6232B33M chip. The end of the resistor R16 connected to the CE interface is also connected to the capacitor C29, and the other end of the capacitor C29 is grounded. The end of the resistor R16 connected to the CE interface is also reserved with an EN pin.

[0028] Reference Figure 3 At the same time, a VCC interface is provided at one end of the capacitor C23 connected to the CE6232B33M chip.

[0029] The interface of the CE6232B33M chip is connected in parallel with capacitors C25, C26, C27, and C22. At the same time, a VDD interface is provided at the connection end with capacitor C25. The other ends of capacitors C25, C26, C27, and C22 are all grounded, and the non-grounded end of capacitor C22 is provided with port TP9.

[0030] Through the above connection, the CE6232B33M chip, the voltage regulator diode TVS2NC, the capacitors C23 and C24, the resistor R16, and the capacitors C25, C26, C27, and C22 form a step-down voltage regulator circuit.

[0031] The capacitors C25, C26 and C27 are all 47 μF in size, and the capacitor C22 is 0.1 μF in size.

[0032] One end of resistor R15 is connected to the 5V voltage of VBUS, and the other end of resistor R15 is connected in series with resistor R19. The other end of resistor R19 is grounded. One end of capacitor C28 is connected between resistor R15 and resistor R19. The other end of capacitor C28 is connected to the drain of transistor Q1 and resistor R20 at the same time. The other end of resistor R20 is grounded. The gate of transistor Q1 is grounded. The source of transistor Q1 is connected in parallel with the output ends of diode D1 and diode D2. The input end of diode D2 is provided with an EN pin. The input end of diode D1 is connected to one end of resistor R14. The other end of resistor R14 is provided with a VDD interface.

[0033] The size of C28 is 2.2μF, the size of R19 is 1MΩ, the size of R15 is 51KΩ, the transistor Q1 model is SI2302, the size of R14 is 2KΩ, and the size of R20 is 330KΩ.

[0034] Through the above solution, after connection, the resistors R15, R19, R20, R14, the capacitor C28, the transistor Q1, and the diodes D1, D2 form a reset control circuit.

[0035] Working principle:

[0036] Reference Figures 1 to 4 When the external power supply is inserted through the Type-C 16P interface, VBUS reaches the specified voltage. The specified voltage is charged through R15 at the moment of power-on. When the voltage on C28 rises to a level that can turn on transistor Q1, D1 and D2 are both turned on to GND. At this time, the voltages of VDD and EN points are both pulled down below the threshold, and the VBUS specified voltage is 5V.

[0037] Pulling VDD below the threshold is equivalent to pulling the power supply of the subsequent MCU below the threshold, causing the MCU to enter the PowerOff state. Pulling EN below the threshold prohibits the CE6232B33M chip from continuously inputting 3.3V.

[0038] When the voltage across C28 no longer changes, a DC voltage is present across C28, and the voltage on C28 is discharged through R20. When the voltage between C28 and Q1 is too low to turn on Q1, the VDD and EN pins resume output. The EN pin is pulled up to a high level by R16, and the MCU enters the Power on state.

[0039] In the above process, the duration of VDD and EN outputting low levels can be changed by adjusting the values ​​of C28 and R20 to meet the reset timing requirements of different MCUs.

[0040] After the above process, the MCU's Power Off and Power On process is realized, and thus the MCU Power On automatic reset is also realized.

[0041] In summary, the utility model connects the reset control circuit to the charging circuit, and automatically triggers the reset control circuit through the voltage of the charging circuit, thereby achieving the purpose of automatic resetting while charging. Since the reset is automatically controlled by the circuit, no additional physical buttons are required, no manual participation is required, and it does not rely on the watchdog provided by the MCU. Therefore, when the MCU and the watchdog cannot work, reset can also be achieved through the external charging circuit.

[0042] The "CE interface" described in this application specifically refers to the CE interface of the CE6232B33M chip. The "threshold" described in this application specifically refers to 1V.

[0043] The number and value of the devices described here are used to simplify the description of the present invention. It is obvious to those skilled in the art that the present invention is suitable for different lengths, numbers and circuit applications and improvements.

[0044] In this embodiment, the size, height and spacing of the resistors, capacitors, diodes and transistors in the drawings are for illustration only. The length, thickness and shell thickness of the lines in the drawings of this application are for illustration only. Those skilled in the art will make adaptive adjustments based on actual usage.

[0045] This CE6232B33M chip is an existing conventional device and conventional equipment. Those skilled in the art can select appropriate devices and equipment according to the above description to achieve "ultimately being connected in series with the Vi interface of the CE6232B33M chip, wherein one end of the resistor R16 is connected to the Vi interface, and the other end of the resistor R16 is connected to the CE interface of the CE6232B33M chip."

[0046] This port TP9 is an existing conventional device and conventional equipment. Those skilled in the art can select appropriate devices and equipment according to the above description to implement "the non-grounded end of the capacitor C22 is provided with the port TP9".

[0047] This voltage input terminal is an existing conventional device and conventional equipment. Those skilled in the art can select appropriate devices and equipment according to the above description to realize that "one end of the capacitor C43 connected to the thermistor PTC1 is simultaneously connected to the voltage input terminal", and "VBUS voltage is 5V" is used in conjunction with the voltage input terminal.

[0048] This Type-C 16P interface is an existing conventional device and equipment. Those skilled in the art can select appropriate devices and equipment based on the above description to implement "when an external power supply is inserted through the Type-C 16P interface, VBUS reaches a specified voltage, and the specified voltage is instantly powered on to charge C28 through R15. When the voltage on C28 rises to a level that can turn on transistor Q1, both D1 and D2 are turned on to GND."

[0049] In summary, when an external power source is plugged in via the Type-C 16P port, VBUS reaches the specified voltage. The instant power is applied, C28 is charged through R15. When the voltage on C28 rises to a level sufficient to turn on transistor Q1, both D1 and D2 are connected to GND, pulling the voltages at both VDD and EN below their thresholds. The specified VBUS voltage is 5V. Pulling VDD below the threshold effectively pulls the power supply to the underlying MCU below the threshold, causing the MCU to enter the Power Off state. Pulling EN below the threshold prohibits the CE6232B33M chip from continuously inputting 3.3V. When the voltage across C28 stabilizes, a DC voltage is applied across C28, discharging the voltage across C28 through R20. When the voltage between C28 and Q1 drops too low to turn on Q1, the VDD and EN pins resume output. The EN pin is pulled high by R16, and the MCU enters the Power On state. In the above process, the duration of the VDD and EN output low levels can be changed by adjusting the values ​​of C28 and R20 to meet the reset timing requirements of different MCUs. This process implements the MCU's power-off and power-on processes, thereby also achieving automatic MCU reset during power-on. This ensures that the user automatically resets the MCU through normal charging operations without the need for manual button triggering. By sharing the charging interface circuit, there is no need to reserve an additional button on the product appearance. The automatic power-on reset is also achieved during the charging operation, preventing the watchdog from malfunctioning or the MCU from malfunctioning due to ESD.

[0050] It is important to note that the construction and arrangement of the present application shown in a number of different exemplary embodiments are merely illustrative. Although only a few embodiments are described in detail in this disclosure, it should be readily understood by those who refer to this disclosure that many modifications are possible (e.g., the size, scale, structure, shape and proportion of various elements, and parameter values ​​(e.g., temperature, pressure, etc.), mounting arrangements, use of materials, colors, directional changes, etc.) without departing substantially from the novel teachings and advantages of the subject matter described in this application. For example, an element shown as integrally formed may be composed of multiple parts or elements, the position of the element may be inverted or otherwise changed, and the nature or number or position of the discrete elements may be altered or changed. Therefore, all such modifications are intended to be included within the scope of the present invention. The order or sequence of any process or method steps may be changed or reordered according to alternative embodiments. In the claims, any "means plus function" clause is intended to cover the structure of performing the function described herein, and is not only structurally equivalent but also an equivalent structure. Without departing from the scope of the present invention, other substitutions, modifications, changes and omissions may be made in the design, operating conditions and arrangement of the exemplary embodiments. Therefore, the present invention is not limited to the specific embodiments, but extends to various modifications that still fall within the scope of the appended claims.

[0051] In addition, a terminal device is also provided, comprising the automatic reset circuit as described above.

[0052] Additionally, in order to provide a concise description of example embodiments, all features of an actual embodiment (ie, those features that are not relevant to the best mode presently contemplated for carrying out the invention or those that are not relevant to implementing the invention) may not be described.

[0053] It will be appreciated that in the development of any actual embodiment, as in any engineering or design project, numerous implementation-specific decisions may be made. Such a development effort may be complex and time-consuming, but will, for those of ordinary skill having the benefit of this disclosure, be a routine undertaking of design, fabrication, and production without undue experimentation.

[0054] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, and all of these should be included in the scope of the claims of the present invention.

Claims

1. An automatic reset circuit, characterized in that: The invention comprises a charging protection circuit, wherein one end of the voltage regulator tube TVS12NC is grounded, the other end of the voltage regulator tube TVS12NC is connected to the switch tube VBUS, the voltage regulator tube TVS12NC and the switch tube VBUS are simultaneously connected to one end of the thermistor PTC1, the other end of the thermistor PTC1 is respectively connected in series with the capacitor C42, the capacitor C43 and the resistor R53, and the capacitor C42, the capacitor C43 and the resistor R53 are connected in parallel, and the other ends of the capacitor C42, the capacitor C43 and the resistor R53 are all grounded; the capacitor C43 and the thermistor PTC1 are connected in series with the capacitor C42, the capacitor C43 and the resistor R53. One end of the thermistor PTC1 is connected to the voltage input end at the same time, and the end of the resistor R53 connected to the thermistor PTC1 is connected to the voltage output end at the same time; one end of the thermistor PTC1 connected in parallel with the capacitor C42, the capacitor C43 and the resistor R53 is also connected to the VDD end of the step-down voltage stabilization circuit. After the connection, the voltage regulator tube TVS12NC, the switch tube VBUS, the thermistor PTC1, the capacitor C42, the capacitor C43 and the resistor R53 form the charging protection circuit, and the charging protection circuit can trigger the reset control circuit.

2. The automatic reset circuit according to claim 1, wherein: One end of resistor R15 is connected to the 5V voltage of VBUS, and the other end of resistor R15 is connected in series with resistor R19. The other end of resistor R19 is grounded. One end of capacitor C28 is connected between resistor R15 and resistor R19. The other end of capacitor C28 is connected to the drain of transistor Q1 and resistor R20 at the same time. The other end of resistor R20 is grounded, and the gate of transistor Q1 is grounded.

3. The automatic reset circuit according to claim 2, wherein: The source of transistor Q1 is connected in parallel with the output ends of diode D1 and diode D2. The input end of diode D2 is provided with an EN pin. The input end of diode D1 is connected to one end of resistor R14. The other end of resistor R14 is provided with a VDD interface. After the connection, resistors R15, R19, R20, R14 and capacitor C28 and transistor Q1 and diodes D1 and D2 form a reset control circuit.

4. The automatic reset circuit according to claim 3, wherein: When the external power supply is inserted through the Type-C 16P interface, VBUS reaches the specified voltage, and C28 is charged through R15 at the moment the specified voltage is powered on.

5. The automatic reset circuit according to claim 4, wherein: When the voltage on C28 rises to a level that can turn on transistor Q1, both D1 and D2 are turned on to GND. At this time, the voltages at VDD and EN points are both pulled below the threshold.

6. The automatic reset circuit according to claim 5, characterized in that: Pulling VDD below the threshold is equivalent to pulling the power supply of the subsequent MCU below the threshold, causing the MCU to enter the Power Off state and EN to be pulled below the threshold.

7. The automatic reset circuit according to claim 6, wherein: When the voltage across C28 no longer changes, there is a DC voltage across C28, and the voltage on C28 is discharged through R20. When the voltage between C28 and Q1 is too low to turn on Q1, the VDD and EN pins resume output.

8. A terminal device, characterized in that: A circuit comprising the automatic reset according to any one of claims 1 to 7.

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