Thyristor dynamic test gate anti-interference device
By introducing anti-interference devices into the dynamic test of thyristors and using components such as solid-state relays and voltage regulators to suppress interference signals, the problem of abnormal test results was solved and more accurate test results were achieved.
Patent Information
- Application Number
- CN202422075120.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2034-08-26
AI Technical Summary
In the thyristor dynamic parameter turn-off time test, the interference signal influence leads to abnormal test results and poor accuracy, requiring multiple tests.
A thyristor gate anti-interference device for dynamic testing is designed, including components such as X01, X02, and X03 terminals, C1 capacitor, E1 solid-state relay, V1 and V2 voltage regulator diodes, and R1 and R2 resistors. By connecting them in series to the gate trigger circuit of the original device, interference signals can be suppressed and test accuracy can be improved.
The accuracy of thyristor dynamic parameter turn-off time test is significantly improved, and the test error caused by interference is reduced without changing the original equipment structure.
Smart Images
Figure CN223346992U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the field of electronic industry, and in particular relates to a thyristor dynamic parameter testing technology. Background Art
[0002] In the thyristor dynamic parameter turn-off time (tq) test, the influence of interference signals can easily cause the final test parameter results to be abnormal, resulting in the test structure being far greater than the actual parameters of the device itself, resulting in poor test accuracy and the need for multiple tests. Utility Model Content
[0003] To solve the above problems, the present invention provides a thyristor dynamic test gate anti-interference device. Connecting the device in series without changing the original equipment can significantly improve the thyristor gate test anti-interference capability.
[0004] The technical solution of the utility model is: a thyristor dynamic test gate anti-interference device, comprising an X01 input terminal, an X02 input terminal, an X03 output terminal and a C1 capacitor, one end of the C1 capacitor is connected to the X01 input terminal, and is characterized in that: the X01 input terminal is also connected to an E1 solid-state relay and a V1 voltage regulator tube, the V1 voltage regulator tube is connected to a V2 voltage regulator tube, the V1 voltage regulator tube and the V2 voltage regulator tube are connected in series, the positive electrode of the V2 voltage regulator tube is connected to the E1 solid-state relay, the other end of the C1 capacitor is connected to the X02 input terminal, the C1 capacitor is simultaneously connected to an R1 resistor and an R2 resistor, the other ends of the R1 resistor and the R2 resistor are connected to the E1 solid-state relay, the R2 resistor is connected to a V3 fast recovery rectifier diode, and the negative electrode of the V3 fast recovery rectifier diode is connected to the X03 output terminal.
[0005] Furthermore, the E1 solid-state relay is provided with a first pin, a second pin, a third pin and a fourth pin, and the first pin and the fourth pin are connected to the R2 resistor and the R1 resistor respectively.
[0006] Furthermore, the third pin and the second pin are connected to the positive electrode of the V2 voltage regulator tube and the X01 input terminal respectively.
[0007] Furthermore, the X02 input terminal and the X01 input terminal are respectively connected to the output K terminal and the output G terminal of the dynamic test equipment, and the X03 output terminal is connected to the gate of the thyristor SCR under test.
[0008] Preferably, the E1 solid-state relay uses a PMN5A2032 solid-state relay with a current capacity of 5A.
[0009] Preferably, the voltage regulator diodes V1 and V2 are 15V voltage regulator diodes of type 1n4744.
[0010] Preferably, the C1 capacitor is a 0.5uf / 50V polyester capacitor.
[0011] Preferably, the resistors R1 and R2 are 250Ω and 51Ω metal film resistors with a power of 2 watts.
[0012] Preferably, the V3 fast recovery rectifier diode is a fast recovery rectifier diode of model FR107 with an average forward current of 1A.
[0013] The beneficial effects of the utility model are:
[0014] 1. When testing the thyristor dynamic parameter turn-off time (tq), the problem of inaccurate final test data caused by interference can be greatly improved.
[0015] 2. The device can be used without changing the original equipment. It only needs to be connected in series with the gate trigger circuit of the original equipment. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Attachment Figure 1 It is a schematic diagram of the principle of the utility model;
[0017] Attachment Figure 2 It is a schematic diagram of the use and connection of the utility model. DETAILED DESCRIPTION
[0018] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present invention. In the embodiments, the components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for which protection is claimed, but merely represents selected embodiments of the present application.
[0019] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," "front," "back," and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended only to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0020] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections; electrical connections; hydraulic connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.
[0021] According to the attached Figure 1 The working logic of the utility model is specifically described as follows: A thyristor dynamic test gate anti-interference device includes a solid-state relay E1, voltage regulator tubes V1, V2, a capacitor C1, resistors R1, R2, a fast recovery rectifier diode V3, input terminals X01, X02, and an output terminal X03.
[0022] Among them, the X01 input terminal and the X02 input terminal serve as two input interfaces. The X01 input terminal is respectively connected to pin 2 of the E1 solid-state relay, the negative electrode of the V1 Zener diode, and one end of the C1 capacitor. The V1 Zener diode and the V2 Zener diode are connected in series, and the positive electrode of the V2 Zener diode is connected to pin 3 of the E1 solid-state relay. The other end of the C1 capacitor is connected to one end of the resistors R1 and R2 and to the X02 input terminal. The other end of the R1 resistor is connected to pin 4 of the E1 solid-state relay. The other end of the R2 resistor is connected to pin 1 of the E1 solid-state relay and the positive electrode of the V3 fast recovery rectifier diode. The negative electrode of the V3 fast recovery rectifier diode is connected to the X03 output terminal.
[0023] Solid-state relay E1 converts the external trigger signal and suppresses any interference except for the normal trigger signal. The external trigger signal requires a long line from the original device to the device under test, and its voltage is lower than other signals, making it susceptible to interference. Using solid-state relay E1 converts the original voltage signal into a current signal, reducing interference caused by the long line. Zener diodes V1 and V2 are connected to the input of solid-state relay E1 to filter out signals below the regulated voltage and eliminate interference caused by such signals. Capacitor C1 is connected to the input of solid-state relay E1 to absorb interference signals with a pulse width less than a certain value. Resistor R1 limits the primary current of solid-state relay E1 to protect it from overcurrent damage. Resistor R2 prevents floating voltage from occurring at the output of the solid-state relay. Fast-recovery rectifier diode V3 quickly returns to its reverse blocking state after the forward trigger current flows, protecting the solid-state relay from reverse voltage.
[0024] According to the attached Figure 2 The connection method used in this utility model is described in detail as follows:
[0025] The output A and K terminals of the dynamic test device (1) are connected to the anode and cathode of the thyristor SCR (2) under test, respectively. The output K terminal of the dynamic test device (1) is also connected to the input terminal (3) X02 of the present invention. The output G terminal of the dynamic test device (1) is connected to the input terminal (3) X01 of the present invention. The output terminal (3) X03 of the present invention is connected to the gate of the thyristor SCR (2) under test. The present device can be used according to the above connection method.
[0026] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based primarily on the scope of protection of the claims.
Claims
1. A thyristor dynamic test gate anti-interference device, comprising an X01 input terminal, an X02 input terminal, an X03 output terminal, and a C1 capacitor, one end of which is connected to the X01 input terminal, characterized in that: The X01 input terminal is also connected to the E1 solid-state relay and the V1 voltage regulator tube, the V1 voltage regulator tube is connected to the V2 voltage regulator tube, the V1 voltage regulator tube and the V2 voltage regulator tube are connected in series, and the positive electrode of the V2 voltage regulator tube is connected to the E1 solid-state relay; The other end of the C1 capacitor is connected to the X02 input terminal, and the C1 capacitor is also connected to the R1 resistor and the R2 resistor. The other ends of the R1 resistor and the R2 resistor are connected to the E1 solid-state relay. The R2 resistor is connected to the V3 fast recovery rectifier diode, and the negative pole of the V3 fast recovery rectifier diode is connected to the X03 output terminal.
2. The thyristor dynamic test gate anti-interference device according to claim 1, characterized in that: The E1 solid-state relay is provided with a first pin, a second pin, a third pin and a fourth pin, and the first pin and the fourth pin are connected to the R2 resistor and the R1 resistor respectively.
3. The thyristor dynamic test gate anti-interference device according to claim 2, characterized in that: The third pin and the second pin are connected to the positive electrode of the V2 voltage regulator tube and the X01 input terminal respectively.
4. The thyristor dynamic test gate anti-interference device according to claim 1, characterized in that: The X02 input terminal and the X01 input terminal are respectively connected to the output K terminal and the output G terminal of the dynamic test equipment, and the X03 output terminal is connected to the gate of the thyristor SCR to be tested.