Testing device applied to chip

The modular chip testing device solves the problems of resource waste and cycle extension in traditional chip testing, and reduces hardware costs, shortens development cycles, and improves testing efficiency.

CN223346998UActive Publication Date: 2025-09-16ZHUHAI TAIWEI ELECTRONICS CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202421825627.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-07-31
Publication Date
2025-09-16
Estimated Expiration
2034-07-31

AI Technical Summary

Technical Problem

In traditional chip testing, customized verification boards lead to extended project cycles, high risk of design errors, severe waste of resources, and difficulty in reuse, increasing hardware and labor costs.

Method used

The test device adopts a modular design, including a common circuit board, a DUT chip board and an extended function board. Through pluggable interfaces and standardized interfaces, the circuit boards can be reused and flexibly replaced, supporting the testing of different types of chips.

Benefits of technology

It reduces hardware costs, shortens development cycles, improves test efficiency and accuracy, supports flexible testing of different chip models, and is easy to expand and maintain.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223346998U_ABST
    Figure CN223346998U_ABST
Patent Text Reader

Abstract

The embodiment of the utility model discloses a testing device applied to a chip, and relates to the field of chip testing. Through multiplexing of the functional circuit board, the hardware cost is reduced, the development period is shortened, the flexibility and expandability are enhanced, and the test efficiency and accuracy are improved, so that optimized utilization of hardware resources and remarkable reduction of the test cost are realized.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the field of chip testing, in particular to a testing device applied to chips. Background Art

[0002] In the field of chip design, companies often need to conduct detailed functional verification for a diverse range of chips and their various packaging models. Traditional practices rely on customized verification boards. Although this ensures targeted verification, it significantly prolongs the project cycle and is accompanied by the risk of design errors. The introduction of each new board must undergo a tedious circuit testing process to ensure that it can accurately evaluate chip performance, which undoubtedly increases the workload of hardware design engineers. What's worse, the repetitiveness and non-universality of functional verification circuit board design lead to excessive consumption and waste of resources (including manpower and material resources). Once the project verification is completed, these project-specific verification boards are often difficult to reuse in subsequent projects and can only be stored idle, which in turn increases the pressure and cost of material management. Utility Model Content

[0003] The embodiments of the present application provide a test device, chip, and electronic device for a chip, which can reduce hardware costs when performing functional testing on chips of different models. The technical solution is as follows:

[0004] Including: common circuit board, DUT chip board and extended function board;

[0005] Wherein, the common circuit board is provided with a DUT chip board interface, a chip pin expansion interface, n pin selectors, n function verification circuits, a power supply interface, a power conversion circuit and a download and debug interface circuit; the power supply interface is connected to the power conversion circuit, the power conversion circuit is connected to the download and debug interface circuit, the download and debug interface circuit is connected to the DUT chip board interface, the DUT chip board interface is connected to the chip pin expansion interface, the n pin selectors are respectively connected to the chip pin arrangement expansion interface, the n pin selectors are connected to the n function verification circuits in a one-to-one manner, and n is an integer greater than 1;

[0006] The DUT chip board is provided with a chip to be tested and chip peripheral circuits, and the DUT chip board is connected to the DUT chip board interface in a pluggable manner;

[0007] The extended function board is provided with a chip pin matching interface, m pin selectors and m function verification circuits; the chip pin matching interface is connected to the pin expansion interface in a pluggable manner, the m pin selectors are respectively connected to the chip pin matching interface, and the m pin selectors are connected to the m function verification circuits in a one-to-one manner, where m is an integer greater than 0.

[0008] The beneficial effects of the technical solutions provided by some embodiments of the present application include at least:

[0009] Reuse of functional circuit boards: By designing reusable functional circuit boards (such as USB protocol verification circuits and CAN protocol verification circuits), the solution allows these boards to be reused for functional testing of different chip models. This design avoids developing a complete set of test circuits for each chip type, significantly saving hardware costs and development time.

[0010] Reduced hardware costs: Because functional circuit boards can be reused, when testing different chip models, the only things that need to be replaced are the DUT chip board and the accompanying expansion function board. This significantly reduces hardware costs compared to developing a complete test system for each chip.

[0011] Reduced development cycle: Since most functional circuit boards have been pre-designed and verified, when developing a new test project, the main work is focused on designing the DUT chip board and the expansion function board. This greatly shortens the development cycle and enables the test system to be put into use more quickly.

[0012] Flexible response to different chips: By replacing the DUT chip board and expansion function board, the test system can flexibly adapt to the testing requirements of chips of different models and functions. This flexibility makes the test system have a wider range of applications.

[0013] Easy to expand: With the continuous development of chip technology, new test requirements are constantly emerging. Due to the modular design of the solution, the functionality of the test system can be easily expanded by adding new expansion function boards to meet new test requirements.

[0014] Quickly switch test items: Since the DUT chip board and expansion function board adopt a pluggable design, different test items can be quickly switched between test systems, improving test efficiency.

[0015] Ensure test accuracy: Pre-designed and verified functional circuit boards ensure the accuracy and stability of test signals, thereby improving the reliability of test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 This is a structural diagram of a chip testing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0019] See also Figure 1 The present invention provides a schematic structural diagram of a chip testing device according to an embodiment. The chip testing device includes: a common circuit board 10, a DUT chip board 20 and an extended function board 30.

[0020] The common circuit board 10 is provided with a DUT chip board interface 14, a chip pin expansion interface 15, pin selectors 1 to n, function verification circuits 1 to n, a power supply interface 11, a power conversion circuit 12, and a download and debug interface circuit 13. The power supply interface 11 is connected to the power conversion circuit 12, which is connected to the download and debug interface circuit 13. The download and debug interface circuit 13 is connected to the DUT chip board interface 14, which is connected to the chip pin expansion interface 15. The n pin selectors are respectively connected to the chip pin arrangement expansion interface. The n pin selectors are connected to the n function verification circuits in a one-to-one manner. That is, pin selector 1 on the common circuit board 10 is connected to function verification circuit 1, pin selector 2 is connected to function verification circuit 2, ..., and pin selector n is connected to function verification circuit n.

[0021] In this application, the DUT chip board is connected to the DUT chip board interface on the common circuit board via a pluggable connection. This connection allows testers or engineers to quickly replace different DUT chip boards for testing without changing the common circuit board layout and connections. The pluggable design makes the testing process more flexible. When testing different chip or module models, only the corresponding DUT chip board needs to be replaced, without requiring large-scale adjustments or reconfiguration of the entire test system. The rapid replacement of DUT chip boards can significantly shorten the test cycle and improve testing efficiency. Testers can complete the testing of multiple chips in a short period of time, thereby accelerating the product development cycle. If the DUT chip board fails or requires repair, the pluggable design makes troubleshooting and repair easier. It also facilitates cleaning and maintenance of the test system. By reusing common circuit boards and other testing resources, hardware costs are reduced. Different DUT chip boards can share the same test environment, reducing duplicate investment. The standardized DUT chip board interface helps to achieve standardization and modularization of the test system. This helps to simplify the testing process and improve the reliability and repeatability of test results.

[0022] The chip pin expansion interface is mainly used to centrally manage multiple pins of the chip under test (DUT chip) and provide a standardized interface to facilitate connection with the test system, development board or other electronic equipment. Since many high-performance chips have a large number of pins, directly connecting these pins to the test system or circuit board can be very complicated and prone to errors. The pin expansion interface concentrates these pins into a smaller area and presents them through an orderly interface, thereby simplifying the connection process. Pin expansion interfaces usually follow certain industry standards or specifications, such as DIP (dual in-line package), SOP (small outline package), QFP (quad flat package), etc. This standardized interface design allows different types of chips to be connected to the test system or circuit board through the same interface, improving the compatibility and flexibility of the system.

[0023] The pin selector is used to select specific pins from the pin set of the chip under test for functional testing based on functional test requirements. Each pin selector is connected to a functional verification circuit for precise, one-to-one control. The functional verification circuit verifies the functionality of the pins selected by the pin selector, ensuring that the chip pins are operating as expected. The power supply interface and power conversion circuit provide stable power input to the entire test setup, which is converted to the voltage and current required for testing by the power conversion circuit. The download debug interface circuit allows users to download test programs or debug code to the DUT chip board through this interface, facilitating software-level testing and debugging.

[0024] In the embodiment of the present application, a DUT chip board 20 is provided with a chip under test 21 and chip peripheral circuitry 22. The DUT chip board is connected to the DUT chip board interface in a pluggable manner. The chip under test 21 is the chip to be tested and verified. The chip peripheral circuitry 22 provides the necessary support and protection for the chip under test 21, ensuring that it can function normally during the test process.

[0025] The extended function board 30 is equipped with a chip pin matching interface, pin selectors 1 through m, and function verification circuits 1 through m, where m is an integer greater than 0 and is determined by the number of extended function tests. The chip pin matching interface 31 is pluggable and connected to the pin expansion interface 15. The m pin selectors are each connected to the chip pin matching interface. The m pin selectors are connected to the m function verification circuits in a one-to-one fashion. That is, pin selector 1 on the extended function board 30 is connected to function verification circuit 1, pin selector 2 is connected to function verification circuit 2, and so on. Pin selector m is connected to function verification circuit m.

[0026] In this application, when different models of chips to be tested need to be tested, since these chips may have different pin arrangements, functional requirements or peripheral circuit requirements, the user only needs to redesign the DUT chip board to adapt to the new chip. This includes designing the corresponding connection layout according to the pin definition of the new chip, as well as the specific peripheral circuits that may be required. Since the common circuit board provides standardized interfaces and functional verification circuits, the user does not need to make any modifications to the common circuit board. They only need to insert the new DUT chip board into the DUT chip board interface of the common circuit board to start testing. In this way, by reusing the common circuit board, the workload of designing the circuit is greatly reduced, and the hardware cost caused by repeated design is reduced.

[0027] When new functions need to be tested, users may require additional pins or specialized test circuitry to verify these features. In this case, users can redesign the expansion function board to include the necessary pin selectors and function verification circuitry. Because the expansion function board connects to the common circuit board via a chip pin-matching interface, users can easily replace or add expansion function boards to accommodate new test requirements. Similarly, because the common circuit board remains unchanged, this design allows users to reuse existing test resources, reducing the need to design new circuitry and lowering hardware costs.

[0028] In an embodiment of the present application, the power supply interface is a USB interface and / or a DC interface.

[0029] The test device may offer both USB and DC power options. This allows for flexible selection of power supply methods based on different test requirements and scenarios. For example, a USB interface can be used in situations requiring real-time data transmission and firmware updates, while a DC interface can be selected for tests requiring a stable power supply. Designing the power supply interface as a USB interface or a DC interface (or both) is a reasonable choice in the aforementioned chip functional test device solution. Each has its own advantages and can meet the needs of different test scenarios.

[0030] In some embodiments of the present application, the chip pin expansion interface consists of a first expansion interface and a second expansion interface, the chip pin matching interface consists of a first matching interface and a second matching interface, the first expansion interface is connected to the first matching interface, and the second expansion interface is connected to the second matching interface.

[0031] Among them, by subdividing the interface, the test device can more flexibly respond to the pin layout and functional requirements of different chips. For example, some chips may only need to use part of the pins, while other chips may require additional pins to support specific functions. By designing the first expansion interface and the second expansion interface separately, these interfaces can be selectively connected according to actual needs. With the continuous development of chip technology, new chips may introduce more pins or more complex pin layouts. By reserving the first expansion interface and the second expansion interface, the test device can support these new chips in the future by adding additional expansion function boards or modules without the need for large-scale modifications to the existing test device. Subdividing the interface can also simplify the connection process. When connecting the chip, the user only needs to connect the chip pins to the corresponding matching interface, without worrying about cross-connections or incorrect connections between pins. This not only improves connection efficiency, but also reduces the risk of connection errors.

[0032] In some embodiments of the present application, the n function verification circuits include: a USB protocol verification circuit, a CAN protocol verification circuit, a UART protocol verification circuit, an IIC protocol verification circuit, an RS485 protocol verification circuit, an LED verification circuit, and a KEY verification circuit.

[0033] The design subdivides the functional verification circuits into commonly used circuits, including USB, CAN, UART, IIC, RS485, LED, and key verification circuits. This is a very comprehensive and practical design. This design not only covers a variety of common communication protocols and interface standards but also considers the verification of common peripherals such as LED displays and key inputs, thus enabling the reuse and efficient management of functional verification circuits.

[0034] USB protocol verification circuit: used to verify the function and performance of the USB interface on the chip, including data transmission rate, protocol compatibility, error handling, etc.

[0035] CAN protocol verification circuit: Verifies the CAN bus interface on the chip to ensure that the chip can correctly send and receive CAN messages to meet the communication needs of the automotive industry and other industrial fields.

[0036] UART protocol verification circuit: used to verify the functions of the UART (Universal Asynchronous Receiver / Transmitter) interface on the chip, including baud rate setting, data format, flow control, etc.

[0037] IIC protocol verification circuit: Verifies the IIC (or I2C) bus interface to ensure that the chip can correctly perform data transmission and control as a master or slave device.

[0038] RS485 protocol verification circuit: used to verify the functionality of the RS485 interface on the chip, suitable for industrial applications requiring long-distance, high-speed data transmission.

[0039] LED verification circuit: By controlling the LED output pins on the chip, it verifies whether the LED display function is normal, including brightness, flashing mode, etc.

[0040] KEY verification circuit: simulates key input to verify the chip's response and processing capabilities to key events, including de-jittering and key recognition.

[0041] In some embodiments of the present application, the power conversion circuit provides operating voltages of 5V, 3.3V, 2.5V, and 1.5V.

[0042] In some embodiments of the present application, the DUT chip board is connected to the DUT chip board interface via a cable in a pluggable manner; the chip pin matching interface is connected to the pin expansion interface via a cable in a pluggable manner.

[0043] The interfaces between the DUT chip boards and between the chip pin matching interfaces and the pin expansion interfaces are all connected in a pluggable manner via cables. This design brings many advantages:

[0044] The pluggable design allows the DUT chip board and expansion function board to be easily removed from or inserted into the test fixture without the use of screws or other fixing tools. This flexibility allows the test fixture to quickly adapt to different test needs and facilitates the replacement of different models of chips or expansion boards. When the DUT chip board or expansion function board fails, the pluggable design allows the user to quickly remove them from the test fixture for replacement or repair. This greatly reduces maintenance costs and time and improves test efficiency. Pluggable interfaces connected by cables usually have a locking mechanism to prevent the interface from loosening or falling off due to vibration or misoperation during testing. This helps protect the test fixture and chips from damage and ensures the accuracy of test results.

[0045] Therefore, the modular design adopted in this application not only improves the flexibility and scalability of the test device, but also significantly reduces the workload and hardware costs of circuit design. Users can quickly and flexibly adjust the DUT chip board and expansion function board according to specific test requirements without having to undergo a large-scale redesign of the entire test device. This design concept has broad application prospects in the field of chip testing, and can greatly improve test efficiency and accuracy while reducing test costs.

[0046] The chips to be tested in this application include but are not limited to power supply chips, digital processing chips or general processor chips, etc.

[0047] The above-described embodiments do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the above-described embodiments shall be included in the scope of protection of this technical solution.

Claims

1. A chip testing device, characterized in that: include: Common circuit board, DUT chip board and extended function board; Wherein, the common circuit board is provided with a DUT chip board interface, a chip pin expansion interface, n pin selectors, n function verification circuits, a power supply interface, a power conversion circuit and a download and debug interface circuit; the power supply interface is connected to the power conversion circuit, the power conversion circuit is connected to the download and debug interface circuit, the download and debug interface circuit is connected to the DUT chip board interface, the DUT chip board interface is connected to the chip pin expansion interface, the n pin selectors are respectively connected to the chip pin arrangement expansion interface, the n pin selectors are connected to the n function verification circuits in a one-to-one manner, and n is an integer greater than 1; The DUT chip board is provided with a chip to be tested and chip peripheral circuits, and the DUT chip board is connected to the DUT chip board interface in a pluggable manner; The extended function board is provided with a chip pin matching interface, m pin selectors and m function verification circuits; the chip pin matching interface is connected to the pin expansion interface in a pluggable manner, the m pin selectors are respectively connected to the chip pin matching interface, and the m pin selectors are connected to the m function verification circuits in a one-to-one manner, where m is an integer greater than 0.

2. The device according to claim 1, characterized in that The power supply interface is a USB interface or a DC interface.

3. The device according to claim 1 or 2, characterized in that The chip pin extension interface consists of a first extension interface and a second extension interface, and the chip pin matching interface consists of a first matching interface and a second matching interface. The first extension interface is connected to the first matching interface, and the second extension interface is composed of the second matching interface.

4. The device according to claim 3, characterized in that The n function verification circuits include: a USB protocol verification circuit, a CAN protocol verification circuit, a UART protocol verification circuit, an IIC protocol verification circuit, an RS485 protocol verification circuit, an LED verification circuit, and a KEY verification circuit.

5. The device according to claim 1, 2 or 4, characterized in that: The power conversion circuit provides operating voltages of 5V, 3.3V, 2.5V and 1.5V.

6. The device according to claim 1, characterized in that The DUT chip board is connected to the DUT chip board interface in a pluggable manner through a cable; the chip pin matching interface is connected to the pin extension interface in a pluggable manner through a cable.