General microprocessor circuit module packaged by SIP (Session Initiation Protocol)
Through SIP packaging technology and BGA solder ball array packaging, bare cores such as MCU bare core are integrated, which solves the problems of miniaturization and high integration of module components and realizes a lightweight and highly reliable general microprocessor circuit module.
Patent Information
- Application Number
- CN202423223011.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2034-12-26
AI Technical Summary
Existing module components are difficult to meet the requirements of high density, high power density, lightweight and miniaturization, and the traditional single-sided layout device structure has limitations when reducing the area.
It adopts SIP packaging technology, integrates MCU bare core, operational amplifier bare core, analog switch bare core and A/D converter bare core, and adopts BGA solder ball array packaging and ceramic substrate to achieve miniaturization and high integration of circuit.
The area and volume of the module circuit are miniaturized, the integration and reliability are improved, the production cost is reduced, and the versatility and shock resistance of the module are enhanced.
Smart Images

Figure CN223347337U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of integrated circuits, in particular to a universal microprocessor circuit module in a SIP package. Background Art
[0002] Currently, module applications are increasingly demanding high-density device integration, high power density, lightweight construction, and compact size. Compared to traditional single-PCB or film-forming substrates, single-sided device layouts achieve the same scale of circuit functionality within a package with a footprint 3-5 times smaller, a trend that is also driving module development. Providing a smaller, more versatile, and versatile general-purpose microprocessor SiP circuit module can better meet these requirements. Utility Model Content
[0003] The purpose of the utility model is to provide a universal microprocessor circuit module in a SIP package, which adopts SIP packaging technology, customizes the circuit of a special functional module, miniaturizes the module's plane area and volume, and reduces the overall weight of the module, thereby meeting the requirements of module application installation space limitations, miniaturization, and lightweight.
[0004] To achieve the above objectives, the present invention adopts the following technical solution: a universal microprocessor circuit module in a SIP package, comprising a substrate, a sealing cover, and an MCU bare core, an operational amplifier bare core, an analog switch bare core, and an A / D converter bare core packaged in a system-level package on the substrate, wherein:
[0005] The MCU bare core is located on the left side of the substrate and is used to generate a PWM square wave signal;
[0006] There are two operational amplifier bare cores located in the lower right corner of the substrate, which are used to filter the PWM square wave signal to form a sine wave signal, and then output the sine wave signal to drive the sensor outside the chip;
[0007] The analog switch die is located in the upper right corner of the substrate and is used to select different sensor channels and transmit the voltage signal at both ends of the off-chip sensor to the A / D converter die;
[0008] The A / D converter core is located on the left side of the analog switch core on the substrate, and is used to digitally quantize the voltage signals at both ends of the off-chip sensor and transmit them to the MCU core for calculation and decoding.
[0009] Furthermore, the substrate is a ceramic substrate integrating a circuit substrate and a shell, a topless rectangular cavity is opened in the middle of the substrate, the bottom part for packaging the bare core is a multi-layer high-density ceramic circuit substrate, and the sealing cover is welded to the top of the substrate.
[0010] Furthermore, the top surface of the substrate is provided with metallized pads for bonding and fixing the bare cores, wiring the pins, and welding the resistor and capacitor components. The interior of the substrate is provided with embedded circuits for achieving electrical connection between the metallized pads on the top layer.
[0011] Furthermore, the external packaging form is BGA solder ball array packaging.
[0012] Furthermore, the control pin of the analog switch bare core is connected to the IO pin of the MCU bare core.
[0013] Furthermore, the A / D converter bare core is connected to the MCU bare core via an SPI bus.
[0014] Furthermore, the MCU bare core includes an FPU floating-point arithmetic unit, an ADC converter, a serial port, a timer, and an IO external interrupt.
[0015] The beneficial effects of the utility model are:
[0016] The module circuit structure is novel, using BGA solder ball array packaging and ceramic SIP packaging technology to integrate multiple bare cores, achieving customization of module circuit functions and miniaturization of area and volume;
[0017] The overall weight of the module is light, providing margin for the user's consideration of the weight of the entire machine;
[0018] The module uses bare integrated circuits, which have high integration and greatly improved reliability compared to conventional PCB circuits.
[0019] The module has a neat appearance, a packaging structure with good seismic resistance, greater versatility, and can be managed in a standardized manner; it is suitable for position, distance, and other sensor working conditions;
[0020] It has achieved cost reduction and efficiency improvement for module products, and is conducive to standardized process management of products, reducing product production costs, and can adopt domestically produced components to achieve independent control. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 This is a schematic diagram of the circuit structure of an embodiment of the utility model;
[0022] Figure 2 This is a top view of the layout of the packaging structure components of an embodiment of the present utility model;
[0023] Figure 3 It is a schematic longitudinal sectional view of the packaging structure of an embodiment of the utility model. DETAILED DESCRIPTION
[0024] In order to more clearly understand the above-mentioned objectives, features and advantages of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0025] Figures 1 to 3 FIG. 1 shows a specific embodiment of a universal microprocessor circuit module in a SIP package of the present invention, comprising a substrate 1, a sealing cover 2, and an MCU die 3, an operational amplifier die 4, an analog switch die 5, and an A / D converter die 6 in a system-level package on the substrate 1, wherein:
[0026] The substrate 1 is a ceramic substrate that integrates the circuit substrate and the housing. A topless rectangular cavity 1a is opened in the middle of the substrate 1. The bottom part used to encapsulate the bare core is a multi-layer high-density ceramic circuit substrate. The relevant resistors and capacitors are also encapsulated on the multi-layer high-density ceramic circuit substrate. The sealing cover plate 2 is welded to the top of the substrate 1 to improve the anti-interference ability of the entire circuit.
[0027] The top surface of the substrate 1 is provided with metallized pads for bonding and fixing the bare cores, bonding the pins, and welding the resistors and capacitors. The inside of the substrate 1 is provided with embedded circuits for achieving electrical connections between the metallized pads on the top layer.
[0028] The MCU bare core 3 is located on the left side of the substrate 1 and is used to generate a PWM square wave signal. The MCU bare core 3 uses a high-performance ARMCortex TM - The JS32F407 bare-core MCU, a 32-bit RISC core, utilizes the on-chip FPU floating-point unit, ADC converter, serial port, timer, IO external interrupts, and other hardware resources. It also supports DSP instructions and MPU memory protection to enhance application security.
[0029] There are two operational amplifier cores 4 located in the lower right corner of the substrate 1, which are used to filter the PWM square wave signal to form a sine wave signal, and then output the sine wave signal to drive the sensor outside the chip; the operational amplifier core 4 uses the low-offset HYX823 precision operational amplifier independently developed and produced by the applicant, and its open-loop gain, common-mode rejection ratio, gain-bandwidth product, power consumption and slew rate and other indicators all have excellent characteristics;
[0030] The analog switch die 5, located in the upper right corner of the substrate 1, is used to select different sensor channels and transmit the voltage signals from the off-chip sensors to the A / D converter die 6. The analog switch die 5 utilizes the HYK509 analog switch die independently developed and produced by the applicant. It has two built-in 4-channel, 3-bit logic decoder inputs, allowing any channel to be enabled to configure the signal channel. It also provides TTL and 5VCMOS logic-compatible digital inputs. Due to its BCD process design, its signal processing capabilities can be increased from VSS to VDD, and it can operate over a wide power supply voltage range. The control pins of the analog switch die 5 are connected to the IO pins of the MCU die 3.
[0031] The A / D converter die 6 is located on the substrate 1 to the left of the analog switch die 5 and is used to digitally quantize the voltage signal at both ends of the off-chip sensor and transmit it to the MCU die 3 for calculation and decoding. The A / D converter die 6 uses a high-speed, low-power HWD7276 A / D converter. The A / D converter die 6 is connected to the MCU die 3 via an SPI bus.
[0032] The external packaging form of this embodiment is a BGA solder ball array package, that is, solder balls 7 arranged in an array are placed on the back side of the substrate 1 as external pins of the circuit module of this embodiment.
[0033] The circuit module of this embodiment is highly adaptable. It generates a PWM square wave signal through the on-chip MCU. This signal is then filtered by the on-chip op amp to form a sine wave signal, which is then output to drive an off-chip sensor. An on-chip analog switch selects different sensor channels, and the voltage signal across the off-chip sensor is transmitted to the on-chip A / D converter. After digital quantization by the A / D converter, it is transmitted to the MCU for calculation and decoding. The result or data is ultimately stored in on-chip memory or transmitted via a communication interface.
Claims
1. A general-purpose microprocessor circuit module in a SIP package, characterized in that: The system comprises a substrate (1), a sealing cover plate (2), and an MCU bare core (3), an operational amplifier bare core (4), an analog switch bare core (5), and an A / D converter bare core (6) which are packaged on the substrate (1) at the system level, wherein: The MCU bare core (3) is located on the left side of the substrate (1) and is used to generate a PWM square wave signal; The number of the operational amplifier bare cores (4) is 2, and they are located at the lower right corner of the substrate (1), and are used to filter the PWM square wave signal to form a sine wave signal, and then output the sine wave signal to drive an off-chip sensor; The analog switch bare core (5) is located at the upper right corner of the substrate (1) and is used to select different sensor channels and transmit the voltage signal at both ends of the off-chip sensor to the A / D converter bare core (6); The A / D converter core (6) is located on the left side of the analog switch core (5) on the substrate (1) and is used to digitally quantize the voltage signals at both ends of the off-chip sensor and transmit them to the MCU core (3) for calculation and decoding.
2. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The substrate (1) is a ceramic substrate integrating a circuit substrate and a shell. A topless rectangular cavity (1a) is provided in the middle of the substrate (1). The bottom portion for packaging the bare core is a multi-layer high-density ceramic circuit substrate. The sealing cover plate (2) is welded to the top of the substrate (1).
3. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The top surface of the substrate (1) is provided with metallized pads for bonding and fixing the bare cores, wiring the pins, and welding the resistor and capacitor components. The interior of the substrate (1) is provided with embedded circuits for achieving electrical connection between the metallized pads on the top surface.
4. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The external packaging form is BGA solder ball array packaging.
5. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The control pin of the analog switch bare core (5) is connected to the IO pin of the MCU bare core (3).
6. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The A / D converter bare core (6) is connected to the MCU bare core (3) via an SPI bus.
7. The SIP packaged universal microprocessor circuit module according to claim 1, characterized in that: The MCU bare core (3) includes an FPU floating point operation unit, an ADC converter, a serial port, a timer, and an IO external interrupt.