High-power driving circuit based on 8033

By using a high-power drive circuit based on 8033 and components such as wound resistors, capacitors and drive chips, a highly integrated, miniaturized and low-power drive circuit is achieved, which solves the complexity and high cost problems of high-power drive circuits in existing technologies, improves electromagnetic compatibility and reliability, and adapts to the diverse needs of smart meters.

CN223363061UActive Publication Date: 2025-09-19QINGDAO ITECHENE TECH CO LTD
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Patent Information

Application Number
CN202422029524.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-21
Publication Date
2025-09-19
Estimated Expiration
2034-08-21

AI Technical Summary

Technical Problem

Existing drive circuits cannot meet the requirements of high integration, miniaturization, low power consumption, flexibility and high reliability under high power conditions, and have problems such as complex circuits, high costs, weak anti-interference performance, low control efficiency and poor electromagnetic compatibility.

Method used

It adopts a high-power drive circuit based on 8033, including components such as winding resistors, capacitors, and driver chips. It realizes four working modes through logic signal control. It combines decoupling capacitors and current-limiting resistors to simplify the circuit structure and improve driving capability and reliability.

Benefits of technology

It achieves low-cost, high-efficiency, high-power drive, simplifies the design cycle, improves system reliability and electromagnetic compatibility, adapts to different load conditions, and meets high current and high power requirements.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a high-power driving circuit based on 8033. The high-power driving circuit comprises a winding resistor RW5, resistors RW8, RW1, RW2, RW3, RW4, RW6 and RW7, capacitors CW1, CW2 and C1, and driving chips UW4 and JM7 which are connected with a control line input line of a relay. Control input signals of the relay comprise input signals ConnectorOnIn and ConnectorOffIn, and the capacitor CW2 is connected to the two ends of the control input signals in parallel. The OUTB of the driving chip UW4 is connected with the ConnectorOnIn, the VDD pin is connected with the RVCC, one end of the capacitor CW1 is connected with the RVCC, and the other end of the capacitor CW1 is grounded GND; an OUTA of the driving chip UW4 is connected with one end of a winding resistor RW5, and the other end of the winding resistor RW5 is connected with a ConnectorOffIn signal end; the device is reasonable in design, compact in structure and convenient to use.
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Description

Technical Field

[0001] The utility model belongs to the field of electronic technology or relay design technology, and relates to a high-power drive circuit based on 8033. Background Art

[0002] With the rapid development and maturity of smart meter technology, market demands are becoming increasingly diverse and complex. Beyond basic energy metering, modern smart meters must also offer a variety of intelligent functions, including two-way communication, data acquisition, real-time monitoring, load control, and fault diagnosis. This requires driver circuits to not only handle high currents and high power, but also possess the following characteristics: high integration and miniaturization, low power consumption and energy-saving design, flexibility and scalability, and high reliability and stability.

[0003] Currently, the most commonly used drive circuits on the market are low-power drive circuits. They are used in small current situations of smart meters. When encountering high current and high power, the low-power drive circuits cannot meet the requirements. In order to meet market needs, it is necessary to innovate and improve on the basis of low-power drive circuits and find a high-power drive circuit suitable for high-power requirements.

[0004] In smart meters, relay drive circuits often use constant voltage drive, PWM drive, and dual power supply drive methods. The constant voltage method is simple, but the power loss after closing the relay cannot be reduced, and the service life of the relay may be shortened due to temperature rise. The PWM drive method uses a constant voltage to turn on the relay, and then adjusts the PWM duty cycle to reduce the voltage drop on the relay coil to reduce the drive loss, but it will consume some CPU resources. The dual power supply drive method starts with a high-voltage power supply and then switches to a low-voltage power supply to continue powering the relay coil, so that the coil voltage is maintained within the holding voltage range, thereby reducing coil loss.

[0005] The current drive circuit has the following disadvantages: it cannot meet the driving requirements under high power conditions; the circuit is complex and the cost is high; the anti-interference performance is weak; the control efficiency is low and the electromagnetic compatibility is poor; the design cycle is long and the versatility is poor. Utility Model Content

[0006] The technical problem to be solved by the present invention is generally to provide a high-power drive circuit based on 8033, with the purpose of overcoming the shortcomings of the existing technology and achieving low cost, high versatility, short design cycle and high-power drive circuit that can be used under different load conditions.

[0007] In order to solve the above problems, the technical solution adopted by the present invention is:

[0008] A high-power drive circuit based on 8033, including a winding resistor RW5, resistors RW8, RW1, RW2, RW3, RW4, RW6, RW7, capacitors CW1, CW2, C1, a drive chip UW4, and JM7 to connect the control line input line of the relay;

[0009] The control input signal of the relay includes the input signal Connector_On_In and Connector_Off_In, and the capacitor CW2 is connected in parallel at both ends of the control input signal;

[0010] Connect OUTB of driver chip UW4 to Connector_On_In, VDD pin to RVCC, one end of capacitor CW1 to RVCC, and the other end of capacitor CW1 to ground GND.

[0011] OUTA of the driver chip UW4 is connected to one end of the winding resistor RW5, and the other end of the winding resistor RW5 is connected to the Connector_Off_In signal terminal;

[0012] INB of the driver chip UW4 is connected to one end of the resistor RW2 and the other end is grounded;

[0013] One end of the resistor RW3 is connected to the INB of the driver chip UW4 and the other end is connected to the M_Connector_On_In signal terminal; one end of the resistor RW1 is connected to the M_Connector_On_In signal and the other end is connected to DVDD;

[0014] The INA of the driver chip UW4 is connected to a pull-down resistor RW7. The non-grounded end of the resistor RW7 is connected in series to one end of the resistor RW4. The other end of the resistor RW4 is connected to the M_Connector_Off_In signal end. The M_Connector_Off_In signal end is connected to one end of the resistor RW6. The other end of RW6 is connected to DVDD.

[0015] As a further improvement of the above technical solution:

[0016] OUTA is the output interface, connected to the motor winding;

[0017] VDD is the power supply voltage of the driver chip, connected to a decoupling capacitor;

[0018] OUTB is the output interface, connected to the motor winding.

[0019] In the driver chip UW4, GND is the reference ground; INA is the logic input terminal; INB is the logic input terminal; the voltage input range of VDD is 4V-24V, and the MOSFET tube on-resistance is connected.

[0020] When the INA and INB inputs are both low-level logic, the outputs OUTA and OUTB of the driver chip UW4 are high-level, and the driver chip UW4 is in Coast or Standby mode;

[0021] When the input INA is low and INB is high, the output OUTA of the driver chip UW4 is low and OUTB is high, and the driver chip UW4 is in Reverse mode;

[0022] When the input INA is high and INB is low, the output OUTA of the driver chip UW4 is high and OUTB is low, and the driver chip UW4 is in forward mode;

[0023] When the inputs INA and INB are both high, the outputs OUTA and OUTB of the driver chip are both low, and the driver chip UW4 is in Brake mode.

[0024] Capacitors CW1 and CW2 are decoupling capacitors; resistors RW2 and RW7 are pull-down resistors; and resistors RW1 and RW6 are pull-up resistors.

[0025] RVCC is the DC output of the AC-DC circuit;

[0026] The AC-DC circuit includes a diode DN2, resistors RN12 and RN13, and capacitors EN1 and EN4;

[0027] The input end of diode DN2 is connected to a 12V power supply and the output end is connected to one end of the parallel resistors RN12 and RN13;

[0028] The other end of the parallel resistors RN12 and RN13 is divided into two paths, one path is grounded through the parallel capacitors EN1 and EN4, and the other path is connected to the RVCC terminal.

[0029] Diode DN2 is a SMD rectifier diode;

[0030] Resistors RN12 and RN13 are current limiting resistors;

[0031] Capacitors EN1 and EN4 are plug-in aluminum electrolytic capacitors.

[0032] The beneficial effects of the utility model are as follows: the high-power drive circuit has fast startup, high precision, and good dynamic performance, which can improve the reliability and efficiency of the system, has low control power, good electromagnetic compatibility, a good operating environment, and a short design cycle. In the face of the diversity of overseas market demands, the circuit can meet the needs of high current and high power, has a simple circuit, low cost, high sensitivity, and strong adaptability and practicality.

[0033] The utility model has the advantages of reasonable design, low cost, durability, safety and reliability, simple operation, time and labor saving, money saving, compact structure and easy use. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a circuit diagram of the utility model.

[0035] Figure 2 It is a power supply schematic diagram of the utility model.

[0036] Figure 3 It is an input logic table diagram of the utility model.

[0037] Figure 4 It is a logic time diagram of the present utility model.

[0038] Figure 5 This is a logic diagram of power on and power off of the utility model. DETAILED DESCRIPTION

[0039] like Figure 1-5 , the high-power drive circuit of this embodiment (attached Figure 1 ) includes winding resistor RW5, resistors RW8, RW1, RW2, RW3, RW4, RW6, RW7, capacitors CW1, CW2, C1, driver chip UW4, and JM7 to connect the control line input line of the relay.

[0040] One of the control input signals of the relay is Connector_On_In, and the other is the Connector_Off_In input signal. Capacitor CW2 is connected in parallel at both ends of the relay input signal to filter the signal entering the driver chip. OUTB of the driver chip UW4 is connected to the Connector_On_In signal, and the VDD pin is connected to RVCC. RVCC is the DC power output by the AC-DC circuit and is used to power the driver chip. One end of the capacitor CW1 is connected to RVCC, and the other end of the capacitor CW1 is grounded to GND. OUTA of the driver chip UW4 is connected to one end of the winding resistor RW5, and the other end of the winding resistor RW5 is connected to the Connector_Off_In signal end. INB of the driver chip is connected to one end of the resistor RW2 and the other end is grounded. One end of the resistor RW3 is connected to INB, and the other end is connected to M_Connector_On_In. Resistor RW1 is connected to this signal, and the other end is connected to DVDD, which acts as a pull-up.

[0041] The driver chip INB is connected to a pull-down resistor RW7. The non-grounded end of the resistor RW7 is connected in series with one end of the resistor RW4. The other end of the resistor RW4 is connected to the signal

[0042] M_Connector_Off_In signal terminal, this signal terminal is connected to one end of resistor RW6, and the other end is connected to DVDD. Resistor RW6 plays a pull-up role.

[0043] This driver chip is a half-bridge motor driver designed to drive reversible motors, including DC motors, stepper motors, and other loads. Below is the package for the high-power driver chip. OUTA is the output pin, connected to the motor winding. VDD is the driver chip's power supply voltage and requires a decoupling capacitor to prevent voltage spikes. OUTB is the output pin, also connected to the motor winding. GND is the driver chip's reference ground. INA is a logic input with a large internal pull-down resistor. INB is also a logic input with a large internal pull-down resistor. VDD has a wide input voltage range of 4V-24V, a maximum continuous output of 1.5A, and low MOSFET on-resistance, making it widely applicable to high-power relay driver circuits in smart meters.

[0044] The driver circuit uses the high and low levels of the MCU's input signal to control the output of the driver chip. The logic levels of the inputs INA and INB determine the mode of the driver circuit: forward, reverse, coast, and brake. When both inputs are at low levels, very low standby circuit current can be achieved. The table shows the input logic of the high-power driver chip:

[0045] When both the INA and INB inputs are logic low, the high-power driver chip's outputs OUTA and OUTB are high, and the driver chip is in Coast or Standby mode. When the INA input is low and the INB input is high, the driver chip's outputs OUTA and OUTB are low, and the driver chip is in Reverse mode. When the INA input is high and the INB input is low, the driver chip's outputs OUTA and OUTB are high, and the driver chip is in Forward mode. When both the INA and INB inputs are high, the driver chip's outputs OUTA and OUTB are low, and the driver chip is in Brake mode.

[0046] In summary, the output mode of this high-power driver chip is determined by the input logic level, which is controlled by the CPU. This driver circuit is a high-power driver circuit because it can drive a relatively high current. In smart meters, it's often used as a relay driver, which requires relatively high power. The following is a timing diagram for a high-power driver circuit: T1 is the output enable time, typically 1000ns; T3 is the time from input high to output low, typically 200ns; T4 is the time from logic input low to logic output high, typically 300ns; and T2 is the time from logic input high to logic output low.

[0047] When the smart meter receives AC power, it outputs DC power after passing through AC-DC, which is used to drive the chip. When powered on, the VDD voltage gradually rises from 0V. During the VDD rising process, INA and INB are at a low level. When the meter is powered off, the input INA and INB are still at a low level. The waveforms during the VDD power on and off process are shown in the figure below: VDD is the power input pin of the high-power driver chip

[0048] In summary, this driver circuit uses the MCU system to control the input signal, while the output voltage is controlled based on the input signal. This protects the load signal, and the load signal passing through the capacitor filters out interference signals. This circuit ensures reliable and normal operation of the load driver circuit components. This high-power driver circuit is particularly effective in protecting the components when the load driver circuit requires a low-level input signal.

[0049] The electrical components are introduced as follows:

[0050] 1. Chip capacitors CW1 and CW2 are decoupling capacitors that filter out power supply noise and provide a stable power supply level.

[0051] 2. The chip resistors RW2 and RW7 are pull-down resistors, which clamp some signals at a low level.

[0052] 3. The chip resistors RW1 and RW6 are pull-up resistors, which clamp some signals at a high level.

[0053] 4. The driver chip UW4 is a high-power relay driver chip that drives the relay's opening and closing functions.

[0054] 5. DN2 is a chip rectifier diode with single-phase conductivity. It is used for rectification and prevention of voltage backflow.

[0055] 6. Chip resistors RN12 and RN13 are current limiting resistors, which limit the current of high-power devices when they are working and play a protective role.

[0056] 7. EN1 and EN4 are plug-in aluminum electrolytic capacitors that filter and store energy for the power supply of the driver chip.

[0057] The present invention is fully described for the purpose of clearer disclosure, and the prior art will not be listed one by one.

[0058] Finally, it should be noted that the above embodiments are intended only to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may be modified or some of the technical features thereof may be replaced with equivalents. It is obvious for those skilled in the art to combine multiple technical solutions of the present invention. However, these modifications or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. Any technical content not fully described in this utility model is generally known technology.

Claims

1. A high-power drive circuit based on 8033, characterized by: Including winding resistor RW5, resistors RW8, RW1, RW2, RW3, RW4, RW6, RW7, capacitors CW1, CW2, C1, driver chip UW4, JM7 to connect the control line input line of the relay; The control input signal of the relay includes the input signal Connector_On_In and Connector_Off_In, and the capacitor CW2 is connected in parallel at both ends of the control input signal; Connect OUTB of driver chip UW4 to Connector_On_In, VDD pin to RVCC, one end of capacitor CW1 to RVCC, and the other end of capacitor CW1 to ground GND. OUTA of the driver chip UW4 is connected to one end of the winding resistor RW5, and the other end of the winding resistor RW5 is connected to the Connector_Off_In signal terminal; INB of the driver chip UW4 is connected to one end of the resistor RW2 and the other end is grounded; One end of the resistor RW3 is connected to the INB of the driver chip UW4 and the other end is connected to the M_Connector_On_In signal terminal; one end of the resistor RW1 is connected to the M_Connector_On_In signal and the other end is connected to DVDD; The INA of the driver chip UW4 is connected to a pull-down resistor RW7. The non-grounded end of the resistor RW7 is connected in series to one end of the resistor RW4. The other end of the resistor RW4 is connected to the M_Connector_Off_In signal end. The M_Connector_Off_In signal end is connected to one end of the resistor RW6. The other end of RW6 is connected to DVDD.

2. The high-power drive circuit based on 8033 according to claim 1, characterized in that: OUTA is the output interface, connected to the motor winding; VDD is the power supply voltage of the driver chip, connected to a decoupling capacitor; OUTB is the output interface, connected to the motor winding.

3. The high-power drive circuit based on 8033 according to claim 1, characterized in that: In the driver chip UW4, GND is the reference ground; INA is the logic input terminal; INB is the logic input terminal; the voltage input range of VDD is 4V-24V, and the MOSFET tube on-resistance is connected.

4. The high-power driving circuit based on 8033 according to claim 1, characterized in that: When the INA and INB inputs are both low-level logic, the outputs OUTA and OUTB of the driver chip UW4 are high-level, and the driver chip UW4 is in Coast or Standby mode; When the input INA is low and INB is high, the output OUTA of the driver chip UW4 is low and OUTB is high, and the driver chip UW4 is in Reverse mode; When the input INA is high and INB is low, the output OUTA of the driver chip UW4 is high and OUTB is low, and the driver chip UW4 is in forward mode; When the inputs INA and INB are both high, the outputs OUTA and OUTB of the driver chip are both low, and the driver chip UW4 is in Brake mode.

5. The high-power driving circuit based on 8033 according to claim 1, characterized in that: Capacitors CW1 and CW2 are decoupling capacitors; resistors RW2 and RW7 are pull-down resistors; and resistors RW1 and RW6 are pull-up resistors.

6. The high-power driving circuit based on 8033 according to claim 1, characterized in that: RVCC is the DC output of the AC-DC circuit; The AC-DC circuit includes a diode DN2, resistors RN12 and RN13, and capacitors EN1 and EN4; The input end of diode DN2 is connected to a 12V power supply and the output end is connected to one end of the parallel resistors RN12 and RN13; The other end of the parallel resistors RN12 and RN13 is divided into two paths, one path is grounded through the parallel capacitors EN1 and EN4, and the other path is connected to the RVCC terminal.

7. The high-power driving circuit based on 8033 according to claim 6, characterized in that: Diode DN2 is a SMD rectifier diode; Resistors RN12 and RN13 are current limiting resistors; Capacitors EN1 and EN4 are plug-in aluminum electrolytic capacitors.