Device for acquiring data of outdoor sensor based on FPGA (Field Programmable Gate Array)

Abstract

The utility model belongs to the data acquisition technology, and particularly relates to a device for acquiring outdoor sensor data based on an FPGA (Field Programmable Gate Array), which comprises a channel input / output module, an AD (Analog to Digital) conversion module, a data caching module, a data storage module and a system control module, the system control module comprises an FPGA (Field Programmable Gate Array) and a microcontroller which are connected with each other; the channel input and output module is connected with an outdoor sensor and comprises a 16-channel analog signal differential input module and a 16-path configurable DIO module. The 16-channel analog signal differential input module is connected with the FPGA through the AD conversion module; the 16-path configurable DIO module is connected with the FPGA through a buffer and a latch; the data caching module comprises a buffer and an FIFO buffer area in the FPGA, and the FIFO buffer area is used for temporarily storing data; in the process that the buffer captures data from the 16-path configurable DIO module, starting or ending of data collection is controlled through a trigger signal of the FPGA. According to the utility model, the precision of data acquisition and the overall performance of the system are improved, and the system can adapt to complex and changeable working environments in the field.

Description

Technical Field

[0001] The utility model belongs to data acquisition technology, in particular to a device for acquiring outdoor sensor data based on FPGA. Background Art

[0002] The development of the information society depends largely on the advancement of information and signal processing technologies. The emergence of digital signal processing has transformed the entire landscape of information and signal processing. Data acquisition, as an essential precursor to digital signal processing, plays a critical, even decisive, role in the entire digital system, and its application has penetrated into all areas of signal processing. Real-time signal processing, digital image processing, and other fields are increasingly demanding highly flexible, high-speed, and high-precision data acquisition cards.

[0003] Currently, no single technical solution can effectively address the challenges of high flexibility, high performance, and low power consumption, and achieve widespread adoption. Ensuring the safe operation and fault detection of digital signals is becoming increasingly important in today's rapidly developing information society. To ensure data acquisition can be performed more freely and efficiently, relying on application-specific integrated circuits (ASICs) is insufficient. These immutable integrated circuits offer high customization but also limited flexibility. Therefore, acquisition cards based on field-programmable gate arrays (FPGAs) have emerged, offering high reprogrammability, parallel processing capabilities, low latency, low power consumption, high real-time performance, flexibility, and scalability. Summary of the Invention

[0004] In order to solve the problems existing in the existing technology, the utility model provides a device for collecting outdoor sensor data based on FPGA, which has the ability to collect data with high precision, flexibility, high performance and low power consumption, improves the accuracy of data collection and the overall performance of the system, and can adapt to the complex and changeable working environment in the field.

[0005] The utility model adopts the following technical solution: a device for collecting outdoor sensor data based on FPGA, including a channel input and output module, an AD conversion module, a data cache module, a data storage module, and a system control module; the system control module includes a connected FPGA and a microcontroller; the AD conversion module, the data cache module, and the data storage module are respectively connected to the FPGA;

[0006] The channel input and output module is connected to the outdoor sensor and includes a 16-channel analog signal differential input module and a 16-channel configurable DIO module. The 16-channel analog signal differential input module is connected to the FPGA through the AD conversion module to receive external analog signal inputs. The 16-channel configurable DIO module is connected to the FPGA through a buffer and latch to receive external digital signal inputs and provide digital signal outputs.

[0007] The data cache module includes a buffer and a FIFO buffer in the FPGA. The FIFO buffer is used to temporarily store data. When the buffer captures data from the 16-channel configurable DIO module, the FPGA trigger signal controls the start or end of data acquisition.

[0008] Preferably, the AD conversion module includes a high-precision differential operational amplifier and an ADC analog-to-digital converter; the 16-channel analog signal differential input module is connected to the ADC analog-to-digital converter through the differential operational amplifier.

[0009] Preferably, the system control module further includes a frequency counter connected to the FPGA.

[0010] Preferably, the device further comprises a power management unit connected to the FPGA.

[0011] Compared with the prior art, the technical effects achieved by this utility model include:

[0012] 1. This device overcomes the limitations of traditional data acquisition technology in terms of flexibility, processing speed and power consumption, and fully realizes the precise configuration control, real-time signal (data) acquisition, efficient data preprocessing and secure and stable data upload of various sensors deployed on-site, significantly improving the accuracy of data acquisition and the overall performance of the system.

[0013] 2. High precision and flexibility: With high-precision analog-to-digital conversion and flexible channel configuration capabilities, this device can accurately meet the data acquisition needs in various complex and changing environments.

[0014] 3. High-performance processing: FPGA's parallel processing capability ensures high-speed data acquisition and processing, and can handle real-time signal processing.

[0015] 4. Intelligent power consumption management: Low power consumption design reduces operating costs, extends the service life of the equipment, and improves the overall reliability of the equipment.

[0016] 5. Remote control and communication: The integrated Ethernet interface supports flexible remote control and data transmission functions, facilitates system integration and remote management, and improves the system's usability and scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural diagram of the collection device in the embodiment of the utility model. DETAILED DESCRIPTION

[0018] This FPGA-based device for collecting data from outdoor sensors (such as vibration sensors) is designed specifically for complex and changing field environments. It aims to provide precise configuration control, real-time signal acquisition, efficient data preprocessing, and secure and stable data upload for various sensors deployed on-site. By utilizing field-programmable gate array (FPGA) technology, it overcomes the limitations of traditional data acquisition in terms of flexibility, processing speed, and power consumption, improving data acquisition accuracy and overall system performance.

[0019] The present invention will be further described in detail below with reference to the embodiments and drawings, but the embodiments of the present invention are not limited thereto. Example

[0020] This embodiment of the FPGA-based device for collecting outdoor sensor data primarily includes a channel input / output module, an A / D conversion module, a data cache module, a data storage module, and a system control module. The system control module includes an FPGA and an STM32F40 microcontroller connected to each other. The A / D conversion module, data cache module, and data storage module are each connected to the FPGA.

[0021] See also Figure 1 , the channel input and output module is connected to the outdoor sensor, including a high-density 16-channel analog signal differential input module and a 16-channel configurable DIO (digital input and output) module. The 16-channel analog signal differential input module is connected to the FPGA through the AD conversion module to receive external analog signal input. The 16-channel configurable DIO module is connected to the FPGA through a buffer and a latch to receive external digital signal input and provide digital signal output. Traditional acquisition cards usually have a small number of channels, and the DIO function is fixed, which cannot meet the diverse and complex application requirements. This embodiment uses the channel input and output module to achieve flexible expansion of the number of channels and functions, greatly increases the number of input and output channels, and allows users to flexibly configure the DIO function (DI / DO switching) according to needs to meet the diverse and complex application requirements.

[0022] More specifically, the 16-channel analog signal differential input module is connected to the ADC analog-to-digital converter through a differential operational amplifier; the 16-channel configurable DIO is connected through buffers and latches, including input and output items; the system control module also includes a frequency counter connected to the FPGA, and 2-channel frequency measurement counters are connected to the FPGA to detect whether the data overflows in the FIFO, which belongs to the system control module; the TRIG external trigger signal is connected to the FPGA; the SD card is connected to the FPGA as a data storage module; the STM32F40CPU chip is connected to the FPGA for operational editing, and data transmission is carried out by Ethernet DP83848.

[0023] The AD conversion module includes a high-precision differential operational amplifier and an ADC analog-to-digital converter to achieve high-quality conversion of analog signals to digital signals. The differential operational amplifier is used to process analog signals, while the ADC analog-to-digital converter is used to convert the processed analog signals into digital signals. Most existing data acquisition cards use a single ADC conversion solution, which limits the accuracy and stability of signal processing. The AD conversion module of this embodiment uses a high-performance ADC and differential operational amplifier combination. Through high-precision differential signal processing technology, it effectively enhances the signal's anti-interference ability, ensures the stability and accuracy of data conversion, and significantly improves the quality and stability of signal conversion, making it suitable for complex and changing working environments in the field.

[0024] The data cache module includes a buffer and a FIFO buffer within the FPGA. The FIFO buffer is used to temporarily store data, ensuring stable data acquisition. While the buffer captures data from the 16-channel configurable DIO module, it controls the start and end of data acquisition via a trigger signal (i.e., TRIG) from the FPGA. Traditional acquisition cards often rely on a single control chip, which has limited processing power and makes it difficult to implement complex control logic and remote communication. In this embodiment, the data acquisition module leverages the collaborative operation of multiple controllers—the FPGA, the STM32F407 microcontroller, and the Ethernet DP83848 network interface module—to create powerful system control capabilities, enabling multi-channel synchronous data acquisition and significantly improving system control capabilities and data transmission efficiency. The FPGA's high parallel processing capabilities make data acquisition and processing more efficient, while the STM32F407 handles complex system-level control tasks and the Ethernet DP83848 network interface module provides flexible remote control and data transmission capabilities.

[0025] The system control module integrates an FPGA and an STM32F40 microcontroller, coordinating the operations of various modules and providing communication interfaces with other external devices. The STM32F40 microcontroller connects to the FPGA via an FPC50 cable. The system control module provides powerful system control capabilities. The FPGA provides functions such as address decoding, data latching, data buffering, and circuit control. The STM32F40 microcontroller handles system-level control tasks, and the Ethernet DP83848 interface provides network connectivity for the control system, allowing the acquisition card to connect to other devices or systems over the network for remote control and data transmission.

[0026] This embodiment utilizes a responsive low-power design, enabling intelligent power control through communication between the FPGA and the power management unit (PMU). This design cuts off power to modules that are not in use to reduce power consumption. It also dynamically adjusts power consumption based on the actual data collection situation. If data does not reach a threshold within a certain period of time, a low-power configuration command is sent to ensure low-power operation when the device is not in operation. Existing acquisition cards often use a fixed power consumption mode, making it impossible to adjust power consumption based on actual application requirements. This embodiment, through an intelligent power management solution, achieves low-power operation when the acquisition card is not in operation, effectively extending the device's operating time and battery life.

[0027] Programmable logic devices (FPGAs) enable the configuration of internal connections and logic units to create digital integrated circuits with predefined design functions. FPGAs can be modified at the hardware level without rebuilding the entire integrated circuit. They incorporate address decoding, data latching, data buffering, and control circuitry. They can control the timing of A / D conversion and data reading and writing during storage, making the circuits customizable through their parallel and programmable structure. Existing solutions, such as ASICs (application-specific integrated circuits), while offering high performance, cannot be modified once the design is finalized, limiting their flexibility.

[0028] The high-speed, high-performance, low-power, and flexible data acquisition process provided by this utility model includes the following steps:

[0029] First, the channel input and output module, featuring a high-density 16-channel analog signal differential input and 16 configurable DIOs, receives analog and digital signals from external devices. Before entering the AD conversion module, these signals are pre-processed by a differential operational amplifier to enhance signal stability and accuracy.

[0030] In the AD conversion module, a high-precision ADC (analog front end) converts the pre-processed analog signal into a digital signal. This process is achieved through differential input, ensuring the stability and accuracy of signal conversion.

[0031] The data acquisition process in this embodiment utilizes the collaborative work of the FPGA and the STM32F40 microcontroller to achieve multi-channel synchronous data acquisition. The FPGA's high parallel processing capability makes the data acquisition process more efficient, while the STM32F40 microcontroller is responsible for system-level control tasks such as data synchronization and trigger signal management.

[0032] The collected data is temporarily stored in the FPGA's internal FIFO (first-in, first-out) queue, awaiting subsequent processing or transmission. During this process, the data cache module ensures temporary storage and orderly processing of the data. Simultaneously, the system control module coordinates the operations of various modules and provides communication interfaces with other external devices through the FPGA, STM32F40 microcontroller, and Ethernet DP83848 network interface.

[0033] During data processing, external devices can access the data in the FIFO through configuration and perform further processing, analysis, or storage. The processed data can be stored on a local storage medium such as an SD card or transmitted to a remote server via Ethernet TCP protocol as needed.

[0034] Specifically, during data acquisition, the signal input consists of 16 channels of differential analog signals converted to digital signals via a 24-bit ADC, with a programmable sampling frequency range of 1Hz to 256kHz. A two-channel counter / frequency detector measures frequencies from 1Hz to 1MHz, and 16 configurable DIO channels can be configured to switch between DI / DO functions. The collected data is then stored in a FIFO. During testing, the acquisition card driver is configured, the card is connected, the configuration is modified, and the card's collected data is tested. The card's reliability is verified by comparing the visual display with the analog data from the signal source. The signal output consists of storing the collected data or transmitting it to a designated location via Ethernet TCP.

[0035] The above embodiments are preferred implementation methods of the present invention, but the implementation methods of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be considered as equivalent replacement methods and are included in the scope of protection of the present invention.

Claims

1. A device for collecting outdoor sensor data based on FPGA, characterized in that: It includes a channel input and output module, an AD conversion module, a data cache module, a data storage module, and a system control module; the system control module includes a connected FPGA and a microcontroller; the AD conversion module, the data cache module, and the data storage module are respectively connected to the FPGA; The channel input and output module is connected to the outdoor sensor and includes a 16-channel analog signal differential input module and a 16-channel configurable DIO module. The 16-channel analog signal differential input module is connected to the FPGA through the AD conversion module to receive external analog signal inputs. The 16-channel configurable DIO module is connected to the FPGA through a buffer and latch to receive external digital signal inputs and provide digital signal outputs. The data cache module includes a buffer and a FIFO buffer in the FPGA. The FIFO buffer is used to temporarily store data. When the buffer captures data from the 16-channel configurable DIO module, the FPGA trigger signal controls the start or end of data acquisition.

2. The device for collecting outdoor sensor data based on FPGA according to claim 1, characterized in that: The AD conversion module includes a high-precision differential operational amplifier and an ADC analog-to-digital converter; the 16-channel analog signal differential input module is connected to the ADC analog-to-digital converter through the differential operational amplifier.

3. The device for collecting outdoor sensor data based on FPGA according to claim 1, characterized in that: The system control module also includes a frequency counter connected to the FPGA.

4. The device for collecting outdoor sensor data based on FPGA according to claim 1, characterized in that: The device also includes a power management unit connected to the FPGA.

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