Zero standby driving chip

Abstract

The utility model discloses a zero standby driving chip which comprises a standby MOS tube Q1, a driving control circuit unit, a high level enable, a low level enable and a level maintaining port line, the standby MOS tube Q1 is arranged outside the chip, an MCU wafer and a DRIVER wafer are packaged together to form a sealed chip, the driving control circuit unit is integrated into the DRIVER chip, the standby MOS tube Q1 is in a disconnected state when not working, and the standby MOS tube Q1 is in a disconnected state when needing to work. According to the zero-standby driving chip, any wake-up signal is enabled by external triggering low level / high level, and then the I / O of the MCU outputs high level to the level holding signal, so that the whole system keeps working, the chip integration level is improved, the PCB layout difficulty is greatly reduced in miniaturized products such as a portable dust collector PCB, the system reliability is improved, and the cost is reduced. The standby time of the product is prolonged, and the energy consumption is saved.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a zero-standby drive chip. Background Art

[0002] For electrical devices, especially battery-powered devices, standby power consumption is a key design consideration. Often, even when in standby mode, devices need to detect and receive user input signals. To conserve energy, this power consumption needs to be minimized.

[0003] The existing solutions are mainly to build zero standby circuits with separate devices and CMOS integrated zero standby circuits, such as Figure 1 As shown in the figure, a zero standby circuit is built using separate components. By touching the button K3, Q52 is turned on to wake up VBAT. After VBAT is powered, the MCU is woken up. The MCU outputs a high level to POW_EN, so that VBAT maintains continuous output, as shown in the figure. Figure 2 As shown, CMOS integration technology is used to achieve zero-standby functionality, shutting down and waking up back-end circuitry through input ports. However, discrete components used to build zero-standby circuits require more components and occupy a large PCB area, making them unsuitable for small products. For example, lithium-ion products such as handheld vacuum cleaners and low-voltage angle grinders all use discrete components to implement zero-standby processing. CMOS integration technology is difficult to design, with long verification and tape-out cycles and overall high risk. Summary of the Invention

[0004] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the abstract and title of this application to avoid blurring the purpose of this section, the abstract and the title of the invention, and such simplifications or omissions should not be used to limit the scope of the present invention.

[0005] Therefore, the purpose of the present invention is to provide a zero-standby driver chip, which improves chip integration, saves energy consumption, reduces design difficulty, and has a flexible design, and can appropriately adjust the withstand voltage of the MOS tube according to the actual usage scenario.

[0006] To solve the above technical problems, according to one aspect of the present invention, the present invention provides the following technical solutions:

[0007] A zero standby driver chip, comprising: a standby MOS tube Q1, a drive control circuit unit, a high level enable, a low level enable, and a level holding line;

[0008] The standby MOS tube Q1 is placed outside the chip, the MCU wafer and the driver wafer are packaged together to form a packaged chip, and the drive control circuit unit is integrated into the driver chip;

[0009] The standby MOS tube Q1 is in a disconnected state when it is not working. When it needs to work, it is first triggered by an external low-level enable / high-level enable wake-up signal, and then the MCU's I / O outputs a high level to the level holding signal to keep the entire system working.

[0010] As a preferred solution of the zero-standby driver chip described in the present invention, it further includes a 5V LDO, the standby MOS tube Q1 is externally arranged outside the chip, and the 5V LDO is located inside the DRIVER chip.

[0011] As a preferred solution of the zero-standby driver chip described in the present invention, it further includes a 5V LDO and a 12V LDO. The 5V LDO and the 12V LDO are located inside the DRIVER chip, and the standby MOS tube Q1 is placed outside the chip.

[0012] As a preferred solution of the zero-standby driver chip described in the present invention, it also includes a 5V LDO, which is located inside the DRIVER. The standby MOS tube Q1 is integrated into the chip. The MOS tube Q1 wafer, MCU wafer, and DRIVER wafer are packaged together to form a sealed chip.

[0013] As a preferred solution of the zero-standby driver chip described in the present invention, it also includes a 5V LDO and a 12V LDO. The 5V LDO and 12V LDO are located inside the DRIVER chip, and the standby MOS tube Q1 is integrated into the chip. The MOS tube Q1 wafer, MCU wafer, and DRIVER wafer are packaged together to form a sealed chip.

[0014] As a preferred solution of the zero-standby driver chip described in the present invention, a QFN40 / QFN48 frame is used for packaging, and the QFN40 / QFN48 frame consists of a single base island and pins arranged around the single base island;

[0015] The standby MOS tube Q1 wafer is attached to the single base island using conductive adhesive; the MCU wafer and DRVIVER wafer are attached to the single base island using insulating adhesive;

[0016] The MCU's I / O is connected to the corresponding PAD pin of the DRIVER chip through a metal wire to achieve a level-maintaining function. The gate of the standby MOS tube Q1 is connected to the pin of the frame and the control PAD of the DRIVER chip through a metal wire, and the source and drain are connected to the pin of the frame respectively. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer are connected to the pin of the frame respectively through metal wires.

[0017] As a preferred solution of the zero-standby driver chip described in the present invention, a QFN40 / QFN48 frame is used for packaging, and the QFN40 / QFN48 frame consists of a first base island, a second base island, and pins arranged around the first base island and the second base island;

[0018] The MCU chip wafer is attached to the first base island using conductive adhesive, the standby MOS tube Q1 wafer is attached to the second base island using conductive adhesive, and the driver chip wafer is attached to the first base island using conductive adhesive.

[0019] The MCU's I / O is connected to the corresponding PAD pin of the DRIVER chip through a metal wire to achieve the level maintenance function. The gate of the standby MOS tube Q1 is connected to the pin of the frame and the control PAD of the DRIVER chip through a metal wire. The source and drain are respectively connected to the pins of the frame. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer are respectively connected to the pins of the frame through metal wires.

[0020] Compared with the prior art, the present invention has the following beneficial effects: the present invention improves chip integration, greatly reduces the difficulty of PCB layout in miniaturized products such as portable vacuum cleaner PCB boards, improves system reliability, extends product standby time, and saves energy consumption.

[0021] Zero standby is achieved by controlling the MOSFET on / off. This solves the power consumption issue during standby, enables chip integration, and reduces the complexity of PCB layout. Furthermore, the circuit is mature, verification cycles are short, and packaging costs are low. This reduces design complexity and offers design flexibility, allowing the MOSFET withstand voltage to be adjusted appropriately based on actual usage scenarios, ensuring the chip's highly competitive cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and detailed embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be derived from these drawings without inventive effort. Among them:

[0023] Figure 1 The present invention provides a circuit for building a zero standby function using separation devices in the prior art;

[0024] Figure 2 The present invention provides a circuit for realizing zero standby function by using CMOS integration technology in the prior art;

[0025] Figure 3 This is a circuit diagram of a first embodiment of a zero-standby driver chip of the present invention;

[0026] Figure 4 This is a circuit diagram of a second embodiment of a zero-standby driver chip of the present invention;

[0027] Figure 5 This is a circuit diagram of a third embodiment of a zero-standby driver chip of the present invention;

[0028] Figure 6 This is a circuit diagram of a fourth embodiment of a zero-standby driver chip according to the present invention;

[0029] Figure 7 This is a layout diagram of a first embodiment of a zero-standby driver chip package of the present invention;

[0030] Figure 8 This is a layout diagram of a second embodiment of a zero-standby driver chip package of the present invention. DETAILED DESCRIPTION

[0031] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0032] Next, the present invention is described in detail with reference to schematic diagrams. For ease of illustration, cross-sectional views of device structures may be partially enlarged and not to scale when describing the embodiments of the present invention. Furthermore, the schematic diagrams are merely illustrative and should not limit the scope of protection of the present invention. Furthermore, in actual production, three-dimensional dimensions, including length, width, and depth, should be included.

[0033] To make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0034] The present invention provides a zero-standby driver chip, which improves chip integration, saves energy consumption, reduces design difficulty, and has a flexible design, and can appropriately adjust the withstand voltage of the MOS tube according to actual usage scenarios.

[0035] Example 1

[0036] like Figure 3 As shown, the zero-standby driver chip provided in this embodiment includes a standby MOS tube Q1, a drive control circuit unit, a high-level enable, a low-level enable, a level holding line, and a 5V LDO. The standby MOS tube Q1 is external to the chip, and the level holding line, the 5V LDO, and the drive control circuit unit are integrated inside the chip. The standby MOS tube Q1 is in a disconnected state when not working. When it needs to work, first, any wake-up signal of a low-level enable / high-level enable is triggered externally, and then the I / O of the MCU outputs a high level to the level holding signal to keep the entire system working.

[0037] Example 2

[0038] like Figure 4 As shown, the zero-standby driver chip provided in this embodiment includes a standby MOS tube Q1, a drive control circuit unit, a high-level enable, a low-level enable, a level holding line, a 5V LDO, and a 12V LDO. The standby MOS tube Q1 is external to the chip, and the level holding line, the 5V LDO, the 12V LDO, and the drive control circuit unit are integrated inside the chip. The standby MOS tube Q1 is in a disconnected state when not working. When it needs to work, first, any wake-up signal of a low-level enable / high-level enable is triggered externally, and then the I / O of the MCU outputs a high level to the level holding signal to keep the entire system working.

[0039] Example 3

[0040] like Figure 5 As shown, the zero-standby driver chip provided in this embodiment includes a standby MOS tube Q1, a driver control circuit unit, a high-level enable, a low-level enable, a level holding line, and a 5V LDO. The standby MOS tube Q1, the level holding line, the 5V LDO, and the driver control circuit unit are integrated inside the chip. When the standby MOS tube Q1 is not working, it is in a disconnected state. When it needs to work, first, any wake-up signal of a low-level enable / high-level enable is triggered externally, and then the I / O of the MCU outputs a high level to the level holding signal to keep the entire system working.

[0041] Example 4

[0042] like Figure 6 As shown, the zero-standby driver chip provided by this embodiment includes a standby MOS tube Q1, a drive control circuit unit, a high-level enable, a low-level enable, a level holding line, a 5V LDO, and a 12V LDO. The standby MOS tube Q1, the level holding line, the 5V LDO, the 12V LDO, and the drive control circuit unit are integrated inside the chip. The standby MOS tube Q1 is in a disconnected state when not working. When it needs to work, first, any wake-up signal of a low-level enable / high-level enable is triggered externally, and then the I / O of the MCU outputs a high level to the level holding signal to keep the entire system working.

[0043] Example 5

[0044] like Figure 7 As shown, in this embodiment, a QFN40 / QFN48 frame is used for packaging, and the QFN40 / QFN48 frame consists of a single base island 100 and pins 400 arranged around the single base island 100;

[0045] The standby MOS transistor Q1300 wafer is attached to the single base island 100 using conductive adhesive. The MCU wafer 500 and the DRIVVER wafer 200 are attached to the single base island 100 using insulating adhesive. The MCU's I / O is connected to the corresponding PAD pin of the DRIVER chip via metal wire to achieve a level-holding function. The gate of the standby MOS transistor Q1300 is connected to the pin 400 of the frame and the control PAD of the DRIVER chip via metal wire, and the source and drain are respectively connected to the pins of the frame. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer 200 are respectively connected to the pins of the frame via metal wire.

[0046] Example 6

[0047] like Figure 8 As shown, in this embodiment, a QFN40 / QFN48 frame is used for packaging. The QFN40 / QFN48 frame consists of a first base island 110, a second base island 120, and pins 400 arranged around the first base island 110 and the second base island 120. The MCU wafer 500 is attached to the first base island 110 using conductive adhesive, the standby MOS tube Q1300 is attached to the second base island 120 using conductive adhesive, and the DRIVER chip wafer 200 is attached to the first base island 110 using conductive adhesive. The I / O of the MCU is connected to the corresponding PAD pin of the DRIVER chip through a metal wire to achieve a level holding function. The gate of the standby MOS tube Q1 is connected to the pin 400 of the frame and the control PAD of the DRIVER chip through a metal wire, and the source and drain are respectively connected to the pins of the frame. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer 200 are respectively connected to the pins of the frame through metal wires.

[0048] Of course, in the case of meeting the above functions, it is not limited to a fixed package form and pin number, but is only illustrated by QFN40 / QFN48. Packages such as SSOP and PQFN can also be used.

[0049] Although the present invention has been described above with reference to embodiments, various modifications may be made thereto and equivalent components may be substituted without departing from the scope of the present invention. In particular, as long as there are no structural conflicts, the various features of the embodiments disclosed herein may be combined with each other in any manner, and the omission of an exhaustive description of such combinations in this specification is solely for the sake of space and resource conservation. Therefore, the present invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A zero-standby driver chip, characterized in that: include: Standby MOS tube Q1, drive control circuit unit, high level enable, low level enable, level holding line; The standby MOS tube Q1 is placed outside the chip, the MCU wafer and the driver wafer are packaged together to form a packaged chip, and the drive control circuit unit is integrated into the driver chip; The standby MOS tube Q1 is in a disconnected state when it is not working. When it needs to work, it is first triggered by an external low-level enable / high-level enable wake-up signal, and then the MCU's I / O outputs a high level to the level holding signal to keep the entire system working.

2. The zero-standby driver chip according to claim 1, characterized in that: It also includes a 5V LDO. The standby MOS tube Q1 is placed outside the chip, and the 5V LDO is located inside the DRIVER chip.

3. The zero-standby driver chip according to claim 1, characterized in that: It also includes 5V LDO and 12V LDO. The 5V LDO and 12V LDO are located inside the DRIVER chip, and the standby MOS tube Q1 is placed outside the chip.

4. The zero-standby driver chip according to claim 1, characterized in that: It also includes a 5V LDO, which is located inside the DRIVER. The standby MOS tube Q1 is integrated into the chip. The MOS tube Q1 wafer, MCU wafer, and DRIVER wafer are packaged together to form a sealed chip.

5. The zero-standby driver chip according to claim 1, characterized in that: It also includes 5V LDO and 12V LDO. The 5V LDO and 12V LDO are located inside the DRIVER chip. The standby MOS tube Q1 is integrated into the chip. The MOS tube Q1 wafer, MCU wafer, and DRIVER wafer are packaged together to form a sealed chip.

6. A zero-standby driver chip according to any one of claims 1 to 5, characterized in that: The QFN40 / QFN48 frame is used for packaging. The QFN40 / QFN48 frame consists of a single base island and pins arranged around the single base island. The standby MOS tube Q1 wafer is attached to the single base island using conductive adhesive, and the MCU wafer and DRVIVER wafer are attached to the single base island using insulating adhesive. The MCU's I / O is connected to the corresponding PAD pin of the DRIVER chip through a metal wire to achieve a level-maintaining function. The gate of the standby MOS tube Q1 is connected to the pin of the frame and the control PAD of the DRIVER chip through a metal wire, and the source and drain are connected to the pin of the frame respectively. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer are connected to the pin of the frame respectively through metal wires.

7. A zero-standby driver chip according to any one of claims 1 to 5, characterized in that: The QFN40 / QFN48 frame is used for packaging. The QFN40 / QFN48 frame consists of a first base island, a second base island, and pins arranged around the first base island and the second base island. The MCU chip wafer is attached to the first base island using conductive adhesive, the standby MOS tube Q1 wafer is attached to the second base island using conductive adhesive, and the driver chip wafer is attached to the first base island using conductive adhesive. The MCU's I / O is connected to the corresponding PAD pin of the DRIVER chip through a metal wire to achieve the level maintenance function. The gate of the standby MOS tube Q1 is connected to the pin of the frame and the control PAD of the DRIVER chip through a metal wire. The source and drain are respectively connected to the pins of the frame. The low-level wake-up enable and high-level wake-up enable PADs on the DRIVER chip wafer are respectively connected to the pins of the frame through metal wires.

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