Battery capacity control circuit and battery capacity control device

Abstract

The utility model provides a battery capacity control circuit and a battery capacity control device, the battery capacity control circuit comprises a power supply circuit, a detection interface, a charging detection circuit, a charging control circuit, a discharging detection circuit, a discharging control circuit and a discharging circuit, the input end of the charging detection circuit is electrically connected with the battery discharging terminal of the detection interface; the output end of the charging detection circuit is electrically connected with the control end of the charging control circuit, the power input end of the charging control circuit is electrically connected with the power supply circuit, the power output end of the charging control circuit is electrically connected with the battery charging terminal of the detection interface, and the input end of the discharging detection circuit is electrically connected with the battery discharging terminal. The output end of the discharge detection circuit is electrically connected with the control end of the discharge control circuit, the input end of the discharge control circuit is electrically connected with the battery discharge terminal, and the output end of the discharge control circuit is electrically connected with the discharge circuit. The battery capacity control circuit provided by the utility model can be used for conveniently controlling the battery capacity of an electronic product.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a battery capacity control circuit and a battery capacity control device applying the battery capacity control circuit. Background Art

[0002] Currently, portable electronic products are all battery-powered for easy portability. Before leaving the factory, the battery capacity of these products must be controlled, typically between 60% and 80%. This prevents excessive battery life from causing safety incidents during transportation, and prevents low battery life from impacting the user experience when the device is first powered on.

[0003] In an existing battery test discharge circuit, a battery interface, a voltage conversion circuit for converting the battery output voltage to a target voltage and a power supply voltage, a voltage comparison circuit, and a discharge circuit are provided. The battery interface is used to place the battery, the battery voltage is output to the voltage conversion circuit via the battery interface, the voltage conversion circuit is used to convert the battery output voltage to a target voltage and a power supply voltage, the voltage comparison circuit compares the battery voltage with the target voltage, and the power supply voltage is used to power the voltage comparison circuit. When the battery voltage is higher than the target voltage, the discharge circuit is controlled to discharge the battery, and when the battery voltage is lower than the target voltage, the discharge circuit is controlled to stop discharging the battery. Thus, by setting an appropriate target voltage value, the battery charge is always kept in a partially charged state, enabling real-time battery charging function testing of the PCBA board in the electronic product, while also improving the efficiency of the charging test. However, this circuit, used for discharge testing, only considers the circuit for discharging the battery, and does not consider battery charging control, which cannot meet the charging needs when the battery is low.

[0004] Therefore, a more optimized battery capacity control circuit needs to be considered. Utility Model Content

[0005] The first object of the present utility model is to provide a battery capacity control circuit which can conveniently control the battery capacity of electronic products.

[0006] A second object of the present invention is to provide a battery capacity control device that can conveniently control the battery capacity of electronic products.

[0007] In order to achieve the above-mentioned first purpose, the battery capacity control circuit provided by the utility model includes a power supply circuit, a detection interface, a charging detection circuit, a charging control circuit, a discharge detection circuit, a discharge control circuit and a discharge circuit, the input end of the charging detection circuit is electrically connected to the battery discharge terminal of the detection interface, the output end of the charging detection circuit is electrically connected to the control end of the charging control circuit, the power input end of the charging control circuit is electrically connected to the power supply circuit, the power output end of the charging control circuit is electrically connected to the battery charging terminal of the detection interface, the input end of the discharge detection circuit is electrically connected to the battery discharge terminal, the output end of the discharge detection circuit is electrically connected to the control end of the discharge control circuit, the input end of the discharge control circuit is electrically connected to the battery discharge terminal, and the output end of the discharge control circuit is electrically connected to the discharge circuit.

[0008] It can be seen from the above scheme that the battery capacity control circuit of the utility model can be electrically connected to the charging interface of the product to be detected through the detection interface by setting a power supply circuit, a detection interface, a charging detection circuit, a charging control circuit, a discharge detection circuit, a discharge control circuit and a discharge circuit. The charging detection circuit and the discharge detection circuit are used to perform voltage detection on the product to be detected. When the power is insufficient, the product to be detected is charged through the charging control circuit. When the power is too high, the product to be detected is discharged through the discharge control circuit and the discharge circuit, thereby facilitating automatic control of the battery capacity of the product to be detected, so that the battery capacity of the product to be detected is within the capacity range that meets production requirements.

[0009] In a further embodiment, the charging detection circuit includes a first comparator and a first threshold voltage circuit, the non-inverting input of the first comparator is electrically connected to the first threshold voltage circuit, the inverting input of the first comparator is electrically connected to the battery discharge terminal, and the output of the first comparator is electrically connected to the control terminal of the charging control circuit.

[0010] It can be seen that by setting a first comparator for detecting the voltage of the battery discharge terminal, it is convenient to detect whether the product to be tested needs to be charged, and the output end of the first comparator sends a control signal to the control end of the charging control circuit to control the charging control circuit to turn on or off the path between the power supply circuit and the battery charging terminal of the detection interface.

[0011] In a further embodiment, the charging control circuit includes a first NMOS transistor and a first PMOS transistor, the gate of the first NMOS transistor is electrically connected to the output end of the charging detection circuit, the source of the first NMOS transistor is grounded, the drain of the first NMOS transistor is electrically connected to the gate of the first PMOS transistor, the source of the first PMOS transistor is electrically connected to the power supply circuit, and the drain of the first PMOS transistor is electrically connected to the battery charging terminal.

[0012] It can be seen that the charging control circuit can ensure control stability by providing the first NMOS transistor and the first PMOS transistor to control the conduction or disconnection between the power supply circuit and the battery charging terminal.

[0013] In a further embodiment, the discharge detection circuit includes a second comparator and a second threshold voltage circuit, the non-inverting input of the second comparator is electrically connected to the battery discharge terminal, the inverting input of the second comparator is electrically connected to the second threshold voltage circuit, and the output of the second comparator is electrically connected to the control terminal of the discharge control circuit.

[0014] It can be seen from this that the discharge detection circuit is configured with a second comparator for detecting the voltage at the battery discharge terminal, thereby facilitating detection of whether the product to be detected needs to be discharged. The output end of the second comparator sends a control signal to the control end of the discharge control circuit to control the discharge control circuit to open or close the path between the battery discharge terminal and the discharge circuit.

[0015] In a further embodiment, the discharge control circuit includes a second NMOS transistor, an AND gate, a third NMOS transistor, and a second PMOS transistor. The output of the second comparator is electrically connected to the first input of the AND gate, the gate of the second NMOS transistor is electrically connected to the battery charging terminal, the source of the second NMOS transistor is grounded, the drain of the second NMOS transistor is electrically connected to the power supply circuit, the drain of the second NMOS transistor is also electrically connected to the second input of the AND gate, the gate of the third NMOS transistor is electrically connected to the output of the AND gate, the source of the third NMOS transistor is grounded, the drain of the third NMOS transistor is electrically connected to the gate of the second PMOS transistor, the source of the second PMOS transistor is electrically connected to the battery discharge terminal, and the drain of the second PMOS transistor is electrically connected to the discharge circuit.

[0016] Thus, the discharge control circuit, by providing a second NMOS transistor and an AND gate, can be used to ensure that the charge control circuit is turned off during discharge. Using a third NMOS transistor and a second PMOS transistor to control the connection between the battery discharge terminal and the discharge circuit ensures control stability.

[0017] In a further solution, the discharge circuit includes a discharge resistor, a first end of the discharge resistor is electrically connected to the drain of the second PMOS transistor, and a second end of the discharge resistor is grounded.

[0018] It can be seen that by setting the discharge resistor, it is convenient to discharge the product to be tested.

[0019] In order to achieve the second purpose of the present invention, the battery capacity control device provided by the present invention is provided with a battery capacity control circuit, and the battery capacity control circuit adopts the above-mentioned battery capacity control circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1This is a circuit principle block diagram of an embodiment of the battery capacity control circuit of the present utility model.

[0021] Figure 2 This is a circuit principle diagram of a charging detection circuit in an embodiment of a battery capacity control circuit of the present utility model.

[0022] Figure 3 It is a circuit principle diagram of the charging control circuit in the embodiment of the battery capacity control circuit of the utility model.

[0023] Figure 4 This is a circuit principle diagram of a discharge detection circuit in an embodiment of a battery capacity control circuit of the present utility model.

[0024] Figure 5 It is a circuit principle diagram of the discharge control circuit and the discharge circuit in the embodiment of the battery capacity control circuit of the utility model.

[0025] The present invention will be further described below with reference to the accompanying drawings and embodiments. DETAILED DESCRIPTION

[0026] Battery capacity control circuit embodiment:

[0027] like Figure 1 As shown, in this embodiment, the battery capacity control circuit includes a power supply circuit 1, a detection interface 2, a charge detection circuit 3, a charge control circuit 4, a discharge detection circuit 5, a discharge control circuit 6, and a discharge circuit 7. The input end of the charge detection circuit 3 is electrically connected to the battery discharge terminal VBAT of the detection interface 2, the output end of the charge detection circuit 3 is electrically connected to the control end of the charge control circuit 4, the power input end of the charge control circuit 4 is electrically connected to the power supply circuit 1, the power output end of the charge control circuit 4 is electrically connected to the battery charging terminal VBUS of the detection interface 2, the input end of the discharge detection circuit 5 is electrically connected to the battery discharge terminal VBAT, the output end of the discharge detection circuit 5 is electrically connected to the control end of the discharge control circuit 6, the input end of the discharge control circuit 6 is electrically connected to the battery discharge terminal VBAT, and the output end of the discharge control circuit 6 is electrically connected to the discharge circuit 7. Preferably, the detection interface 2 adopts a USB interface.

[0028] In this embodiment, see Figure 2The charging detection circuit 3 includes a first comparator U1 and a first threshold voltage circuit 31. The non-inverting input terminal of the first comparator U1 is electrically connected to the first threshold voltage circuit 31, the inverting input terminal of the first comparator U1 is electrically connected to the battery discharge terminal VBAT, and the output terminal of the first comparator U1 is electrically connected to the control terminal of the charging control circuit 4 through the terminal PWR_EN. The threshold voltage output by the first threshold voltage circuit 31 to the first comparator U1 can be set according to the battery power to be controlled. Preferably, the threshold voltage is 3.9V. In this embodiment, the first comparator U1 uses a hysteresis comparator to avoid repeated charging and discharging. Preferably, the first comparator U1 uses a chip of the LMV331 IDBVR model.

[0029] See also Figure 3 The charging control circuit 4 includes a first NMOS transistor Q1 and a first PMOS transistor Q2. The gate of the first NMOS transistor Q1 is electrically connected to the output terminal of the charging detection circuit 3. The source of the first NMOS transistor Q1 is grounded. The drain of the first NMOS transistor Q1 is electrically connected to the gate of the first PMOS transistor Q2. The source of the first PMOS transistor Q2 is electrically connected to the power supply circuit 1 via the terminal 5V_IN. The drain of the first PMOS transistor Q2 is electrically connected to the battery charging terminal VBUS. By configuring the first NMOS transistor Q1 and the first PMOS transistor Q2 to control the conduction between the power supply circuit 1 and the battery charging terminal VBUS, the charging control circuit 4 can ensure control stability.

[0030] In this embodiment, see Figure 4 The discharge detection circuit 5 includes a second comparator U2 and a second threshold voltage circuit 51. The non-inverting input of the second comparator U2 is electrically connected to the battery discharge terminal VBAT, the inverting input of the second comparator U2 is electrically connected to the second threshold voltage circuit 51, and the output of the second comparator U2 is electrically connected to the control terminal of the discharge control circuit 6 via the terminal VBAT_OUT. The threshold voltage output by the second threshold voltage circuit 51 to the second comparator U2 can be set according to the battery power required to be controlled. Preferably, the threshold voltage is 3.9V. Preferably, the second comparator U2 uses an LMV331 IDBVR chip.

[0031] See also Figure 5The discharge control circuit 6 includes a second NMOS transistor Q3, an AND gate U3, a third NMOS transistor Q4, and a second PMOS transistor Q5. The output of the second comparator U2 is electrically connected to the first input of the AND gate U3. The gate of the second NMOS transistor Q3 is electrically connected to the battery charging terminal VBUS. The source of the second NMOS transistor Q3 is grounded. The drain of the second NMOS transistor Q3 is electrically connected to the power supply circuit 1. The drain of the second NMOS transistor Q3 is also electrically connected to the second input of the AND gate U3. The gate of the third NMOS transistor Q4 is electrically connected to the output of the AND gate U3. The source of the third NMOS transistor Q4 is grounded. The drain of the third NMOS transistor Q4 is electrically connected to the gate of the second PMOS transistor Q5. The source of the second PMOS transistor Q5 is electrically connected to the battery discharging terminal VBAT. The drain of the second PMOS transistor Q5 is electrically connected to the discharge circuit 7. By configuring the second NMOS transistor Q3 and the AND gate U3, the discharge control circuit 6 can ensure that the charging control circuit 4 is turned off during discharge. The third NMOS transistor Q4 and the second PMOS transistor Q5 are used to control the conduction or disconnection between the battery discharge terminal VBAT and the discharge circuit 7, thereby ensuring the stability of the control. Preferably, the AND gate U3 uses a chip of the SN74AHC1 G08DBVR model.

[0032] In this embodiment, the discharge circuit 7 includes a discharge resistor R1, a first end of which is electrically connected to the drain of the second PMOS transistor Q5, and a second end of which is grounded. The discharge resistor R1 facilitates discharging of the product to be tested.

[0033] In this embodiment, when the battery capacity control circuit is working, the detection interface 2 is electrically connected to the charging interface of the product to be detected, and the charging detection circuit 3 and the discharge detection circuit 5 perform voltage detection on the product to be detected. When the battery level is lower than 3.9V, the product to be detected is charged through the charging control circuit 4. When the battery level is higher than 3.9V, the product to be detected is discharged through the discharge control circuit 6 and the discharge circuit 7.

[0034] Battery capacity control device embodiment:

[0035] In this embodiment, the battery capacity control device is provided with a battery capacity control circuit, and the battery capacity control circuit adopts the battery capacity control circuit of the above embodiment.

[0036] It can be seen from the above scheme that the battery capacity control circuit of the present invention can be connected to the product to be detected through the detection interface 2 by setting the power supply circuit 1, the detection interface 2, the charging detection circuit 3, the charging control circuit 4, the discharge detection circuit 5, the discharge control circuit 6 and the discharge circuit 7. The charging detection circuit 3 and the discharge detection circuit 5 are used to perform voltage detection on the product to be detected. When the power is insufficient, the product to be detected is charged through the charging control circuit 4. When the power is too high, the product to be detected is discharged through the discharge control circuit 6 and the discharge circuit 7, thereby facilitating automatic control of the battery capacity of the product to be detected, so that the battery capacity of the product to be detected is within the capacity range that meets production requirements.

[0037] It should be noted that the above are only preferred embodiments of the present invention, but the design concept of the utility model is not limited thereto. Any non-substantial modifications made to the present invention using this concept also fall within the scope of protection of the present invention.

Claims

1. A battery capacity control circuit, characterized in that: The battery comprises a power supply circuit, a detection interface, a charge detection circuit, a charge control circuit, a discharge detection circuit, a discharge control circuit, and a discharge circuit. The input end of the charge detection circuit is electrically connected to the battery discharge terminal of the detection interface, the output end of the charge detection circuit is electrically connected to the control end of the charge control circuit, the power input end of the charge control circuit is electrically connected to the power supply circuit, the power output end of the charge control circuit is electrically connected to the battery charge terminal of the detection interface, the input end of the discharge detection circuit is electrically connected to the battery discharge terminal, the output end of the discharge detection circuit is electrically connected to the control end of the discharge control circuit, the input end of the discharge control circuit is electrically connected to the battery discharge terminal, and the output end of the discharge control circuit is electrically connected to the discharge circuit.

2. The battery capacity control circuit according to claim 1, wherein: The charging detection circuit includes a first comparator and a first threshold voltage circuit, wherein a non-inverting input terminal of the first comparator is electrically connected to the first threshold voltage circuit, an inverting input terminal of the first comparator is electrically connected to a discharge terminal of the battery, and an output terminal of the first comparator is electrically connected to a control terminal of the charging control circuit.

3. The battery capacity control circuit according to claim 2, wherein: The charging control circuit includes a first NMOS transistor and a first PMOS transistor. The gate of the first NMOS transistor is electrically connected to the output end of the charging detection circuit, the source of the first NMOS transistor is grounded, the drain of the first NMOS transistor is electrically connected to the gate of the first PMOS transistor, the source of the first PMOS transistor is electrically connected to the power supply circuit, and the drain of the first PMOS transistor is electrically connected to the battery charging terminal.

4. The battery capacity control circuit according to any one of claims 1 to 3, characterized in that: The discharge detection circuit includes a second comparator and a second threshold voltage circuit, wherein a non-inverting input of the second comparator is electrically connected to the discharge terminal of the battery, an inverting input of the second comparator is electrically connected to the second threshold voltage circuit, and an output of the second comparator is electrically connected to the control terminal of the discharge control circuit.

5. The battery capacity control circuit according to claim 4, wherein: The discharge control circuit includes a second NMOS transistor and an AND gate, a third NMOS transistor and a second PMOS transistor. The output end of the second comparator is electrically connected to the first input end of the AND gate, the gate of the second NMOS transistor is electrically connected to the charging terminal of the battery, the source of the second NMOS transistor is grounded, the drain of the second NMOS transistor is electrically connected to the power supply circuit, the drain of the second NMOS transistor is also electrically connected to the second input end of the AND gate, the gate of the third NMOS transistor is electrically connected to the output end of the AND gate, the source of the third NMOS transistor is grounded, the drain of the third NMOS transistor is electrically connected to the gate of the second PMOS transistor, the source of the second PMOS transistor is electrically connected to the discharge terminal of the battery, and the drain of the second PMOS transistor is electrically connected to the discharge circuit.

6. The battery capacity control circuit according to claim 5, wherein: The discharge circuit includes a discharge resistor, a first end of the discharge resistor is electrically connected to the drain of the second PMOS transistor, and a second end of the discharge resistor is grounded.

7. A battery capacity control device, provided with a battery capacity control circuit, characterized in that: The battery capacity control circuit adopts the battery capacity control circuit according to any one of claims 1 to 6.

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