FPGA-based multi-channel digital-to-analog signal conversion processing circuit

Abstract

The utility model discloses a multi-channel digital-analog signal conversion processing circuit based on an FPGA, and relates to the technical field of data communication. The utility model relates to a multi-channel signal conversion device, which is composed of an FPGA control circuit, RS485 circuits, voltage conversion circuits, D / A conversion circuits and operational amplifier circuits, an I / O interface of the FPGA is connected with the RS485 circuits and a D / A conversion chip and is used for controlling the transmit-receive mode of the RS485 circuits and the work of the D / A conversion chip, the voltage conversion circuits are connected with the FPGA and the D / A conversion circuit, multiple groups of RS485 circuits and multiple groups of operational amplifier circuits are arranged and can perform multi-channel signal conversion at the same time, and the FPGA control circuit is used for controlling the transmit-receive mode of the RS485 circuits and the work of the D / A conversion chip. The system can realize conversion between multiple paths of digital signals and analog signals, has high-performance processing capability, and can process a large amount of data and carry out rapid communication transmission at the same time.

Description

Technical Field

[0001] The utility model relates to the technical field of data communication, in particular to a multi-channel digital-to-analog signal conversion processing circuit based on FPGA. Background Art

[0002] In the communications field, system testing often requires the use of both digital and analog signals, as well as conversion between analog / digital (A / D) and digital / analog (D / A). In actual testing, multi-channel signal acquisition and transmission are required. Many traditional signal processing systems can only perform conversion for a single function or channel, failing to meet certain specific requirements. Processing multi-channel signals requires high-performance equipment to simultaneously handle large amounts of data and enable rapid communication transmission.

[0003] In order to solve this problem, a circuit that can perform multi-channel signal conversion and communication is needed to facilitate the conversion between digital signals and analog signals. Utility Model Content

[0004] The purpose of this utility model is to design a signal processing circuit that provides stable system operation and can simultaneously convert multiple signals. This design uses an FPGA as the main control chip to design a circuit that can support multiple signal conversions. This allows for expansion or reduction of conversion circuits without exceeding the FPGA interface.

[0005] The technical solution proposed in this utility model is implemented as follows: a multi-channel digital-to-analog signal conversion and processing circuit based on an FPGA, comprising an FPGA control circuit, an RS485 circuit, a voltage conversion circuit, a D / A converter circuit, and an op amp circuit. The FPGA control circuit, which controls the transmit and receive modes of the RS485 circuit and the operation of the D / A converter circuit, is connected to multiple RS485 circuits. The FPGA control circuit is also connected to the voltage conversion circuit, whose input is connected to the FPGA and whose output is connected to the input of the D / A converter circuit. The output of the D / A converter circuit is connected to the input of the multi-channel op amp circuit. The RS485 circuit includes a TX port for transmitting a data signal, an RX port for receiving a data signal, and an EN port for enabling a signal. These three ports are connected to the FPGA's I / O interface. The RS485 circuit also includes two ports for receiving digital signals from external devices. The input of the voltage conversion circuit is connected to the 3.3V signal output of the FPGA, while the 5V signal output of the voltage conversion circuit is connected to the input of the D / A converter circuit. The clock signal port, the synchronization signal port and the data signal port of the D / A conversion circuit are connected to the voltage conversion circuit, and the four output signal ports of the D / A conversion circuit are connected to the operational amplifier circuit.

[0006] The four input ports of the two groups of operational amplifier circuits are respectively connected to the four output signal ports of the D / A conversion circuit, and the output signal ports of the operational amplifier circuits output analog signals.

[0007] The FPGA-based multi-channel digital-to-analog signal conversion and processing circuit provided by the utility model fully utilizes the parallel processing capability of the FPGA. Through the use of multi-channel interface circuits, it has high-performance processing capabilities, can process a large amount of data simultaneously, and realizes the conversion and communication of multiple signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a system block diagram of the digital-to-analog signal conversion processing circuit.

[0009] Figure 2 This is the schematic diagram of the FPGA control circuit

[0010] Figure 3 This is the RS485 circuit schematic: including (1) the first RS485 circuit, (2) the second RS485 circuit, (3) the third RS485 circuit, (4) the fourth RS485 circuit

[0011] Figure 4 This is the D / A conversion circuit schematic

[0012] Figure 5 This is the voltage conversion circuit schematic

[0013] Figure 6 This is the schematic diagram of the operational amplifier circuit: including (1) the first operational amplifier circuit, (2) the second operational amplifier circuit

[0014] In the figure: In order to clearly illustrate the connection relationship between each unit circuit, the actual application chip is directly used.

[0015] The chip model used by FPGA is GW2A-55K-UBGA676, the chip model used by RS485 circuit is SIT65HVD75, the chip model used by voltage conversion circuit is SM8T245, the chip model used by D / A conversion circuit is ZYA5064, the chip model used by voltage conversion circuit is SM8T245, and the chip model used by op amp circuit is SGM8273.

[0016] As can be seen from the figure, the digital-to-analog signal conversion and processing circuit provided by the present invention adopts the same type of components in the multi-channel design of the unit circuit to ensure the maintainability and easy repair of the circuit; all chips can use domestic models, so that electronic components and related technologies can be independently controlled. DETAILED DESCRIPTION

[0017] The technical solutions and advantages of the present invention are further described below with reference to the accompanying drawings and embodiments:

[0018] like Figures 1 to 6 As shown in the figure, a multi-channel digital-to-analog conversion signal processing circuit based on FPGA includes an FPGA control circuit (GW2A-55K-UBGA676), an RS485 circuit (SIT65HVD75), a voltage conversion circuit (SM8T245), a D / A conversion circuit (ZYA5064), and an operational amplifier circuit (SGM8273).

[0019] The FPGA control circuit (GW2A-55K-UBGA676) is connected to a 4-way RS485 circuit (SIT65HVD75) to control the data transmission and reception of the RS485 circuit. The first RS485 signal is connected to the AB23, AA25, and AA23 pins of the FPGA, the second RS485 signal is connected to the AE26, AE25, and AD25 pins of the FPGA, the third RS485 signal is connected to the AD26, AC26, and AB26 pins of the FPGA, and the fourth RS485 signal is connected to the Y1, W1, and V1 pins of the FPGA. At the same time, the FPGA is connected to a voltage conversion circuit (SM8T245) to output clock signals, synchronization signals, and data signals. The relevant signals are respectively connected to the R4, AA2, V2, and T4 pins of the FPGA.

[0020] The RS485 circuit (SIT65HVD75) is connected to the FPGA control circuit (GW2A-55K-UBGA676), receiving digital signals from the external device and transmitting them to the FPGA control circuit. Pin 8 of U3, U4, U5, and U6 is connected to a 3.3V voltage, and a 120Ω resistor is connected between pins 6 and 7. The A and B signals are connected to external devices to receive digital signals, respectively. R43, R44, R47, V1, R48, R49, R52, V2, R53, R54, R57, V3, R58, R59, R62, and V4 are the RS485 circuit protection resistors and diodes, respectively.

[0021] The voltage conversion circuit (SM8T245) is connected to the FPGA control circuit (GW2A-55K-UBGA676) and the D / A conversion circuit (ZYA5064), respectively. It receives 3.3V signals and converts them to 5V. Pins 1 and 2 of D1 are connected to 3.3V. A high level on pin 2 indicates a switch from direction A to direction B. Pins 23 and 24 are connected to 5V.

[0022] The D / A converter circuit (ZYA5064) is connected to the voltage converter circuit (SM8T245) and the op amp circuit (SGM8273). After receiving the voltage-converted signal, the D / A converter circuit outputs four signals to the op amp circuit. Pin 3 of D / A converter chip D2 is connected to a 5V voltage supply and a 33Ω ferrite bead, while pin 7 is connected to a 5V reference voltage. Pins 1, 2, 13, and 14 are connected to the voltage converter circuit, respectively, while pins 4, 5, 10, and 11 are connected to the op amp circuit.

[0023] The op amp circuit (SGM8273) is connected to the D / A converter circuit (ZYA5064). Pins 8 and 4 are connected to analog voltages of +12V and -12V respectively, pin 3 is connected to a 2V reference voltage, a 40kΩ resistor is connected between pins 1 and 2, and a 10kΩ resistor is connected between pins 2 and 6. Pins 1 and 7 are analog signal outputs.

Claims

1. A multi-channel digital-to-analog signal conversion and processing circuit based on FPGA, characterized by: It includes an FPGA control circuit, an RS485 circuit, a voltage conversion circuit, a D / A conversion circuit, and an operational amplifier circuit. The FPGA control circuit, which is used to control the transceiver mode of the RS485 circuit and the operation of the D / A conversion circuit, is connected to multiple groups of RS485 circuits. The FPGA control circuit is also connected to the voltage conversion circuit. The input end of the voltage conversion circuit is connected to the FPGA, and the output end is connected to the input end of the D / A conversion circuit. The output end of the D / A conversion circuit is connected to the input end of the multi-channel operational amplifier circuit.

2. The FPGA-based multi-channel digital-to-analog signal conversion processing circuit according to claim 1, characterized in that: The RS485 circuit includes a data transmission signal TX port, a data reception signal RX port, and an enable signal EN port. These three ports are connected to the FPGA's I / O interface. The RS485 circuit also includes two ports connected to external devices for receiving digital signals.

3. The FPGA-based multi-channel digital-to-analog signal conversion processing circuit according to claim 1, characterized in that: The input end of the voltage conversion circuit is connected to the 3.3V signal output end of the FPGA, and the 5V signal output end of the voltage conversion circuit is connected to the input end of the D / A conversion circuit.

4. The FPGA-based multi-channel digital-to-analog signal conversion processing circuit according to claim 1, wherein: The clock signal port, the synchronization signal port and the data signal port of the D / A conversion circuit are connected to the voltage conversion circuit, and the four output signal ports of the D / A conversion circuit are connected to the operational amplifier circuit.

5. The FPGA-based multi-channel digital-to-analog signal conversion processing circuit according to claim 1, characterized in that: The four input ports of the two groups of operational amplifier circuits are respectively connected to the four output signal ports of the D / A conversion circuit, and the output signal ports of the operational amplifier circuits output analog signals.

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