Low-power-consumption data acquisition device based on energy storage system

Abstract

The utility model discloses a low-power-consumption data acquisition device based on an energy storage system, which comprises a main control module, a real-time clock module, the energy storage system, a charging and voltage conversion module, a sensor module, a camera and a Type-C interface, and is characterized in that the sensor module comprises an infrared sensor, an ambient light sensor, an infrared filter and a plurality of infrared LED lamps; the main control module is connected with the real-time clock module, the charging and voltage conversion module, the sensor module, the camera and the Type-C interface. According to the utility model, the power consumption can be effectively reduced, the test shows that the power consumption reaches the microampere level at the minimum, rapid and safe wireless transmission can be carried out, and data is safer and more reliable.

Description

Technical Field

[0001] The utility model relates to the technical field of data acquisition equipment, in particular to a low-power data acquisition device based on an energy storage system. Background Art

[0002] A data acquisition terminal is a device used to collect various physical quantities, convert them into electrical signals, amplify them, digitize them, and store and transmit the collected data. With the continuous development of industry, more and more fields require field data collection. Using mains electricity in the field requires installing transmission lines, which increases the cost of the entire system. Due to deployment constraints, field data acquisition terminals typically use long-life lithium batteries or other types of high-energy-density batteries as their power source. These batteries require regular replacement but can provide stable power for an extended period of time. However, the high power consumption of data acquisition terminals results in a shorter battery life, leading to higher costs. Summary of the Invention

[0003] In order to solve the above problems, the purpose of the present invention is to provide a low-power data acquisition device based on an energy storage system.

[0004] In order to achieve the above-mentioned purpose of the invention, the present invention adopts the following technical solutions:

[0005] A low-power data acquisition device based on an energy storage system includes a main control module, a real-time clock module, an energy storage system, a charging and voltage conversion module, a sensor module, a camera, and a Type-C interface. The sensor module includes an infrared sensor, an ambient light sensor, an infrared filter, and several infrared LED lights. The main control module is connected to the real-time clock module, the charging and voltage conversion module, the sensor module, the camera, and the Type-C interface. The real-time clock module includes a real-time clock chip U3, field-effect transistors Q1, Q2, Q5, Q7, and Q9. The clock terminal SCL of the real-time clock chip U3 is connected to the drain of the field-effect transistor Q1, the data terminal SDA is connected to the drain of the field-effect transistor Q2, and the crystal input A crystal oscillator Y1 is connected between the output terminal, the power supply terminal VDD is grounded via the capacitor C6, the ground terminal VSS is grounded, the interrupt terminal INT is connected to the drains of the field effect transistors Q5, Q7, and Q9, and is also connected to the charging and voltage conversion module; the sources of the field effect transistors Q1 and Q2 are connected to the main control module, and the gates are connected to the charging and voltage conversion module; resistors R17, R19, and R22 are connected between the gate and source of the field effect transistors Q5, Q7, and Q9, respectively, and the sources are grounded, the gate of the field effect transistor Q5 is connected to the infrared signal processing module via the jumper JP2, the gate of the field effect transistor Q9 is connected to the infrared signal processing module via the button SW1, and the gates of the field effect transistors Q7 and Q9 are connected to the main control module.

[0006] Furthermore, the above-mentioned infrared signal processing module includes an infrared sensor U6, a voltage regulator chip U2, a D latch U4, and field effect transistors Q8 and Q10. The input terminal VI of the voltage regulator chip U2 is connected to the Type-C interface, and the output terminal VO is connected to the power supply terminal VCC of the D latch U4 and the power supply terminal VDD of the infrared sensor U6, and is connected to the gate of the field effect transistor Q9 in the real-time clock module through the button SW1, and the ground terminal GND is grounded; the data input terminal D and the latch enable terminal LE of the D latch U4 are connected to the main control module, and the data input terminal D and the latch enable terminal LE are connected to the main control module through the resistor R15 and the resistor R1 respectively. 6 is grounded, the output enable terminal OE is connected to the control terminal G and is also grounded, the power supply terminal VCC is grounded via the capacitor C10, and a resistor R20 is connected between the power supply terminal VCC and the data output terminal Q, and the data output terminal Q is connected to the gate of the field effect transistor Q8; the source of the field effect transistor Q8 is connected to the alarm level output terminal REL of the infrared sensor U6, the power supply terminal VDD is grounded via the capacitor C16, and the ground terminal VSS is grounded; a resistor R25 is connected between the gate and source of the field effect transistor Q10, and the drain is connected to the main control module. The gate of the field effect transistor Q10 and the drain of the field effect transistor Q8 are connected to the gate of the field effect transistor Q5 in the real-time clock module via the jumper JP2.

[0007] Furthermore, the charging and voltage conversion module includes a charging chip U1, field effect transistors Q3, Q4, Q6, and a voltage regulator chip U5. The power supply terminal Vcc of the charging chip U1 is connected to the output terminal of the Type-C interface, and is connected to the charging status indication terminal CHRG through a series resistor R4 and a light-emitting diode D1, and is connected to the power charging completion indication terminal STDBY through a series resistor R5 and a light-emitting diode D1, and is also connected to the second pin of the jumper JP1; the charging current setting terminal PROG of the charging chip U1 is connected to the ground terminal GND through parallel resistors R11 and R12 and is grounded, and the output terminal is connected to the energy storage system and the drain of the field effect transistor Q3, and is grounded through a capacitor C5; the source and gate of the field effect transistor Q3 and the field effect transistor Q4 are connected, and a capacitor C8 is connected between the gate and source, and the gate is connected through a resistor R13. Grounded, and connected to the drain of the field effect transistor Q4 through a series resistor R14 and a voltage regulator diode D6, the anode of the voltage regulator diode D6 is connected to the first pin of the jumper JP1; the drain of the field effect transistor Q4 is connected to the source of the field effect transistor Q6 and the input terminal IN of the voltage regulator chip U5 through a filter circuit composed of a capacitor C9 and an inductor L2, a resistor R18 is connected between the gate and source of the field effect transistor Q4, the drain is connected to the enable terminal EN of the voltage regulator chip U5 and grounded through a resistor R21, and the gate is connected to the drains of the field effect transistors Q5, Q7, and Q9 in the real-time clock module; the ground terminal GND of the voltage regulator chip U5 is grounded, the output terminal LX is connected to one end of the inductor L3, the other end of the inductor L3 is connected to the main control module, and is connected to the feedback regulation terminal FB through a parallel resistor R23 and a capacitor C17, and the feedback regulation terminal FB is grounded through a resistor R24.

[0008] Furthermore, the above-mentioned energy storage system includes a lithium battery J1, the positive electrode of the lithium battery J1 is connected to the output end of the charging chip U1 in the charging and voltage conversion module, the positive electrode of the lithium battery J1 is connected to one end of the resistor R1 and is grounded through the capacitor C1, the other end of the resistor R1 is connected to the main control module and is grounded through the resistor R2, and the negative electrode of the lithium battery J1 is grounded.

[0009] Furthermore, the main control module is connected to the plurality of infrared LED lamps via a first driver.

[0010] Furthermore, the main control module is connected to the infrared filter via a second driver.

[0011] Furthermore, the above-mentioned main control module adopts ESP32S3 series chips.

[0012] Due to the adoption of the above-mentioned technical solution, the utility model has the following advantages:

[0013] This low-power data acquisition device based on an energy storage system has a reasonable structural design, simple wiring, and extended battery life. It uses the ESP32S3 series main control module to communicate with the real-time clock module through the IIC interface to set time parameters for controlling the device's sleep and wake-up, thereby reducing power consumption. Tests have shown that power consumption is as low as microamperes. It can perform fast and secure wireless transmission, making data more secure and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a structural block diagram of the low-power data acquisition device based on the energy storage system of the utility model;

[0015] Figure 2 yes Figure 1 Circuit diagram of the real-time clock module in;

[0016] Figure 3 yes Figure 1 Circuit diagram of the infrared signal processing module in;

[0017] Figure 4 yes Figure 1 Circuit diagram of the charging and voltage conversion module in FIG;

[0018] Figure 5 yes Figure 1 Circuit diagram of the main control module in;

[0019] Figure 6 yes Figure 1 Circuit diagram of the Type-C interface in Figure 1. DETAILED DESCRIPTION

[0020] The technical solution of the present utility model is further described in detail below with reference to the accompanying drawings and embodiments.

[0021] like Figures 1 to 6As shown, a low-power data acquisition device based on an energy storage system includes a main control module, a real-time clock module, an energy storage system, a charging and voltage conversion module, a sensor module, a camera, and a Type-C interface. The sensor module includes an infrared sensor U6, several infrared LED lights, an ambient light sensor, and an infrared filter; the main control module includes a main control chip U10, and the main control module is connected to the real-time clock module, the charging and voltage conversion module, the sensor module, the camera, and the Type-C interface; the real-time clock module The real-time clock chip U3 includes a real-time clock chip, field effect tubes Q1, Q2, Q5, Q7, and Q9. The clock terminal SCL of the real-time clock chip U3 is connected to the drain of the field effect tube Q1, the data terminal SDA is connected to the drain of the field effect tube Q2, a crystal oscillator Y1 is connected between the crystal oscillator input and output terminals, the power supply terminal VDD is grounded via a capacitor C6, the ground terminal VSS is grounded, the interrupt terminal INT is connected to the drain of the field effect tubes Q5, Q7, and Q9, and is connected to the charging and voltage conversion module; the source of the field effect tubes Q1 and Q2 is connected via interfaces J6 and I 2 The C bus is connected to the main control chip U10 of the main control module, and the gate is connected to the charging and voltage conversion module; resistors R17, R19, and R22 are connected between the gate and source of the field effect transistors Q5, Q7, and Q9, respectively, and the sources are grounded. The gate of the field effect transistor Q5 is connected to the infrared signal processing module via jumper JP2, and the gate of the field effect transistor Q9 is connected to the infrared signal processing module via button SW1. The gates of the field effect transistors Q7 and Q9 are respectively connected to the GPIO14 port (pin 22) and GPIO2 port (pin 38) of the main control chip U10; the Type-C interface is used for software burning, and serves as a USB bus interface and charging pin to power the entire data acquisition device.

[0022] The above-mentioned infrared signal processing module includes an infrared sensor U6, a voltage regulator chip U2, a D latch U4, and field effect transistors Q8 and Q10. The input terminal VI of the voltage regulator chip U2 is connected to the positive power terminal VBUS of the Type-C interface, and is grounded through the capacitor C4, and the ground terminal GND is grounded. The output terminal VO is connected to the power terminal VCC of the D latch U4 and the power terminal VDD of the infrared sensor U6, and is connected to the gate of the field effect transistor Q9 in the real-time clock module through the button SW1, and is grounded through the capacitor C7. The voltage regulator chip U2 is started by the button SW1, and then the main control chip U10 is responsible for taking over the PWR_EN signal output by the gate of the field effect transistor Q7; the data input terminal D and the latch enable terminal LE of the D latch U4 are connected to the GPIO21 port (pin 23) and the GPIO45 port (pin 23) of the main control chip U10. The data input terminal D and the latch enable terminal LE are connected to the ground via resistors R15 and R16 respectively. The output enable terminal OE is connected to the control terminal G and is also grounded. The power supply terminal VCC is grounded via capacitor C10 and is connected to the data output terminal Q via resistor R20. The data output terminal Q is connected to the gate of the field effect transistor Q8. The source of the field effect transistor Q8 is connected to the alarm level output terminal REL of the infrared sensor U6. The power supply terminal VDD is grounded via capacitor C16, and the ground terminal VSS is grounded. A resistor R25 is connected between the gate and source of the field effect transistor Q10, and the drain is connected to the GPIO47 port (pin 24) of the main control chip U10. The gate of the field effect transistor Q10 and the drain of the field effect transistor Q8 are connected to the gate of the field effect transistor Q5 in the real-time clock module via jumper JP2. The voltage regulator chip U2 converts the voltage into 2.8V.

[0023] The charging and voltage conversion module includes a charging chip U1, field effect tubes Q3, Q4, Q6, and a voltage regulator chip U5. The power supply terminal Vcc of the charging chip U1 is connected to the output terminal of the Type-C interface, and is connected to the charging status indicator terminal CHRG through a series resistor R4 and a light-emitting diode D1. It is connected to the power charging completion indicator terminal STDBY through a series resistor R5 and a light-emitting diode D1, and is also connected to the second pin of the jumper JP1; the charging current setting terminal PR of the charging chip U1 OG is connected to the ground terminal GND through parallel resistors R11 and R12 and is grounded. The output end is connected to the energy storage system and the drain of the field effect transistor Q3 and is grounded through capacitor C5. The source and gate of the field effect transistor Q3 and the field effect transistor Q4 are connected, and a capacitor C8 is connected between the gate and source. The gate is grounded through resistor R13 and is connected to the drain of the field effect transistor Q4 through a series resistor R14 and a voltage regulator diode D6. The positive electrode of the voltage regulator diode D6 is connected to the first pin of the jumper JP1. The drain of the field effect tube Q4 is connected to the source of the field effect tube Q6 and the input terminal IN of the voltage regulator chip U5 through the filter circuit composed of capacitor C9 and inductor L2. A resistor R18 is connected between the gate and source of the field effect tube Q4, the drain is connected to the enable terminal EN of the voltage regulator chip U5 and is grounded through resistor R21, and the gate is connected to the drain of the field effect tubes Q5, Q7, and Q9 in the real-time clock module; the input terminal IN of the voltage regulator chip U5 is grounded through several parallel capacitors, namely capacitors C11 to C15, and the ground terminal G ND is grounded, the output terminal LX is connected to one end of the inductor L3, the other end of the inductor L3 is connected to the main control chip U10 of the main control module, and is connected to the feedback regulation terminal FB through the parallel resistor R23 and capacitor C17, and the feedback regulation terminal FB is grounded through the resistor R24; the other end of the inductor L3 is also grounded through multiple parallel capacitors, namely capacitors C17~C20, C24, and C25; the energy storage system is charged through the charging chip U1, and the voltage stabilizing chip U5 converts the voltage into 3.3V to power the main control module.

[0024] The above-mentioned energy storage system includes a lithium battery J1, the positive electrode of the lithium battery J1 is connected to the output end of the charging chip U1 in the charging and voltage conversion module, the positive electrode of the lithium battery J1 is connected to one end of the resistor R1 and is grounded through the capacitor C1, the other end of the resistor R1 is connected to the GPIO1 port (pin 39) of the main control chip U10 and is grounded through the resistor R2, and the negative electrode of the lithium battery J1 is grounded.

[0025] The above-mentioned camera and ambient light sensor are connected through interfaces J6 and I 2 The C bus is connected to the main control module; the 3.3V voltage output by the voltage regulator chip U5 in the charging and voltage conversion module is converted into 2.8V and 1.2V voltages respectively through two step-down chips to power the camera.

[0026] Preferably, the real-time clock chip U3 adopts the PCF85063A chip; the voltage regulator chip U2 adopts the XC6206 chip; the charging chip U1 adopts the TP4057 chip; and the voltage regulator chip U5 adopts the SY8089AAAC chip.

[0027] The above-mentioned field effect transistors Q1, Q2, Q5, Q7, Q9, and Q10 are all N-channel enhancement type field effect transistors, preferably, the model used is 2N7002; the field effect transistors Q3, Q4, Q6, Q8, Q9, and Q10 are all P-channel enhancement type field effect transistors, the model used is A03401A.

[0028] The main control module is connected to the plurality of infrared LED lamps via a first driver. Preferably, the first driver is an MT9284-28J chip, and the enable end of the MT9284-28J chip is connected to the GPIO46 port (pin 16) of the main control chip U10.

[0029] The main control module is connected to the infrared filter via a second driver. Preferably, the second driver is an AP1511B chip, and the control input end of the AP1511B chip is connected to the GPIO48 port (pin 25) of the main control chip U10.

[0030] The ambient light sensor is used in conjunction with several infrared LEDs and infrared filters to achieve night vision and optimize image effects.

[0031] The infrared sensor U6 is used to detect the thermal radiation of the low-power data acquisition device. It is not affected by light and can be used during the day and at night.

[0032] The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention. Without departing from the spirit and scope of the present invention, all equivalent changes and modifications made within the scope of the patent application of the present invention shall fall within the scope of patent protection of the present invention.

Claims

1. A low-power data acquisition device based on an energy storage system, characterized by: It includes a main control module, a real-time clock module, an energy storage system, a charging and voltage conversion module, a sensor module, a camera, and a Type-C interface. The sensor module includes an infrared sensor, an ambient light sensor, an infrared filter, and several infrared LED lights. The main control module is connected to the real-time clock module, the charging and voltage conversion module, the sensor module, the camera, and the Type-C interface. The real-time clock module includes a real-time clock chip U3, field-effect transistors Q1, Q2, Q5, Q7, and Q9. The clock terminal SCL of the real-time clock chip U3 is connected to the drain of the field-effect transistor Q1, the data terminal SDA is connected to the drain of the field-effect transistor Q2, and a crystal oscillator is connected between the crystal oscillator input and output terminals. Y1, the power supply terminal VDD is grounded via the capacitor C6, the ground terminal VSS is grounded, the interrupt terminal INT is connected to the drains of the field-effect transistors Q5, Q7, and Q9, and is also connected to the charging and voltage conversion module; the sources of the field-effect transistors Q1 and Q2 are connected to the main control module, and the gates are connected to the charging and voltage conversion module; resistors R17, R19, and R22 are connected between the gate and source of the field-effect transistors Q5, Q7, and Q9, respectively, and the sources are grounded, the gate of the field-effect transistor Q5 is connected to the infrared signal processing module via the jumper JP2, the gate of the field-effect transistor Q9 is connected to the infrared signal processing module via the button SW1, and the gates of the field-effect transistors Q7 and Q9 are connected to the main control module.

2. The low-power data acquisition device based on the energy storage system according to claim 1, characterized in that: The infrared signal processing module includes an infrared sensor U6, a voltage regulator chip U2, a D latch U4, and field effect transistors Q8 and Q10. The input terminal VI of the voltage regulator chip U2 is connected to the Type-C interface, and the output terminal VO is connected to the power supply terminal VCC of the D latch U4 and the power supply terminal VDD of the infrared sensor U6, and is connected to the gate of the field effect transistor Q9 in the real-time clock module through the button SW1, and the ground terminal GND is grounded; the data input terminal D and the latch enable terminal LE of the D latch U4 are connected to the main control module, and the data input terminal D and the latch enable terminal LE are grounded through the resistor R15 and the resistor R16 respectively. The output enable terminal OE is connected to the control terminal G and is grounded. The power supply terminal VCC is grounded via the capacitor C10 and is connected to the data output terminal Q via a resistor R20. The data output terminal Q is connected to the gate of the field effect transistor Q8. The source of the field effect transistor Q8 is connected to the alarm level output terminal REL of the infrared sensor U6. The power supply terminal VDD is grounded via the capacitor C16, and the ground terminal VSS is grounded. A resistor R25 is connected between the gate and source of the field effect transistor Q10, and the drain is connected to the main control module. The gate of the field effect transistor Q10 and the drain of the field effect transistor Q8 are connected to the gate of the field effect transistor Q5 in the real-time clock module via the jumper JP2.

3. The low-power data acquisition device based on the energy storage system according to claim 1, characterized in that: The charging and voltage conversion module includes a charging chip U1, field effect transistors Q3, Q4, Q6, and a voltage regulator chip U5. The power supply terminal Vcc of the charging chip U1 is connected to the output terminal of the Type-C interface, and is connected to the charging status indication terminal CHRG through a series resistor R4 and a light-emitting diode D1. It is connected to the power charging completion indication terminal STDBY through a series resistor R5 and a light-emitting diode D1, and is also connected to the second pin of the jumper JP1; the charging current setting terminal PROG of the charging chip U1 is connected to the ground terminal GND through parallel resistors R11 and R12 and is grounded. The output terminal is connected to the energy storage system and the drain of the field effect transistor Q3, and is grounded through a capacitor C5; the source and gate of the field effect transistors Q3 and Q4 are connected, and a capacitor C8 is connected between the gate and source. The gate is grounded through a resistor R13. The drain of the field effect transistor Q4 is connected to the series resistor R14 and the voltage regulator diode D6, and the positive electrode of the voltage regulator diode D6 is connected to the first pin of the jumper JP1; the drain of the field effect transistor Q4 is connected to the source of the field effect transistor Q6 and the input terminal IN of the voltage regulator chip U5 through the filter circuit composed of the capacitor C9 and the inductor L2, and a resistor R18 is connected between the gate and source of the field effect transistor Q4, the drain is connected to the enable terminal EN of the voltage regulator chip U5 and is grounded through the resistor R21, and the gate is connected to the drain of the field effect transistors Q5, Q7, and Q9 in the real-time clock module; the ground terminal GND of the voltage regulator chip U5 is grounded, the output terminal LX is connected to one end of the inductor L3, the other end of the inductor L3 is connected to the main control module, and is connected to the feedback regulation terminal FB through the parallel resistor R23 and capacitor C17, and the feedback regulation terminal FB is grounded through the resistor R24.

4. The low-power data acquisition device based on the energy storage system according to claim 1 or 3, characterized in that: The energy storage system includes a lithium battery J1, the positive electrode of the lithium battery J1 is connected to the output end of the charging chip U1 in the charging and voltage conversion module, the positive electrode of the lithium battery J1 is connected to one end of the resistor R1 and is grounded via the capacitor C1, the other end of the resistor R1 is connected to the main control module and is grounded via the resistor R2, and the negative electrode of the lithium battery J1 is grounded.

5. The low-power data acquisition device based on the energy storage system according to claim 1, characterized in that: The main control module is connected to the plurality of infrared LED lamps via a first driver.

6. The low-power data acquisition device based on the energy storage system according to claim 1, characterized in that: The main control module is connected to the infrared filter via a second driver.

7. The low-power data acquisition device based on the energy storage system according to claim 1, characterized in that: The main control module adopts ESP32S3 series chip.

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