Passivation contact solar cell

Abstract

The utility model discloses a passivation contact solar cell, and relates to the technical field of solar cells. The passivation contact solar cell comprises a silicon substrate, and carrier collection regions and isolation regions are alternately arranged on the first main surface of the silicon substrate; the carrier collection layer and the first metal electrode are arranged in the carrier collection area; wherein the carrier collection layer is in contact with the silicon substrate, and the first metal electrode is electrically connected with the carrier collection layer; the first conductive film layer is arranged in the isolation area; and the first conductive film layer is in contact with the silicon substrate and the carrier collection layer adjacent to the silicon substrate. According to the embodiment, the first conductive film layer is arranged in the isolation region, so that the problem that carriers in the isolation region can only be transmitted through the silicon substrate with relatively high resistance, so that the transmission capability is relatively poor is solved, and the cell efficiency is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of solar cells, in particular to a passivated contact solar cell. Background Art

[0002] Passivated contact solar cells are a type of solar cell that has achieved full back surface passivation. Due to its advantages such as high conversion rate, it has become one of the mainstream products of photovoltaic crystalline silicon cells.

[0003] If there is doped polysilicon in the back carrier collection layer of a passivated contact solar cell, especially a tunneling oxide passivated contact cell (TOPCon cell), the long-wave response of the passivated contact solar cell will be affected to a certain extent due to the light absorption of doped polysilicon. Technicians can improve the long-wave response of the passivated contact solar cell by setting up a doped polysilicon layer only in part of the back area to reduce the absorption of light by the doped polysilicon layer. However, since other areas do not have a doped polysilicon layer and a tunneling oxide layer, the lateral transmission of carriers in this area is blocked and can only be transmitted laterally to the electrode on the back through the silicon substrate with a higher resistance, which greatly affects the fill factor of the passivated contact solar cell and reduces the cell efficiency.

[0004] Therefore, how to improve the lateral transport capability of carriers on the back side of passivated contact solar cells has become an urgent problem to be solved. Utility Model Content

[0005] In view of this, an embodiment of the present invention provides a passivated contact solar cell, which solves the problem that carriers in the isolation area can only be transmitted through the silicon substrate with larger resistance, resulting in poor transmission capacity, by setting a first conductive film layer in the isolation area, thereby improving the battery efficiency.

[0006] To achieve the above objectives, the present invention provides a passivated contact solar cell, comprising:

[0007] A silicon substrate, wherein carrier collection regions and isolation regions are alternately arranged on a first main surface of the silicon substrate;

[0008] A carrier collection layer and a first metal electrode are provided in the carrier collection region; wherein the carrier collection layer is in contact with the silicon substrate, and the first metal electrode is electrically connected to the carrier collection layer;

[0009] a first conductive film layer disposed in the isolation region;

[0010] The first conductive film layer is in contact with the silicon substrate and the adjacent carrier collection layer.

[0011] One embodiment of the above-mentioned utility model has the following advantages or beneficial effects: by setting a first conductive film layer in the isolation area, carriers in the isolation area can be transmitted laterally through the first conductive film layer, which solves the problem that carriers in the isolation area can only be transmitted through the silicon substrate with large resistance, resulting in poor transmission capacity, and can effectively improve battery efficiency.

[0012] In addition, by arranging alternating carrier collection areas and isolation areas on the first main surface to form a local polysilicon structure, the problem of long-wave response of passivated contact solar cells can be effectively solved, allowing the battery to fully absorb reflected light and improve the short-circuit current without affecting the passivation performance of the battery.

[0013] The further effects of the above-mentioned non-conventional optional manner will be described below in conjunction with specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are provided to facilitate a better understanding of the present invention and do not constitute an undue limitation of the present invention.

[0015] Figure 1 1 is a schematic structural diagram of a first passivated contact solar cell according to an embodiment of the present utility model;

[0016] Figure 2 1 is a schematic diagram of the specific structure of a first passivated contact solar cell according to an embodiment of the present utility model;

[0017] Figure 3 1 is a schematic structural diagram of a second passivated contact solar cell according to an embodiment of the present utility model;

[0018] Figure 4 is a schematic structural diagram of a passivated contact solar cell (i.e., cell 1) whose first main surface is not a local polysilicon structure;

[0019] Figure 5 Schematic diagram of the structure of a passivation contact solar cell (ie, cell 2) whose first main surface is a local polysilicon structure but does not have a first conductive film layer.

[0020] Reference numerals:

[0021] 10-silicon substrate; 20-carrier collection layer; 21-tunneling oxide layer; 22-doped polysilicon layer; 30-first conductive film layer; 40-first passivation anti-reflection layer; 50-emitter layer; 60-passivation layer; 70-second passivation anti-reflection layer; 80-first metal electrode; 90-second metal electrode; 100-second conductive film layer. DETAILED DESCRIPTION

[0022] The following description of a passivated contact solar cell according to an exemplary embodiment of the present invention is provided in conjunction with the accompanying drawings. Various details of the exemplary embodiments of the present invention are included to facilitate understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications may be made to the exemplary embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted from the following description.

[0023] It should be pointed out that, in the absence of conflict, the embodiments of the present invention and the technical features therein can be combined with each other.

[0024] It should be noted that the first main surface of the silicon substrate involved in the embodiment of the present invention refers to the surface facing away from the sunlight when the passivated contact solar cell is in working state, and correspondingly, the second main surface of the silicon substrate refers to the surface facing the sunlight when the passivated contact solar cell is in working state.

[0025] Figure 1 FIG. 1 is a schematic diagram of the first structure of a passivated contact solar cell according to an embodiment of the present invention. Figure 1 As shown, the passivated contact solar cell of the embodiment of the present invention mainly includes: a silicon substrate 10, wherein the carrier collection region and the isolation region are alternately arranged on the first main surface of the above-mentioned silicon substrate 10; a carrier collection layer 20 and a first metal electrode 80 are arranged in the above-mentioned carrier collection region; wherein the above-mentioned carrier collection layer 20 is in contact with the above-mentioned silicon substrate 10, and the above-mentioned first metal electrode 80 is electrically connected to the above-mentioned carrier collection layer 20; a first conductive film layer 30 is arranged in the above-mentioned isolation region; the above-mentioned first conductive film layer 30 is in contact with the above-mentioned silicon substrate 10 and the above-mentioned carrier collection layer 20 adjacent thereto.

[0026] The silicon substrate 10 is an N-type silicon wafer. The first main surface of the silicon substrate 10 is a flat surface or a velvet structure. The velvet structure can be a pyramid-shaped structure or a tower-base structure, but is not limited thereto. The tower-base structure can be formed by polishing the pyramid-shaped structure.

[0027] The thickness of the first conductive film layer 30 may be 80-120 nm. As an example, the thickness of the first conductive film layer 30 may be 80 nm, 100 nm, 110 nm, or 120 nm. The refractive index of the first conductive film layer 30 may be 1.8-2.1%. As an example, the refractive index of the first conductive film layer 30 may be 1.8%, 1.9%, 2.0%, or 2.1%. The sheet resistance of the first conductive film layer 30 is 20-60 Ω / sq. As an example, the sheet resistance of the first conductive film layer 30 is 20 Ω / sq, 40 Ω / sq, 50 Ω / sq, or 60 Ω / sq.

[0028] By disposing a first conductive film layer 30 in contact with the adjacent carrier collection layer 20 in the isolation region, carriers can be transported laterally through the first conductive film layer 30 within the isolation region, thus avoiding the problem of carriers being transported laterally through the silicon substrate 10 with greater resistance in this region, thereby affecting the efficiency of the passivated contact solar cell. Furthermore, the thickness, refractive index, and sheet resistance of the first conductive film layer 30 are controlled, ensuring that the first conductive film layer 30 has even better lateral carrier transport capabilities.

[0029] The difference between the carrier collection region and the isolation region on the first major surface of the silicon substrate 10 is that the first metal electrode 80 is disposed in the carrier collection region, wherein the orthographic projection of the first metal electrode 80 on the carrier collection region falls within the carrier collection region. Optimally, the width of the carrier collection region should be the same as the width of the first metal electrode 80, so that carriers generated in the silicon substrate 10 below the carrier collection region are directly transmitted longitudinally to the first metal electrode 80, eliminating the need for lateral carrier transport. However, in the actual fabrication of a passivated contact cell, a certain process window must be reserved to prevent the first metal electrode 80 from being printed into the isolation region to avoid process errors. Consequently, the width of the carrier collection region is set to be slightly larger than the width of the first metal electrode 80.

[0030] The carrier collection region is provided with a carrier collection layer 20. The carrier collection layer 20 may include a stacked tunneling oxide layer 21 and a doped polysilicon layer 22. The tunneling oxide layer 21 is located between the silicon substrate 10 and the doped polysilicon layer 22. That is, the tunneling oxide layer 21 and the doped polysilicon layer 22 are sequentially arranged in a direction away from the silicon substrate 10.

[0031] Furthermore, the thickness of the tunnel oxide layer 21 may be 1-2 nm. As an example, the thickness of the tunnel oxide layer 21 may be 1 nm, 1.3 nm, 1.5 nm, 1.8 nm, or 2 nm. The thickness of the doped polysilicon layer 22 may be 50-300 nm. As an example, the thickness of the doped polysilicon layer 22 may be 50 nm, 100 nm, 200 nm, or 300 nm.

[0032] The doping type of the doped polysilicon layer 22 should be the same as the conductivity type of the silicon substrate 10 , that is, when an N-type silicon wafer is used as the silicon substrate 10 , the doping type of the doped polysilicon layer 22 should be N-type.

[0033] In addition, the carrier collection region may further include a first passivation anti-reflection layer 40. The first passivation anti-reflection layer 40 is stacked on the carrier collection layer 20 and extends onto the first conductive film layer 30, so that the first main surface of the silicon substrate 10 is entirely covered by the first passivation anti-reflection layer 40.

[0034] The first passivation anti-reflection layer 40 may be one or more of silicon nitride, silicon oxide, and silicon oxynitride, but is not limited thereto.

[0035] refer to Figure 2 The first main surface of the silicon substrate 10 of the passivated contact cell of the present invention is provided with alternating carrier collection regions and isolation regions. In the carrier collection region, a tunneling oxide layer 21, a doped polysilicon layer 22, and a first passivation anti-reflection layer 40 are sequentially provided in a direction away from the silicon substrate 10, as well as a first metal electrode 80 electrically connected to the doped polysilicon layer 22; in the isolation region, a first conductive film layer 30 and a first passivation anti-reflection layer 40 are sequentially provided in a direction away from the silicon substrate 10. Thus, the structure in which the tunneling oxide layer 21 and the doped polysilicon layer 22 are present in the carrier collection region but not in the isolation region is a local polysilicon structure.

[0036] In an optional embodiment, the passivated contact solar cell may further include: a second conductive film layer 100 stacked on the carrier collection layer 20. It should be noted that when the second conductive film layer 100 is provided on the carrier collection layer 20, the first metal electrode 80 is electrically connected to the second conductive film layer 100.

[0037] Here, electrical connection refers to a connection mode in which there is movement of carriers between each other so as to conduct electricity. It is understood that the two parties of the electrical connection can be in contact with each other to conduct electricity, or can be non-contacting but still conduct electricity to each other.

[0038] Furthermore, when a second conductive film layer 100 is provided on the carrier collection layer 20, the second conductive film layer 100 can be an integrated structure with the first conductive film layer 30, that is, the first conductive film layer 30 in the isolation area and the second conductive film layer 100 in the carrier collection area are integrated into one to completely cover the first main surface.

[0039] The first conductive film layer 30 and the second conductive film layer 100 can be made of, but are not limited to, indium tin oxide (ITO) or indium zinc oxide (IZO). For example, when ITO is used for the first conductive film layer 30 and the second conductive film layer 100, the ITO should be N-type ITO, primarily comprising an InOx film layer doped with SnOx, where the SnOx doping ratio can be 1-10%.

[0040] like Figure 3As shown, the first main surface of the silicon substrate 10 of the passivated contact cell of the present invention is provided with alternating carrier collection regions and isolation regions. In the carrier collection region, a tunneling oxide layer 21, a doped polysilicon layer 22, a second conductive film layer 100, and a first passivation anti-reflection layer 40 are sequentially arranged away from the silicon substrate 10, along with a first metal electrode 80 electrically connected to the doped polysilicon layer 22. In the isolation region, a first conductive film layer 30 and a first passivation anti-reflection layer 40 are sequentially arranged away from the silicon substrate 10.

[0041] By respectively arranging the first conductive film layer 30 and the second conductive film layer 100 in the isolation region and the carrier collection region, and integrating the first conductive film layer 30 and the second conductive film layer 100 into one to completely cover the first main surface, the carriers on the first main surface of the silicon substrate 10 can be laterally transmitted through the integrated conductive film layer, especially the carriers in the isolation region can be directly transmitted to the first metal electrode 80 through the integrated conductive film layer, thereby further improving the battery efficiency.

[0042] In an optional embodiment, as Figure 1-Figure 3 As shown, the passivation contact cell may further include: an emitter layer 50 , a passivation layer 60 , and a second passivation anti-reflection layer 70 disposed on the second main surface of the silicon substrate 10 .

[0043] When the conductivity type of the silicon substrate 10 is N-type, the emitter layer 50 should be a P+ emitter layer 50 .

[0044] The passivation layer 60 may be a negatively charged passivation layer 60. Optionally, the passivation layer 60 may be one or more of an aluminum oxide thin film layer, a gallium oxide thin film layer, and an aluminum nitride thin film layer, but is not limited thereto.

[0045] The second passivation anti-reflection layer 70 may be one or more of silicon nitride, silicon oxide, and silicon oxynitride, but is not limited thereto.

[0046] In addition, the passivation contact cell may further include a second metal electrode 90 disposed on the second main surface of the silicon substrate 10 , wherein the second metal electrode 90 may be electrically connected to the emitter layer 50 .

[0047] The first metal electrode 80 and the second metal electrode 90 may be made of silver electrodes, copper electrodes, etc., but are not limited thereto.

[0048] The passivated contact solar cell of this embodiment of the utility model forms a localized polysilicon structure by providing alternating carrier collection regions and isolation regions on the first main surface. This effectively addresses the long-wave response issue of the passivated contact solar cell, allowing the cell to fully absorb reflected light and improve short-circuit current without affecting the cell's passivation performance. By providing a first conductive film layer 30 in the isolation region, carriers in the isolation region can be transmitted laterally through the first conductive film layer 30, resolving the problem of poor transmission capability in the isolation region, where carriers can only be transmitted through the relatively resistive silicon substrate 10, thereby significantly improving cell efficiency.

[0049] The following experimental data tests were conducted on a solar cell with a passivated contact of the embodiment of the present invention, a solar cell with a passivated contact of a first main surface that is not a local polysilicon structure, and a solar cell with a passivated contact of a first main surface that is a local polysilicon structure but does not have the first conductive film layer 30 under the same conditions. Figure 4 Cell 1 is a passivated contact solar cell whose first main surface is not a local polysilicon structure, that is, the tunnel oxide layer 21 and the doped polysilicon layer 22 completely cover the first main surface, wherein the silicon substrate 10 is an N-type silicon substrate with a thickness of 150 μm and a resistivity of 1 Ω·m; the tunnel oxide layer 21 has a thickness of 1.3 μm; the doping ions of the doped polysilicon layer 22 are phosphorus ions with a doping concentration of 5×10 20 atoms / cm 3 The thickness of the first passivation anti-reflection layer 40 is 70 nm, and the refractive index is 2.9%; the sheet resistance of the emitter layer 50 is 400 Ω / sq, the junction depth is 1.3 μm, and the peak concentration of boron doping is 3×10 18 atoms / cm 3 The thickness of the passivation layer 60 is 7 nm; the thickness of the second passivation anti-reflection layer 70 is 75 nm, the refractive index is 3.0%, and the reflectivity is 3.0%; the first metal electrode 80 and the second metal electrode 90 are both silver electrodes.

[0050] Please refer to Figure 5 Cell 2 is a passivated contact solar cell with a localized polysilicon structure on its first major surface but without the first conductive film layer 30. It differs from Cell 1 in that its first major surface is provided with alternating carrier collection regions and isolation regions. The carrier collection regions, facing away from the silicon substrate 10, are sequentially provided with a tunneling oxide layer 21, a doped polysilicon layer 22, and a first passivation anti-reflection layer 40; the isolation regions, facing away from the silicon substrate 10, are provided with the first passivation anti-reflection layer 40. Both the carrier collection regions and the isolation regions have a width of 300 μm. The remaining structural parameters are the same as those of Cell 1.

[0051] Please refer to Figure 2Cell 3 is a passivated contact solar cell according to an embodiment of the present invention, with a first main surface having a partial polycrystalline silicon structure and provided with a first conductive film layer 30. It differs from Cell 2 in that the first conductive film layer 30 and a first passivation anti-reflection layer 40 are sequentially provided in the isolation region, away from the silicon substrate 10. The first conductive film layer 30 is made of ITO with a SnOx doping ratio of 3%, a film thickness of 100 nm, a refractive index of 1.9%, and a sheet resistance of 45 Ω / sq. The remaining structural parameters are the same as those of Cell 2.

[0052] The experimental data of battery 1, battery 2 and battery 3 tested under the same conditions are shown in the following table.

[0053]

[0054] In the above table, Jsc represents short-circuit current, Voc represents open-circuit voltage, FF represents fill factor, and Eta represents photoelectric conversion efficiency. Overall, it can be found that the passivated contact solar cell of the embodiment of the present invention, that is, the passivated contact solar cell with a local polysilicon structure on the first main surface and a first conductive film layer 30, has improved short-circuit current and photoelectric conversion efficiency compared to other passivated contact solar cells, and has improved by 0.3 mA / cm compared to the passivated contact solar cell with a non-local polysilicon structure on the first main surface. 2 , the open-circuit voltage and fill factor remain essentially the same, and the cell's photoelectric conversion efficiency increases by 0.176%. Compared to a passivated contact solar cell with a localized polysilicon structure on the first major surface but without the first conductive film layer 30, the fill factor increases by 0.285% and the photoelectric conversion efficiency increases by 0.085%. Therefore, the passivated contact solar cell of the present invention significantly outperforms other passivated contact solar cells, demonstrating that the provision of the first conductive film layer 30 significantly improves the lateral carrier transport capability of the isolation region.

[0055] The present invention also provides a method for preparing a passivated contact solar cell, comprising the following steps S1 to S8:

[0056] Step S1, growing a tunneling oxide layer 21 and a doped polysilicon layer 22 on a first main surface of a pretreated silicon substrate 10; wherein, during the process of growing the doped polysilicon layer 22, a phosphosilicate glass layer is formed on the surface of the doped polysilicon layer 22;

[0057] Pre-treating the silicon substrate 10 includes texturing the silicon wafer on both sides and performing boron diffusion. The emitter layer 50 and the borosilicate glass layer are formed on the second main surface through the boron diffusion. The surrounding plating portion on the first main surface caused by the boron diffusion is removed. The first main surface is then polished or a tower-shaped structure is formed to obtain the pre-treated silicon substrate 10. As an example, the silicon substrate 10 can be an N-type single-crystal silicon wafer with a resistivity of 1.0 Ω·m and a thickness of 130 μm.

[0058] Specifically, removing the wrap-around plating portion on the first main surface produced by boron diffusion can include: first, using an acidic solution to remove the borosilicate glass layer on the first main surface produced by wrap-around plating, and then using an alkaline solution to remove the p-type doped layer under the borosilicate glass layer on the first main surface.

[0059] The first main surface can be polished or a tower base structure can be prepared using an acidic solution or an alkaline solution. At the same time, organic impurities and / or metal impurities adhering to the first and second main surfaces of the silicon wafer can also be removed.

[0060] Furthermore, growing the tunnel oxide layer 21 and the doped polysilicon layer 22 specifically includes: depositing the tunnel oxide layer 21 and the intrinsic polysilicon layer on the first main surface; and doping the intrinsic polysilicon layer, where the doped ions may be N-type elements. Preferably, the doping treatment performed on the intrinsic polysilicon layer may be a phosphorus diffusion treatment, thereby obtaining the doped polysilicon layer 22 of N-type doping type. The thickness of the tunnel oxide layer 21 may be 1-2 nm; the thickness of the intrinsic polysilicon layer may be 50-300 nm. As an example, the thickness of the tunnel oxide layer 21 may be 1 nm, 1.3 nm, 1.8 nm, or 2 nm; and the thickness of the intrinsic polysilicon layer may be 50 nm, 100 nm, 200 nm, or 300 nm.

[0061] The tunnel oxide layer 21 and the intrinsic polysilicon layer can be formed by chemical vapor deposition (CVD), atomic layer deposition (ALD), wet oxidation, thermal oxidation, sputtering, etc. CVD can include low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), etc. As an example, when the tunnel oxide layer 21 and the intrinsic polysilicon layer are formed by the in-situ oxidation method of LPCVD, the tunnel oxide layer 21 can be formed at a temperature of 580-630° C. and an oxygen flow rate of 1000-10000 sccm, and the intrinsic polysilicon layer can be formed at a temperature of 580-650° C., a nitrogen flow rate of 500-10000 sccm, and a monosilane flow rate of 100-5000 sccm. As an example, the temperature for forming the tunnel oxide layer 21 can be 580°C, 600°C, or 630°C, and the oxygen flow rate can be 1000 sccm, 5000 sccm, 8000 sccm, or 10,000 sccm; the temperature for forming the intrinsic polysilicon layer can be 580°C, 600°C, 630°C, or 650°C, and the nitrogen flow rate can be 500 sccm, 5000 sccm, 8000 sccm, or 10,000 sccm; and the monosilane flow rate can be 100 sccm, 200 sccm, 300 sccm, or 5000 sccm.

[0062] Furthermore, the process parameters for phosphorus diffusion treatment of the above-mentioned intrinsic polysilicon layer may include: source temperature of 800-890°C, source flow rate of 200-3000sccm, oxygen flow rate of 100-2000sccm, source time of 10-50min, passive advancement temperature of 850-930°C, and advancement time of 20-90min. As an example, when the above-mentioned intrinsic polysilicon layer is subjected to phosphorus diffusion treatment, the source temperature can be 800℃, 830℃, 850℃ or 890℃, the source flow rate is 200sccm, 500sccm, 1000sccm or 3000sccm, the oxygen flow rate is 100sccm, 600sccm, 1000sccm or 2000sccm, the source time is 10min, 30min or 50min, the passive push temperature is 850℃, 880℃, 900℃ or 930℃, and the push time is 20min, 50min, 75min or 90min.

[0063] After the phosphorus diffusion, a doped polysilicon layer 22 and a phosphosilicate glass layer stacked on the doped polysilicon layer 22 are obtained. Here, the thickness of the phosphosilicate glass layer can be 10-50 nm. As an example, the thickness of the phosphosilicate glass layer can be 10 nm, 20 nm, 35 nm or 50 nm. In addition, after the phosphorus diffusion, the square resistance of the doped polysilicon layer 22 in the first main surface can be 30-120 Ω / sq. As an example, the square resistance of the first main surface after the phosphorus diffusion can be 30 Ω / sq, 50 Ω / sq, 80 Ω / sq or 120 Ω / sq.

[0064] Step S2: Based on a preset isolation area range, performing laser modification processing on the phosphosilicate glass layer in the isolation area of ​​the first main surface.

[0065] The process parameters of laser modification include: laser wavelength 500-550nm, energy density 0.03-0.05mJ / cm 2 The laser spot diameter is 20-200 μm. Furthermore, the width of the region not subjected to laser modification (i.e., the carrier collection region) is larger than the width of the first metal electrode 80. For example, when the width of the first metal electrode 80 is 20 μm, the width of the region not subjected to laser modification is retained at 50-100 μm.

[0066] The phosphosilicate glass layer in the isolation area is modified to make it easy to be removed by an alkaline solution; the phosphosilicate glass layer in the carrier collection area is not laser treated, so that when the phosphosilicate glass layer in the isolation area is subsequently removed, the phosphosilicate glass layer in the carrier collection area will not be affected.

[0067] In step S3 , an alkaline solution is used to remove the modified phosphosilicate glass layer and the doped polysilicon layer 22 and the tunnel oxide layer 21 thereunder in the isolation region of the first main surface.

[0068] Before step S3, an acidic solution is first used to remove the phosphosilicate glass layer on the second main surface produced by the wrap-around plating. In step S3, an alkaline solution should also be used to remove the intrinsic polysilicon layer and / or doped polysilicon layer 22 on the second main surface produced by the wrap-around plating. As an example, in this process, the acidic solution can be a hydrofluoric acid solution; the alkaline solution can be a solution containing one or more of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide, but is not limited thereto. Furthermore, the alkaline solution can also include an etching additive.

[0069] In the above process, the carrier collection region can block the corrosion of the alkaline solution due to the presence of the unmodified phosphosilicate glass layer, so the doped polysilicon layer 22 and the tunnel oxide layer 21 in the carrier collection region are retained.

[0070] Step S4: using an acidic solution to remove the phosphosilicate glass layer in the carrier collection area of ​​the first main surface.

[0071] At the same time, the borosilicate glass layer on the second main surface can be removed using an acidic solution.

[0072] The semi-finished passivated contact solar cell now comprises: doped polysilicon layers 22 spaced apart on the first main surface; a tunneling oxide layer 21 between the doped polysilicon layers 22 and the silicon substrate 10; and a carrier collection layer 20 formed by the tunneling oxide layer 21 and the doped polysilicon layer 22. The region containing the carrier collection layer 20 is the carrier collection region. The remaining region is an isolation region, devoid of any film layers. An emitter layer 50 is disposed on the second main surface. Thus, a localized polysilicon structure is formed on the doped polysilicon layers 22 spaced apart on the first main surface.

[0073] Step S5 , depositing a passivation layer 60 and a second passivation anti-reflection layer 70 on the emitter layer 50 on the second main surface.

[0074] Optionally, the passivation layer 60 may be prepared by atomic layer deposition; and the second passivation anti-reflection layer 70 may be prepared by plasma enhanced chemical vapor deposition.

[0075] The passivation layer 60 may be one or more of an aluminum oxide thin film layer, a gallium oxide thin film layer, and an aluminum nitride thin film layer, but is not limited thereto. The second passivation anti-reflection layer 70 may be one or more of silicon nitride, silicon oxide, and silicon oxynitride, but is not limited thereto.

[0076] In step S6 , a first conductive film layer 30 is formed in the isolation region of the first main surface so that carriers in the isolation region can be transferred to the carrier collection layer 20 through the first conductive film layer 30 .

[0077] Furthermore, in order to achieve better carrier transfer effect, a second conductive film layer 100 can be simultaneously deposited on the carrier collection layer 20 in the carrier collection area, so that the first conductive film layer 30 and the second conductive film layer 100 are integrated into an integrated structure. The carriers in the isolation area can be transferred to the second conductive film layer 100 or the carrier collection layer 20 through the first conductive film layer 30, and then transferred to the first metal electrode 80 in the carrier collection area.

[0078] Optionally, the first conductive film layer 30 and the second conductive film layer 100 may be formed using physical vapor deposition (PVD), but are not limited thereto. For example, when PVD is used to form the first conductive film layer 30 and the second conductive film layer 100, the temperature is 100-300°C, and argon (Ar) gas is used as the motive gas to bombard a target material for sputtering, thereby forming the above-mentioned film layers.

[0079] The first conductive film layer 30 and the second conductive film layer 100 can be made of ITO, IZO, or any other conductive film layer capable of achieving the aforementioned functions, without limitation herein. For example, when the first conductive film layer 30 and the second conductive film layer 100 are made of ITO, the ITO should be N-type ITO, primarily comprising an InOx film layer doped with SnOx, wherein the SnOx doping ratio can be 1-10%.

[0080] The thickness of the first conductive film layer 30 and the second conductive film layer 100 may be 80-120 nm, the refractive index may be 1.8-2.1%, and the sheet resistance may be 20-60 Ω / sq. As an example, the thickness of the first conductive film layer 30 and the second conductive film layer 100 may be 80 nm, 100 nm, 110 nm, or 120 nm, the refractive index may be 1.8%, 1.9%, 2.0%, or 2.1%, and the sheet resistance may be 20 Ω / sq, 40 Ω / sq, 50 Ω / sq, or 60 Ω / sq.

[0081] Step S7 : depositing a first passivation anti-reflection layer 40 on the first main surface.

[0082] The first passivation anti-reflection layer 40 may be one or more of silicon nitride, silicon oxide, and silicon oxynitride, but is not limited thereto.

[0083] Optionally, the first passivation anti-reflection layer 40 may be prepared by plasma enhanced chemical vapor deposition.

[0084] Step S8 , printing a first metal electrode 80 on the first main surface, and printing a second metal electrode 90 on the second main surface.

[0085] The first metal electrode 80 can be printed on the first main surface by overprinting, that is, the template subjected to laser modification in step S2 is overprinted with the printing template of the first metal electrode 80 to ensure that the first metal electrode 80 is printed in the carrier collection area. In this way, when printing the first metal electrode 80, there is no need to repeatedly set the printing parameters, which saves process time.

[0086] The preparation method of the passivated contact solar cell of the embodiment of the present invention removes the tunneling oxide layer 21 and the doped polysilicon layer 22 in the area of ​​the first main surface where the first metal electrode 80 does not need to be printed, so as to form alternatingly arranged carrier collection areas and isolation areas on the first main surface, that is, a local polysilicon structure. This can effectively solve the problem of long-wave response of the passivated contact solar cell, enable the cell to fully absorb reflected light, and improve the short-circuit current without affecting the passivation performance of the cell.

[0087] By setting a first conductive film layer 30 in the isolation area, carriers in the isolation area can be transmitted laterally through the first conductive film layer 30, which solves the problem that carriers in the isolation area can only be transmitted through the silicon substrate 10 with large resistance, resulting in poor transmission capacity, and greatly improves battery efficiency.

[0088] By using a laser-modified template for overprinting when printing the first metal electrode 80, there is no need to repeatedly set printing parameters when printing the first metal electrode 80, which saves process time and ensures that the first metal electrode 80 is printed in the carrier collection area.

[0089] The above specific embodiments do not limit the scope of protection of this utility model. Those skilled in the art will understand that various modifications, combinations, sub-combinations, and substitutions may occur depending on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model shall be included in the scope of protection of this utility model.

Claims

1. A passivated contact solar cell, characterized in that: include: A silicon substrate (10), wherein carrier collection regions and isolation regions are alternately arranged on a first main surface of the silicon substrate (10); A carrier collection layer (20) and a first metal electrode (80) are provided in the carrier collection region; wherein the carrier collection layer (20) is in contact with the silicon substrate (10), and the first metal electrode (80) is electrically connected to the carrier collection layer (20); A first conductive film layer (30) provided in the isolation region; The first conductive film layer (30) is in contact with the silicon substrate (10) and the adjacent carrier collection layer (20).

2. The passivated contact solar cell according to claim 1, characterized in that The carrier collection layer (20) comprises: A tunneling oxide layer (21) and a doped polysilicon layer (22) are stacked, wherein the tunneling oxide layer (21) is located between the silicon substrate (10) and the doped polysilicon layer (22).

3. The passivated contact solar cell according to claim 1, characterized in that Also includes: a second conductive film layer (100) stacked on the carrier collection layer (20); The first metal electrode (80) is electrically connected to the second conductive film layer (100).

4. The passivated contact solar cell according to claim 3, characterized in that The second conductive film layer (100) and the first conductive film layer (30) are an integrated structure.

5. The passivated contact solar cell according to claim 1, characterized in that Also includes: A first passivation anti-reflection layer (40), wherein The first passivation anti-reflection layer (40) is stacked on the carrier collection layer (20) and extends onto the first conductive film layer (30).

6. The passivated contact solar cell according to claim 1, characterized in that Also includes: An emitter layer (50), a passivation layer (60), and a second passivation anti-reflection layer (70) are provided on the second main surface of the silicon substrate (10).

7. The passivated contact solar cell according to claim 2, characterized in that The thickness of the first conductive film layer (30) is 80-120 nm; and / or, The thickness of the tunneling oxide layer (21) is 1-2 nm; and / or, The thickness of the doped polysilicon layer (22) is 50-300 nm; and / or, The refractive index of the first conductive film layer (30) is 1.8-2.1%; and / or, The square resistance of the first conductive film layer (30) is 20-60Ω / sq.

8. The passivated contact solar cell according to any one of claims 1 to 7, characterized in that: The orthographic projection of the first metal electrode (80) on the carrier collection region falls within the carrier collection region.

9. The passivated contact solar cell according to any one of claims 1 to 7, characterized in that: The first conductive film layer (30) is an ITO layer or an IZO layer.

10. The passivated contact solar cell according to claim 6, characterized in that: It also includes: a second metal electrode (90) provided on the second main surface of the silicon substrate (10), wherein: The second metal electrode (90) is electrically connected to the emitter layer (50).

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