Processor starting system and vehicle-mounted terminal
The control unit outputs a startup control signal to the processor, which solves the problem of abnormal and complex operation of the processor startup in the prior art, realizes automatic startup, and improves the startup efficiency of the processor and the working efficiency of the vehicle system.
Patent Information
- Application Number
- CN202422865409.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-10-10
- Estimated Expiration
- 2034-11-22
AI Technical Summary
In the prior art, when a processor starts abnormally, it is necessary to manually replace the resistor or switch the DIP switch, which is complicated to operate and leads to low startup efficiency. In particular, the maintenance cost is high in mass production installations or complex structural parts.
The control unit outputs a startup control signal to the processor to achieve automatic startup of the processor without manually replacing resistors or switching DIP switches. It is controlled by the GPIO interface of the MCU and the startup mode configuration pin of the X9 processor.
The processor startup operation is simplified and the startup efficiency is improved, especially in the vehicle system, which improves the convenience and efficiency of maintenance and debugging.
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Figure CN223427108U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of processor control technology, and in particular to a processor startup system and a vehicle-mounted terminal. Background Art
[0002] As the computing and control core, the processor can parse instructions and process data and is widely used in various electronic devices.
[0003] In the related art, the processor is started by using a resistor or a DIP switch. When the processor starts abnormally, it is necessary to manually replace the resistor or switch the DIP switch, which is complicated and has low startup efficiency. Utility Model Content
[0004] In order to overcome the problems existing in the related art, the present application provides a processor startup system and a vehicle-mounted system, which are simple to operate and have high processor startup efficiency.
[0005] According to a first aspect of an embodiment of the present application, a processor startup system is provided, including a control unit and a processor, the control unit including a first signal interface and a first input interface, and the processor including a second signal interface and a first output interface;
[0006] The first signal interface of the control unit is connected to the second signal interface of the processor; the first input interface of the control unit is connected to the first output interface of the processor;
[0007] The control unit sends a first startup control signal to the processor through the first signal interface and the second signal interface; the processor starts according to the first startup control signal, and the processor sends a startup status signal to the control unit through the first output interface and the first input interface;
[0008] When the startup state signal is an abnormal startup state signal, the control unit sends a second startup control signal to the processor through the first signal interface and the second signal interface, and the processor starts according to the second startup control signal.
[0009] According to a second aspect of an embodiment of the present application, there is provided a vehicle-mounted terminal comprising a processor startup system as described above.
[0010] In the embodiment of the present application, the control unit outputs a first startup control signal to the processor to start the processor. If the processor starts abnormally, the control unit outputs a second startup control signal to the processor to start the processor. This eliminates the need to manually replace resistors or toggle DIP switches, resulting in simple operation and high startup efficiency.
[0011] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application.
[0012] In order to better understand and implement the present invention, the present invention is described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a circuit diagram of a processor startup system according to one embodiment of the present application;
[0014] Figure 2 This is a schematic diagram of a specific circuit structure of a processor startup system according to one embodiment of the present application;
[0015] Figure 3 This is a circuit diagram of a processor startup system according to another embodiment of the present application;
[0016] Figure 4 This is a circuit diagram of a processor startup system according to another embodiment of the present application;
[0017] Figure 5 This is a schematic diagram of the structure of a vehicle-mounted terminal according to one embodiment of the present application. DETAILED DESCRIPTION
[0018] In order to make the objectives, technical solutions and advantages of the present application clearer, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
[0019] It should be clear that the embodiments described are only the first part of the embodiments of this application, not all the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0020] When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.
[0021] In the description of the present application, it should be understood that the terms "first", "second", "third" and the like are used only to distinguish similar objects, and do not necessarily have to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance. The above-mentioned terms can be understood according to the specific meaning in the present application by those skilled in the art. The singular forms "a", "said" and "the" used in the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. The word "if" used herein can be interpreted as "when" or "when" or "in response to determining". In addition, in the description of the present application, "multiple" means two or more, unless otherwise specified. The association relationship between the associated objects described by the word "and / or" indicates that there can be three relationships, for example, A and / or B can represent the three cases of A alone, A and B together, and B alone. The character " / " generally represents an "or" relationship between the associated objects before and after it.
[0022] The inventors found in the process of implementing the present application that in the related art, a processor is started using a resistance selection or a code switch. Specifically, the signal interface of the processor is connected to the power supply through a pull-up resistor and to the ground through a pull-down resistor, the pull-up resistor and the pull-down resistor are configured to control the level state of the signal interface of the processor, thereby starting the processor. Alternatively, the signal interface of the processor is connected to a code switch, and the on-off of the code switch is configured to control the level state of the signal interface of the processor, thereby starting the processor. When the processor starts abnormally, the level state of the signal interface of the processor needs to be switched to make the processor reprogram and upgrade, which requires changing the configuration of the pull-up resistor and the pull-down resistor or switching the on-off of the code switch, thereby complicating the operation. In particular, for mass production or machines that have been assembled into structural components, when the processor starts abnormally, the structural components need to be disassembled, and the resistance needs to be manually changed or the code switch needs to be switched, which will be difficult to operate for devices that have been glued and fixed or have complex structural components, which causes great trouble for after-sales maintenance and debugging costs.
[0023] Therefore, the present application can realize the start of the processor by outputting a first start control signal to the processor through the control unit. When the processor starts abnormally, the processor is started by outputting a second start control signal to the processor through the control unit, without manually changing the resistance or switching the code switch, without disassembling the machine, simple operation, and high start efficiency.
[0024] Please refer to Figure 1, which is a structural diagram of a processor startup system shown in an embodiment of the present application. The processor startup system provided in an embodiment of the present application includes a control unit 10 and a processor 20. The control unit 10 includes a first signal interface and a first input interface, and the processor 20 includes a second signal interface and a first output interface;
[0025] The first signal interface of the control unit 10 is connected to the second signal interface of the processor 20; the first input interface of the control unit 10 is connected to the first output interface of the processor 20;
[0026] The control unit 10 sends a first startup control signal to the processor 20 through the first signal interface and the second signal interface; the processor 20 starts according to the first startup control signal, and the processor 20 sends a startup status signal to the control unit 10 through the first output interface and the first input interface;
[0027] When the startup state signal is an abnormal startup state signal, the control unit 10 sends a second startup control signal to the processor 20 through the first signal interface and the second signal interface, and the processor 20 starts according to the second startup control signal.
[0028] The control unit 10 can be any of various control chips, specifically a microcontroller unit (MCU).
[0029] The first signal interface may be a GPIO interface of the MCU, including four GPIO interfaces, namely GPIO[1], GPIO[2], GPIO[3], and GPIO[4]. The first input interface may be a UART interface of the MCU.
[0030] Processor 20 may be any type of processor, including but not limited to the X9 processor. The X9 processor is an automotive-grade chip designed specifically for next-generation automotive cockpits. It integrates the latest high-performance CPU, GPU, and AI accelerator, meeting the growing demand for powerful computing power and rich multimedia performance in next-generation automotive cockpit applications.
[0031] The second signal interface can be the boot mode configuration pin of the X9 series processor, including four boot mode configuration pins, namely MODE[0], MODE[1], MODE[2], and MODE[3]. The first output interface can be the UART interface of the X9 processor.
[0032] The first start control signal is used for starting the processor 20, and the second start control signal is used for starting the processor 20 after the processor 20 starts abnormally. Specifically, the first start control signal can be a level signal 0001, and the second start control signal can be a level signal 1000. Wherein 0 represents low level, and 1 represents high level.
[0033] The start state signal includes a normal start state signal and an abnormal start state signal, and is used for feeding back the start state of the processor 20 to the control unit 10.
[0034] In the embodiment of the present application, please refer to Figure 2 The MCU sends level signals 0, 0, 0, and 1 to the MODE[0], MODE[1], MODE[2], and MODE[3] of the X9 processor through the GPIO[1], GPIO[2], GPIO[3], and GPIO[4] respectively. The X9 processor detects the first start control signal 0001 when powered on, starts, and feeds back the normal start state signal to the MCU through the UART port when the start is successful. After the X9 processor starts successfully, it enters the working state.
[0035] When the start fails, the X9 processor feeds back the abnormal start state signal to the MCU through the UART port. The MCU sends level signals 1, 0, 0, and 0 to the MODE[0], MODE[1], MODE[2], and MODE[3] of the X9 processor through the GPIO[1], GPIO[2], GPIO[3], and GPIO[4] respectively. The X9 processor detects the second start control signal 1000 when powered on, and starts.
[0036] In an optional embodiment, when the start is successful, the X9 processor sends the start state signal to the MCU, and when the start fails, the X9 processor does not send the start state signal to the MCU. When the MCU does not receive the start state signal, it is considered that the X9 processor starts abnormally, and the second start control signal is sent to the X9 processor.
[0037] According to the embodiment of the present application, the first start control signal is output to the processor 20 by the control unit 10, so that the start of the processor 20 can be realized. When the processor 20 starts abnormally, the second start control signal is output to the processor 20 by the control unit 10, so that the start of the processor 20 can be realized. Without manually replacing the resistor or switching the dial switch, the operation is simple and the start efficiency is high.
[0038] In one embodiment, when the processor 20 fails to boot by reading the boot data from its own memory according to the first boot control signal, the boot status signal is an abnormal boot status signal; when the processor 20 successfully boots by reading the boot data from its own memory according to the first boot control signal, the boot status signal is a normal boot status signal.
[0039] The memory of the processor 20 may be various types of memory, including but not limited to flash memory and EMMC memory.
[0040] In the embodiment of the present application, the X9 processor reads the startup data from its own EMMC memory according to the first startup control signal 0001. If the startup data is normal, the X9 processor starts successfully and generates a normal startup status signal. If the startup data is abnormal, the X9 processor fails to start and generates an abnormal startup status signal.
[0041] When the X9 processor in the embodiment of the present application successfully or fails to start, it sends a startup status signal to the MCU, allowing the MCU to obtain the startup status of the X9 processor in real time.
[0042] In one embodiment, the processor 20 reads the startup data from the external device via the USB cable according to the second startup control signal, and stores the startup data in its own memory;
[0043] The control unit 10 controls the processor 20 to power on again. The control unit 10 resends the first startup control signal to the processor 20 through the first signal interface and the second signal interface. The processor 20 starts according to the first startup control signal.
[0044] The external device stores the startup data required by the processor 20. The external device includes but is not limited to a computer, a tablet, and a mobile phone.
[0045] In an embodiment of the present application, the X9 processor reads startup data from an external device via a USB cable according to the second startup control signal 1000 and stores the startup data in its own EMMC memory. The MCU controls the power management chip to repower the X9 processor. The MCU sends a first startup control signal 0001 to the X9 processor, and the X9 processor reads the startup data from its own EMMC memory to start. The MCU is connected to the power management chip, and the power management chip is connected to the X9 processor.
[0046] In the embodiment of the present application, after the X9 processor fails to start, the MCU sends a second startup control signal to the X9 processor, so that the X9 processor can obtain new startup data from an external device, thereby replacing the abnormal startup data corresponding to the startup failure. The MCU resends the first startup control signal to the X9 processor to start the X9 processor, which can ensure that the X9 processor restarts after the startup failure.
[0047] In one embodiment, see Figure 3 The processor startup system further includes a pull-down unit 30; an input end of the pull-down unit 30 is connected to the first signal interface, and an output end of the pull-down unit 30 is grounded.
[0048] In an embodiment of the present application, when the GPIO[1], GPIO[2], GPIO[3], and GPIO[4] of the MCU do not output a level signal and are in a suspended state, the level states of the MODE[0], MODE[1], MODE[2], and MODE[3] of the X9 processor are uncertain, and may be high or low, thereby affecting the stable operation of the X9 processor. To this end, by providing a pull-down unit 30 between the GPIO[1], GPIO[2], GPIO[3], and GPIO[4] interfaces of the MCU and the MODE[0], MODE[1], MODE[2], and MODE[3] interfaces of the X9 processor, it is possible to ensure that the level state is determined, thereby improving the stability of the operation of the X9 processor.
[0049] In one embodiment, the pull-down unit 30 includes a resistor, a first end of the resistor is an input end of the pull-down unit 30 , and a second end of the resistor is an output end of the pull-down unit 30 .
[0050] In the embodiment of the present application, the first end of the resistor can be pulled down to a low level by grounding the second end of the resistor. Figure 2 , the first end of the resistor R1 is connected to the GPIO[1] interface of the MCU, and the second end of the resistor R1 is grounded; the first end of the resistor R2 is connected to the GPIO[2] interface of the MCU, and the second end of the resistor R2 is grounded; the first end of the resistor R3 is connected to the GPIO[3] interface of the MCU, and the second end of the resistor R3 is grounded; the first end of the resistor R4 is connected to the GPIO[4] interface of the MCU, and the second end of the resistor R4 is grounded, thereby ensuring that the level status of the MODE[0], MODE[1], MODE[2], and MODE[3] interfaces of the X9 processor is determined, thereby improving the stability of the operation of the X9 processor.
[0051] In one embodiment, the processor receives the level signal through the second signal interface and sends the level signal to its own functional module to drive the functional module to work; wherein the level signal is generated based on the grounding of the pull-down unit 30.
[0052] Among them, the functional modules include but are not limited to switch modules, analog serial ports and analog I2C.
[0053] In an embodiment of the present application, the pull-down unit 30 will set the level status of the MODE[0], MODE[1], MODE[2], and MODE[3] interfaces of the X9 processor to a low level. When the processor receives a low-level signal, it can send the low-level signal to its own functional module, thereby driving the functional module to work.
[0054] In the embodiment of the present application, after the X9 processor is successfully started, MODE[0], MODE[1], MODE[2], and MODE[3] of the X9 processor can receive level signals to drive functional modules, thereby multiplexing the MODE[0], MODE[1], MODE[2], and MODE[3] interfaces to improve interface utilization.
[0055] In one embodiment, see Figure 4 , the processor startup system further includes a control signal switching button 40, and the control unit 10 further includes a second input interface;
[0056] The control signal switching button is connected to the second input interface. The control signal switching button 40 is used to control the control unit 10 to output different start control signals.
[0057] In this embodiment of the present application, the user can operate the control signal switching button 40 to enable the MCU to send different startup control signals to the X9 processor. Specifically, if the user briefly presses the control signal switching button 40, the MCU sends a first startup control signal to the X9 processor. If the user long presses the control signal switching button 40, the MCU sends a second startup control signal to the X9 processor.
[0058] The embodiment of the present application sets a control signal switching button 40, which can automatically and quickly enable the MCU to send different startup control signals to the X9 processor.
[0059] In one embodiment, see Figure 5 , the present application also provides a vehicle-mounted terminal, including the processor startup system as described above.
[0060] In the embodiment of the present application, by applying the above-mentioned processor startup system in the vehicle-mounted system, the startup efficiency of the processor can be improved, thereby improving the working efficiency of the vehicle-mounted system.
[0061] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0062] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.
Claims
1. A processor startup system, characterized in that: It includes a control unit and a processor, the control unit includes a first signal interface and a first input interface, and the processor includes a second signal interface and a first output interface; The first signal interface of the control unit is connected to the second signal interface of the processor; the first input interface of the control unit is connected to the first output interface of the processor; The control unit sends a first startup control signal to the processor through the first signal interface and the second signal interface; The processor is started according to the first start control signal, and the processor sends a start state signal to the control unit through the first output interface and the first input interface; When the startup state signal is an abnormal startup state signal, the control unit sends a second startup control signal to the processor through the first signal interface and the second signal interface, and the processor starts according to the second startup control signal.
2. The processor startup system according to claim 1, wherein: When the processor fails to start up by reading the startup data from its own memory according to the first startup control signal, the startup state signal is an abnormal startup state signal; When the processor reads the startup data from its own memory according to the first startup control signal and successfully starts up, the startup state signal is a normal startup state signal.
3. The processor startup system according to claim 1, wherein: The processor reads the startup data from the external device via the USB cable according to the second startup control signal, and stores the startup data into its own memory; The control unit controls the processor to power on again, and the control unit resends the first startup control signal to the processor through the first signal interface and the second signal interface, and the processor starts according to the first startup control signal.
4. The processor startup system according to any one of claims 1 to 3, characterized in that: The processor startup system further includes a pull-down unit; An input end of the pull-down unit is connected to the first signal interface, and an output end of the pull-down unit is grounded.
5. The processor startup system according to claim 4, wherein: The pull-down unit includes a resistor, a first end of the resistor is an input end of the pull-down unit, and a second end of the resistor is an output end of the pull-down unit.
6. The processor startup system according to claim 4, wherein: The processor receives a level signal through the second signal interface and sends the level signal to its own functional module to drive the functional module to work; wherein the level signal is generated based on the grounding of the pull-down unit.
7. The processor startup system according to any one of claims 1 to 3, characterized in that: The processor startup system further includes a control signal switching button, and the control unit further includes a second input interface; The control signal switching button is connected to the second input interface, and the control signal switching button is used to control the control unit to output different start control signals.
8. An in-vehicle terminal comprising the processor startup system according to any one of claims 1 to 7.