Electronic packaging piece and electronic packaging module
By stacking electronic components in the electronic package and utilizing a design that integrates conductive elements and conductive connectors, the problem of the limited number of optical engines in the optical module is solved, achieving more efficient information transmission.
Patent Information
- Application Number
- CN202422758507.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-10-17
- Filing Date
- 2024-11-12
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2034-11-12
AI Technical Summary
In existing co-packaged optical modules, the number of optical engines is limited and cannot simultaneously meet the requirements of high information transmission volume and miniaturization.
The design employs an electronic package, in which the first and second electronic components are stacked and electrically connected through conductive elements and conductive connectors. Combined with the package layer and the second circuit structure, a multi-layer stacked structure is formed to reduce the occupied area.
The number of optical engines in the co-packaged optical module has been increased, improving the amount of information transmitted and achieving more efficient information transmission.
Smart Images
Figure CN223471593U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a semiconductor device, in particular to an electronic package with multiple electronic elements stacked thereon and an electronic package module with multiple electronic packages. BACKGROUND
[0002] With the rise and explosive growth of applications and technologies such as personal computers, the Internet, mobile communications, streaming media, network games, and artificial intelligence (AI), data transmission technology continues to increase the demand for bandwidth, making copper wire transmission media increasingly unable to meet the requirements of modern data transmission. Therefore, optical communication technology has begun to replace copper links in large quantities. The semiconductor industry has also developed co-packaged optics (CPO) technology and components for optical communication.
[0003] FIG. 1A is a top view of a conventional co-packaged optics module 100; FIG. 1B is a cross-sectional view of an optical engine in FIG. 1A As shown in FIG. 1A In the structure of the conventional co-packaged optics module 100, multiple optical engines 11 and a semiconductor component 13 (such as a memory module) are integrated on a circuit substrate 12. As shown in FIG. 1B Each optical engine 11 includes multiple electronic integrated circuit (EIC) chips 111a, 111b, 111c and a photonic integrated circuit chip 112. The photonic integrated circuit chip 112 is used to transmit and receive optical signals, and the multiple electronic integrated circuit chips 111a, 111b, 111c are packaged side by side in a packaging layer 113 and electrically connected to the photonic integrated circuit chip 112 to convert optical signals and electronic signals. However, arranging multiple electronic integrated circuit chips 111a, 111b, 111c side by side requires a large area, which greatly limits the number of optical engines 11 that can be accommodated by each conventional co-packaged optics module 100. For example FIG. 1A As shown in
[0004] Therefore, how to overcome the above problems of the prior art has become a pressing issue to be solved. CONTENT OF THE INVENTION
[0005] In view of the above deficiencies of the prior art, the present application provides an electronic package, comprising: a first circuit structure having opposite first and second surfaces and at least one first circuit layer; a group of electronic elements including a first electronic element having opposite first active and first inactive surfaces and disposed on the first surface of the first circuit structure with the first inactive surface, and a second electronic element having opposite second active and second inactive surfaces and offset from the first active surface of the first electronic element with the second inactive surface, such that part of the first active surface is exposed on one side of the second electronic element; a package layer covering the group of electronic elements and defining opposite first and second package surfaces, the second package surface being connected to the first surface of the first circuit structure; a second circuit structure disposed on the first package surface of the package layer and having at least one second circuit layer, and the second circuit layer being electrically connected to the first circuit layer of the first circuit structure, the first active surface of the first electronic element and the second active surface of the second electronic element, respectively; and an optoelectronic element disposed on a side of the second circuit structure not in contact with the package layer and electrically connected to the second circuit structure.
[0006] The present application also provides an electronic package module, comprising: a carrier structure having a carrier surface; a chip disposed on the carrier surface of the carrier structure and electrically connected to the carrier structure; and a plurality of electronic packages disposed on the carrier surface of the carrier structure and surrounding the chip, and each of the electronic packages comprising: a first circuit structure having opposite first and second surfaces and at least one first circuit layer, the second surface being electrically connected to the carrier structure; a group of electronic elements including a first electronic element having opposite first active and first inactive surfaces and disposed on the first surface of the first circuit structure with the first inactive surface, and a second electronic element having opposite second active and second inactive surfaces and offset from the first active surface of the first electronic element with the second inactive surface, such that part of the first active surface is exposed on one side of the second electronic element; a package layer covering the group of electronic elements and defining opposite first and second package surfaces, the second package surface being connected to the first surface of the first circuit structure; a second circuit structure disposed on the first package surface of the package layer and having at least one second circuit layer, and the second circuit layer being electrically connected to the first circuit layer of the first circuit structure, the first active surface of the first electronic element and the second active surface of the second electronic element, respectively; and an optoelectronic element disposed on a side of the second circuit structure not in contact with the package layer and electrically connected to the second circuit structure.
[0007] The application also provides a method for manufacturing an electronic package, comprising: providing a carrier; forming a first circuit structure on the carrier, wherein the first circuit structure has opposite first and second surfaces and at least one first circuit layer, and the second surface contacts the carrier; arranging an electronic component group on the first surface of the first circuit structure, wherein the electronic component group comprises a first electronic component and a second electronic component, the first electronic component has opposite first active and first inactive surfaces, and the first inactive surface is arranged on the first surface of the first circuit structure, the second electronic component has opposite second active and second inactive surfaces, and the second inactive surface is offset from the first active surface so that part of the first active surface is exposed on one side of the second electronic component; forming a packaging layer to cover the electronic component group, wherein the packaging layer defines opposite first and second packaging surfaces, and the second packaging surface contacts the first surface of the first circuit structure; forming a second circuit structure on the first packaging surface of the packaging layer, the second circuit structure comprises at least one second circuit layer, and the second circuit layer is electrically connected to the first circuit layer of the first circuit structure, the first active surface of the first electronic component, and the second active surface of the second electronic component, respectively; providing an optoelectronic component, which is arranged on the side of the second circuit structure not in contact with the packaging layer and is electrically connected to the second circuit structure; and removing the carrier.
[0008] In the foregoing electronic package, the method for manufacturing the electronic package, and the electronic package module, a plurality of through conductive members are formed on the first surface of the first circuit structure, the part of the first active surface exposed on one side of the second electronic component is provided with a plurality of first conductive members, the second active surface is provided with a plurality of second conductive members, and the second circuit layer is electrically connected to the first circuit layer, the first active surface, and the second active surface through the through conductive members, the first conductive members, and the second conductive members, respectively.
[0009] In the foregoing electronic package, the method for manufacturing the electronic package, and the electronic package module, the first electronic component and the second electronic component are electronic integrated circuits.
[0010] In the foregoing electronic package, the method for manufacturing the electronic package, and the electronic package module, the optoelectronic component is a photonic integrated circuit.
[0011] In the foregoing electronic package, the method for manufacturing the electronic package, and the electronic package module, the first circuit structure comprises at least one rewiring layer.
[0012] In the foregoing electronic package, the method for manufacturing the electronic package, and the electronic package module, the second circuit structure comprises at least one rewiring layer.
[0013] The electronic package, the method of manufacturing the electronic package and the electronic package module further include a third electronic component having opposite third active and non-active surfaces, and the third non-active surface is offset from the second active surface of the second electronic component so that a portion of the second active surface is exposed on one side of the third electronic component, and the second conductive members are disposed on the portion of the second active surface exposed on the one side of the third electronic component, and the third active surface is provided with third conductive members electrically connected to at least one of the second circuit layers.
[0014] The electronic package, the method of manufacturing the electronic package and the electronic package module further include a third electronic component having opposite third active and non-active surfaces, and the third non-active surface is offset from the second active surface of the second electronic component so that a portion of the second active surface is exposed on one side of the third electronic component, and the second conductive members are disposed on the portion of the second active surface exposed on the one side of the third electronic component, and the third active surface is provided with third conductive members electrically connected to at least one of the second circuit layers.
[0015] The electronic package, the method of manufacturing the electronic package and the electronic package module further include a third electronic component having opposite third active and non-active surfaces, and the third non-active surface is offset from the second active surface of the second electronic component so that a portion of the second active surface is exposed on one side of the third electronic component, and the second conductive members are disposed on the portion of the second active surface exposed on the one side of the third electronic component, and the third active surface is provided with third conductive members electrically connected to at least one of the second circuit layers.
[0016] The electronic package, the method of manufacturing the electronic package and the electronic package module further include a third electronic component having opposite third active and non-active surfaces, and the third non-active surface is offset from the second active surface of the second electronic component so that a portion of the second active surface is exposed on one side of the third electronic component, and the second conductive members are disposed on the portion of the second active surface exposed on the one side of the third electronic component, and the third active surface is provided with third conductive members electrically connected to at least one of the second circuit layers.
[0017] The electronic package, the method of manufacturing the electronic package and the electronic package module further include a third electronic component having opposite third active and non-active surfaces, and the third non-active surface is offset from the second active surface of the second electronic component so that a portion of the second active surface is exposed on one side of the third electronic component, and the second conductive members are disposed on the portion of the second active surface exposed on the one side of the third electronic component, and the third active surface is provided with third conductive members electrically connected to at least one of the second circuit layers.
[0018] As can be seen from the above, the electronic package, the method of manufacturing the electronic package and the electronic package module of the present application can greatly reduce the area occupied by the electronic package by stacking the first electronic component, the second electronic component and the third electronic component in the electronic package as the optical engine, thereby increasing the number of optical engines that can be accommodated in the common package optical electronic module, and effectively improving the information transmission capacity of the electronic module. BRIEF DESCRIPTION OF DRAWINGS
[0019] FIG. 1A is a top view of a conventional common package optical module.
[0020] FIG. 1B is FIG. 1A is a sectional view of an optical engine in the common package optical module.
[0021] FIG. 2A to FIG. 2E is a sectional view of a first embodiment of the method of manufacturing the electronic package of the present application.
[0022] FIG. 2E-1 is a top view of an embodiment of the electronic package module of the present application.
[0023] FIG. 3A to FIG. 3E is a sectional view of a second embodiment of the method of manufacturing the electronic package of the present application.
[0024] Description of Reference Numerals
[0025] 1 Load-bearing structure
[0026] 1a bearing surface
[0027] 100 Co-packaged optical modules
[0028] 11 Optical Engine
[0029] 111a, 111b, 111c electronic integrated circuit chips
[0030] 112 Photonic Integrated Circuit Chip
[0031] 113,40 Encapsulation layer
[0032] 12 Circuit board
[0033] 13 Semiconductor components
[0034] 2,2' electronic package
[0035] 20 First Line Structure
[0036] 20a First surface
[0037] 20b Second surface
[0038] 21 First circuit layer
[0039] 22 Through-conductor
[0040] 23 Conductive connector
[0041] 200 Electronic packaging module
[0042] 3 chips
[0043] 30,30' Electronic Components Group
[0044] 31 First Electronic Components
[0045] 31a First active surface
[0046] 31b First non-active surface
[0047] 31c first conductive element
[0048] 32 Second electronic component
[0049] 32a Second active surface
[0050] 32b Second non-active surface
[0051] 32c Second conductive member
[0052] 33 Third electronic components
[0053] 33a Third working surface
[0054] 33b Third non-active surface
[0055] 33c third conductive element
[0056] 40a First packaging surface
[0057] 40b Second packaging surface
[0058] 50 Second Line Structure
[0059] 51 Second circuit layer
[0060] 60 Photoelectric components
[0061] Crr carrier board
[0062] Df is the die-cut film. DETAILED DESCRIPTION
[0063] The following describes the implementation of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.
[0064] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in this application without affecting the efficacy and purpose that can be achieved by this application. At the same time, terms such as "upper", "first", "second", "third", "one", etc. quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of this application. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of this application without substantially changing the technical content.
[0065] FIG. 2A to FIG. 2E FIG. 1 is a cross-sectional view of a first embodiment of a method for manufacturing an electronic package of the present application.
[0066] like FIG. 2A As shown, a carrier board Crr is first provided. The carrier board Crr can be a semiconductor material such as silicon or glass, or a board of any other suitable material.
[0067] A first circuit structure 20 is then formed on the carrier Crr. The first circuit structure 20 has opposite first and second surfaces 20a and 20b, and the second surface 20b is in contact with the carrier Crr. The first circuit structure 20 includes at least one first circuit layer 21. In some embodiments, the first circuit structure 20 can include at least one redistribution layer (RDL).
[0068] An electronic component group 30 is then disposed on the first surface 20a of the first circuit structure 20. The electronic component group 30 includes a first electronic component 31 and a second electronic component 32. The first electronic component 31 has opposite first and second non-active surfaces 31a and 31b, and the first electronic component 31 is disposed on the first surface 20a of the first circuit structure 20 with the second non-active surface 31b facing away from the first circuit structure 20. In some embodiments, a die attach film (DAF) Df is disposed on the second non-active surface 31b, and the second non-active surface 31b of the first electronic component 31 is attached to the first surface 20a of the first circuit structure 20 via the DAF Df.
[0069] The first electronic component 31 can be an active component, such as a semiconductor chip, or a passive component, such as a resistor, capacitor or inductor. In the present embodiment, the first electronic component 31 is an electronic integrated circuit (EIC).
[0070] The second electronic component 32 has opposite first and second non-active surfaces 32a and 32b, and is disposed on one side of the first active surface 31a of the first electronic component 31 with the second non-active surface 32b facing away from the first active surface 31a, so that part of the first active surface 31a is exposed from the outside of the second electronic component 32. In some embodiments, the second electronic component 32 can be attached to the first active surface 31a of the first electronic component 31 via a DAF Df. The second electronic component 32 can also be an active component or a passive component, and in the present embodiment, the second electronic component 32 is an EIC.
[0071] In addition, a plurality of first conductive elements 31c are pre-installed on the portion of the first active surface 31a of the first electronic component 31 that is exposed from the outside of the second electronic component 32, and a plurality of second conductive elements 32c are pre-installed on the second active surface 32a of the second electronic component 32. Simultaneously, a plurality of through-conductive elements 22 are provided on the first surface 20a of the first circuit structure 20 outside the electronic component assembly 30, electrically connected to the first circuit layer 21 of the first circuit structure 20. Each first conductive element 31c, each second conductive element 32c, and each through-conductive element 22 can be a conductive bump, such as a copper pillar or a stud-shaped conductive element, but is not limited thereto. Furthermore, the tops of the through-conductive elements 22, the first conductive elements 31c, and the second conductive elements 32c are all located at the same height above the first surface 20a of the first circuit structure 20.
[0072] For example FIG. 2B As shown, an encapsulation layer 40 is formed on the first surface 20a of the first circuit structure 20 to encapsulate the electronic component assembly 30, the through-conductive members 22, the first conductive members 31c, and the second conductive members 32c. The encapsulation layer 40 is, for example, an encapsulation colloid or molding compound such as a dry film or epoxy resin. The encapsulation layer 40 defines a first encapsulation surface 40a and a second encapsulation surface 40b opposite to each other. The second encapsulation surface 40b is connected to the first surface 20a of the first circuit structure 20. The top ends of the through-conductive members 22, the first conductive members 31c, and the second conductive members 32c can be exposed upward from the first encapsulation surface 40a by grinding.
[0073] like FIG. 2C As shown, a second circuit structure 50 is then formed on the first packaging surface 40a of the packaging layer 40. The second circuit structure 50 includes at least one second circuit layer 51. The second circuit layer 51 is electrically connected to the first circuit layer 21 of the first circuit structure 20, the first active surface 31a of the first electronic component 31, and the second active surface 32a of the second electronic component 32 via the through-conductive members 22, the first conductive members 31c, and the second conductive members 32c, respectively. In some embodiments, the second circuit structure 50 includes at least one redistribution layer (RDL).
[0074] Then as FIG. 2D As shown, a photoelectric element 60 is provided and disposed on a side of the second circuit structure 50 that is not in contact with the packaging layer 40, and is electrically connected to the second circuit structure 50. In this embodiment, a photonic integrated circuit (PIC) is used as an example of the photoelectric element 60.
[0075] Finally, as shown in FIG. 2E , the carrier plate Crr is removed to obtain the electronic package 2 of the present embodiment.
[0076] In some variant embodiments, as shown in FIG. 2E , a plurality of electrically conductive connecting members 23, each electrically connected to the first circuit layer 21, can be further provided on the second surface 20b of the first circuit structure 20 after the carrier plate Crr is removed. Each electrically conductive connecting member 23 can be a conductive bump, such as a solder ball as exemplified in the present embodiment, to electrically connect to external circuits when the electronic package 2 is applied.
[0077] In addition, the manufacturing method provided by the present embodiment can further include arranging a plurality of the electronic package 2 manufactured by the above manufacturing process on a carrying surface la of a carrying structure 1. FIG. 2E In the above embodiment, only one electronic package 2 and part of the carrying structure 1 are shown. As shown in FIG. 2E-1 , a complete top view of the electronic package module 200 is shown. As shown in FIG. 2E and FIG. 2E-1 , the electronic packages 2 are arranged around a chip 3 also arranged on the carrying surface la. Each electronic package is electrically connected to the carrying structure with the second surface of the first circuit structure. The carrying structure 1 is, for example, a multi-layer circuit board containing a plurality of circuit layers, but is not limited thereto. The chip 3 is, for example, a switch die, but can also be other types of chips, depending on the needs of the overall circuit design, which is not limited by the present embodiment.
[0078] Since the electronic package 2 provided by the present embodiment includes a photonic integrated circuit as an optoelectronic element 60 and a plurality of electronic integrated circuits electrically connected to the photonic integrated circuit, and the photonic integrated circuit can be used to connect to external optical fibers (not shown in the figure) to transmit and receive optical signals, the electronic packages 2 can be used as optical engines (OE) and form an electronic package module 200 in a common package optical form with the carrying structure 1 and the chip 3.
[0079] In the embodiment in which the bottom of each electronic package 2 has electrically conductive connecting members 23, when the electronic packages 2 are arranged on the carrying surface la of the carrying structure 1, and each electronic package 2 is electrically connected to the carrying structure 1 via the electrically conductive connecting members 23.
[0080] Since the first electronic element 31 and the second electronic element 32 in the electronic package 2 manufactured by the manufacturing method provided in the present embodiment are arranged in the electronic package 2 in a stacked manner, the area occupied by the electronic package 2 can be greatly reduced, thus enabling each side of the carrier structure 1 to accommodate more electronic packages 2 as optical engines. In the present embodiment, four electronic packages 2 (optical engines) are arranged on each side of the carrier structure 1 of the electronic package module 200 in the form of a common package optical as an example.
[0081] FIG. 3A to FIG. 3E A cross-sectional view of the manufacturing method of the second embodiment of the electronic package of the present application is shown in FIG. 4. The main difference between the present embodiment and the first embodiment described above is that the electronic element group 30' of the electronic package 2' in the present embodiment further includes a third electronic element 33 having a third active surface 33a and a third inactive surface 33b. The third electronic element 33 is arranged with its third inactive surface 33b offset from the second active surface 32a of the second electronic element 32 so that part of the second active surface 32a is exposed on one side of the third electronic element 33 and the second conductive members 32c are arranged on the part of the second active surface 32a exposed on one side of the third electronic element 33. In some embodiments, the third electronic element 33 is connected to the part of the second active surface 32a of the second electronic element 32 by a die attach film Df arranged on the third inactive surface 33b of the third electronic element 33.
[0082] Like the first electronic element 31 and the second electronic element 32, the third active surface 33a of the third electronic element 33 is also provided with a plurality of third conductive members 33c in advance. Like the second conductive members 32c, the third conductive members 33c can also be a conductive bump or a nail-shaped conductive member, and the present embodiment does not make many restrictions on this.
[0083] Except for the parts related to the third electronic element 33 and / or the third conductive members 33c described above, the rest of the manufacturing method of the present embodiment (including the formation of the encapsulation layer 40, the second circuit structure 50, and the optoelectronic element 60) is the same as that of the first embodiment described above, and thus will not be repeated here.
[0084] The present embodiment also illustrates an electronic package 2. The electronic package 2 comprises a first circuit structure 20 having opposite first and second surfaces 20a and 20b and at least one first circuit layer 21; an electronic component group 30 including a first electronic component 31 having opposite first and second non-active surfaces 31a and 31b and disposed on the first surface 20a of the first circuit structure 20 with the second non-active surface 31b, and a second electronic component 32 having opposite second and non-active surfaces 32a and 32b and offset from the first active surface 31a of the first electronic component 31 with the second active surface 32a exposed on one side of the second electronic component 32; a package layer 40 covering the electronic component group 30 and defining opposite first and second package surfaces 40a and 40b, the second package surface 40b connected to the first surface 20a of the first circuit structure 20; a second circuit structure 50 disposed on the first package surface 40a of the package layer 40 and having at least one second circuit layer 51, and the second circuit layer 51 electrically connected to the first circuit layer 21 of the first circuit structure 20, the first active surface 31a of the first electronic component 31, and the second active surface 32a of the second electronic component 32, respectively; and an optoelectronic component 60 disposed on a side of the second circuit structure 50 not in contact with the package layer 40 and electrically connected to the second circuit structure 50.
[0085] In some embodiments, the first surface 20a of the first circuit structure 20 has a plurality of through conductive members 22, the first active surface 31a exposed on one side of the second electronic component 32 has a plurality of first conductive members 31c, the second active surface 32a has a plurality of second conductive members 32c, and the second circuit layer 51 is electrically connected to the first circuit layer 21, the first active surface 31a, and the second active surface 32a via the through conductive members 22, the first conductive members 31c, and the second conductive members 32c, respectively.
[0086] In some embodiments, the first electronic component 31 and the second electronic component 32 are electronic integrated circuits.
[0087] In some embodiments, the optoelectronic component 60 is a photonic integrated circuit.
[0088] In some embodiments, the first circuit structure 20 includes at least one rewiring layer.
[0089] In some embodiments, the second circuit structure 50 includes at least one rewiring layer.
[0090] In a variant, the electronic component group 30' further comprises a third electronic component 33 having opposite third active surface 33a and third inactive surface 33b, and the third inactive surface 33b is offset from the second active surface 32a of the second electronic component 32 so that part of the second active surface 32a is exposed on one side of the third electronic component 33 and the second conductive members 32c are disposed on the part of the second active surface 32a exposed on one side of the third electronic component 33, and the third active surface 33a is provided with a plurality of third conductive members 33c electrically connected to the second circuit layer 51. In this embodiment, the third electronic component 33 is also an electronic integrated circuit. By using the variant electronic component group 30' to form a variant electronic package 2'.
[0091] In some embodiments, the second surface 20b of the first circuit structure 20 is further provided with a plurality of conductive connecting members 23, and each of the conductive connecting members 23 is electrically connected to the first circuit layer 21.
[0092] In some embodiments, the second surface 20b of the first circuit structure 20 is further provided with a plurality of conductive connecting members 23, and each of the conductive connecting members 23 is electrically connected to the first circuit layer 21.
[0093] In some embodiments, the second surface 20b of the first circuit structure 20 is further provided with a plurality of conductive connecting members 23, and each of the conductive connecting members 23 is electrically connected to the first circuit layer 21.
[0094] In some embodiments, the chip 3 is a switch.
[0095] In some embodiments, each side of the carrier structure 1 is provided with a plurality of electronic packages 2, 2'.
[0096] In summary, the electronic package, the method for manufacturing the electronic package and the electronic package module of the present application can increase the number of optical engines accommodated in the optical electronic module by allowing the second and third active surfaces of the second and third electronic components to face the interior of the electronic package and to be partially exposed to form a stepped structure, and by pre-providing a plurality of first, second and third conductive components between the first, second and third active surfaces exposed to the interior of the electronic package and the second circuit structure to save the occupied area of the electronic package in the plane parallel to the bottom surface of the electronic package. Thus, the information transmission capacity of the electronic module can be effectively improved.
[0097] The above embodiments are only used to illustrate the principles and effects of the present application, and are not used to limit the present application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application should be subject to the claims.
Claims
1. An electronic package, characterized by The first circuit structure has a first surface and a second surface opposite to each other and a first circuit layer; The electronic component group includes a first electronic component and a second electronic component, the first electronic component has a first active surface and a first inactive surface opposite to each other, and the first inactive surface is disposed on the first surface of the first circuit structure, the second electronic component has a second active surface and a second inactive surface opposite to each other, and the second inactive surface is offset from the first active surface of the first electronic component, so that part of the first active surface is exposed outside the second electronic component; The encapsulation layer covers the electronic component group and defines a first encapsulation surface and a second encapsulation surface opposite to each other, and the second encapsulation surface is connected to the first surface of the first circuit structure; The second circuit structure is provided on the first encapsulation surface of the encapsulation layer and has a second circuit layer, and the second circuit layer is electrically connected to the first circuit layer of the first circuit structure, the first active surface of the first electronic component and the second active surface of the second electronic component respectively; And The optoelectronic component is provided on the side of the second circuit structure not in contact with the encapsulation layer and is electrically connected to the second circuit structure. The first surface of the first circuit structure is provided with a plurality of through conductive members, part of the first active surface exposed on one side of the second electronic component is provided with a plurality of first conductive members, the second active surface is provided with a plurality of second conductive members, and the second circuit layer is electrically connected to the first circuit layer, the first active surface and the second active surface through the plurality of through conductive members, the plurality of first conductive members and the plurality of second conductive members respectively.
2. The electronic package of claim 1, wherein, The first electronic component and the second electronic component are electronic integrated circuits.
3. The electronic package of claim 1, wherein, The optoelectronic component is a photonic integrated circuit.
4. The electronic package of claim 1, wherein, The first circuit structure includes a redistribution layer.
5. The electronic package of claim 1, wherein, The second circuit structure includes a redistribution layer.
6. The electronic package of claim 1, wherein, The electronic component group further includes a third electronic component having a third active surface and a third inactive surface opposite to each other, and the third inactive surface is offset from the second active surface of the second electronic component, so that part of the second active surface is exposed outside the third electronic component, and the third active surface is provided with a plurality of third conductive members electrically connected to the second circuit layer.
7. The electronic package of claim 1, wherein, The second surface of the first circuit structure is further provided with a plurality of conductive connecting members, and the conductive connecting members are electrically connected to the first circuit layer respectively.
8. The electronic package of claim 1, wherein, The bearing structure has a bearing surface; 9. An electronic package module, comprising: The chip is disposed on the bearing surface of the bearing structure and is electrically connected to the bearing structure; And The plurality of electronic packages are disposed on the bearing surface of the bearing structure and surround the chip, and each of the electronic packages includes: The first circuit structure has a first surface and a second surface opposite to each other and a first circuit layer, the second surface is electrically connected to the bearing structure; An electronic component group includes a first electronic component having a first active surface and a first inactive surface, and a second electronic component having a second active surface and a second inactive surface. The first electronic component is disposed on the first surface of the first wiring structure with the first inactive surface. The second electronic component is disposed on the first active surface of the first electronic component with the second inactive surface. Part of the first active surface is exposed outside the second electronic component. A packaging layer covers the electronic component group and defines a first packaging surface and a second packaging surface. The second packaging surface is connected to the first surface of the first wiring structure. A second wiring structure is disposed on the first packaging surface of the packaging layer and has a second wiring layer. The second wiring layer is electrically connected to the first wiring layer of the first wiring structure, the first active surface of the first electronic component, and the second active surface of the second electronic component. A photoelectric component is disposed on a side of the second wiring structure not in contact with the packaging layer and is electrically connected to the second wiring structure.
10. The electronic packaging module according to claim 9, wherein: The first surface of the first wiring structure has a plurality of through conductive members. The first active surface has a plurality of first conductive members exposed on one side of the second electronic component. The second active surface has a plurality of second conductive members. The second wiring layer is electrically connected to the first wiring layer, the first active surface, and the second active surface through the plurality of through conductive members, the plurality of first conductive members, and the plurality of second conductive members.
11. The electronic packaging module according to claim 9, wherein: The first electronic component and the second electronic component are electronic integrated circuits.
12. The electronic packaging module according to claim 9, wherein: The photoelectric component is a photonic integrated circuit.
13. The electronic packaging module according to claim 9, wherein: The first wiring structure includes a redistribution layer.
14. The electronic packaging module according to claim 9, wherein: The second wiring structure includes a redistribution layer.
15. The electronic package module of claim 9, wherein the electronic package module is a flip chip module. The electronic component group further includes a third electronic component having a third active surface and a third inactive surface. The third electronic component is disposed on the second active surface of the second electronic component with the third inactive surface. Part of the second active surface is exposed outside the third electronic component. The third active surface has a plurality of third conductive members electrically connected to the second wiring layer.
16. The electronic packaging module according to claim 9, wherein: The second surface of the first wiring structure further has a plurality of conductive connecting members. Each of the electronic packaging members is electrically connected to the support structure through the conductive connecting members.
17. The electronic packaging module according to claim 9, wherein: The chip is a conversion chip.
18. The electronic package module of claim 9, wherein the electronic package module is a flip chip module. Each side of the support structure has a plurality of the electronic packaging members. The first electronic component and the second electronic component are electronic integrated circuits. The photoelectric component is a photonic integrated circuit. The first wiring structure includes a redistribution layer. The second wiring structure includes a redistribution layer. The electronic component group further includes a third electronic component having a third active surface and a third inactive surface. The third electronic component is disposed on the second active surface of the second electronic component with the third inactive surface. Part of the second active surface is exposed outside the third electronic component. The third active surface has a plurality of third conductive members electrically connected to the second wiring layer. The second surface of the first wiring structure further has a plurality of conductive connecting members. Each of the electronic packaging members is electrically connected to the support structure through the conductive connecting members. The chip is a conversion chip. Each side of the support structure has a plurality of the electronic packaging members.