GNSS inertial navigation performance testing device

Abstract

The utility model belongs to the technical field of GNSS (Global Navigation Satellite System) inertial navigation, and particularly discloses a GNSS inertial navigation performance testing device which comprises a plurality of USB (Universal Serial Bus) interfaces connected with a computer and a plurality of GNSS modules corresponding to the USB interfaces, a linear voltage regulator and a USB-to-UART (Universal Asynchronous Receiver / Transmitter) circuit are connected between each USB interface and the GNSS module, and the USB-to-UART circuit is connected with the computer. According to the utility model, through cooperation of the plurality of USB interfaces, the logic level driving circuit, the CAN bus transceiver, the WHELLTICK level conversion circuit and the FWD level conversion circuit, a plurality of GNSS modules can be tested at the same time, and vehicle levels of the WHELLTICK and the FWD can be converted into TTL levels by using the WHELLTICK level conversion circuit and the FWD level conversion circuit so as to match the level of the GNSS; the logic level driving circuit divides a group of signals into a plurality of groups of same signals, and then the signals are connected to different GNSS module pins, so that the information received by the GNSS is ensured to be the same, the consistency of the GNSS can be tested, a comparison sample can be added, the test efficiency is improved, and a certain test cost is reduced.

Description

Technical Field

[0001] This utility model relates to the field of GNSS inertial navigation technology, specifically a GNSS inertial navigation performance testing device. Background Technology

[0002] Inertial navigation (DR) is a GNSS positioning technology that uses inertial sensors (including gyroscopes and accelerometers) to assist in positioning. Among them, unconstrained inertial navigation (UDR) continuously measures and monitors the vehicle's acceleration and its directional changes, and then integrates the measurement data with GNSS data through sensor fusion technology to calculate and optimize more accurate position results in real time.

[0003] Automotive inertial navigation (ADR) is based on unconstrained inertial navigation, integrating data from the vehicle's wheel speed pulse sensors (WHELLTICK) and forward / reverse status data (FWD) to achieve higher-precision position calculation results. Some vehicles cannot provide data from the vehicle's wheel speed pulse sensors and forward / reverse status data via data cables, and can only provide WHELLTICK and FWD data via the CAN bus.

[0004] Typical tests for GNSS inertial navigation systems include sensitivity, positioning accuracy, and inertial navigation performance. Testing inertial navigation performance requires testing the entire system. However, setting up a test environment using the entire system has the following drawbacks due to cost and space constraints:

[0005] 1. The number of tests is too small to test equipment consistency and to allow for the addition of control samples;

[0006] 2. Testing equipment and environment cannot be reused;

[0007] 3. Some interfaces on the device are not universal and require additional auxiliary circuit boards;

[0008] 4. Some units do not have a reserved firmware upgrade channel; firmware upgrades require disassembly and reinstallation.

[0009] 5. Some parts of the machine require high current power supply, which the test vehicle cannot provide;

[0010] The aforementioned shortcomings lead to high customization of testing equipment, increasing testing costs, and a small number of tests, resulting in low testing efficiency. Therefore, we need to propose a GNSS inertial navigation performance testing device to solve these problems, enabling it to increase test data, improve testing efficiency, and reduce testing costs. Utility Model Content

[0011] The purpose of this invention is to provide a GNSS inertial navigation performance testing device that can increase test data, improve test efficiency, and reduce test costs, thereby solving the problems mentioned in the background art.

[0012] To achieve the above objectives, this utility model provides the following technical solution: a GNSS inertial navigation performance testing device, comprising multiple USB interfaces for connecting to a computer and multiple GNSS modules corresponding to the multiple USB interfaces. Each USB interface is connected to a linear regulator and a USB-to-UART circuit. One end of each GNSS module is connected to a logic level driving circuit. One end of the logic level driving circuit is connected to a WHELLTICK level conversion circuit and an FWD level conversion circuit. One end of the WHELLTICK level conversion circuit and the FWD level conversion circuit is connected to a connection interface for connecting to a vehicle. One end of the connection interface is connected to a CAN bus transceiver, and one end of the CAN bus transceiver is connected to the logic level driving circuit.

[0013] Preferably, the WHELLTICK level conversion circuit includes a comparator U3A. The output terminal of the comparator U3A is connected to a resistor R23 with one end connected to VDD. The VDD terminal of the comparator U3A is connected to a capacitor C19 to ground. The positive terminal of the comparator U3A is connected in parallel with a capacitor C15 to ground, a resistor R20 to ground, and a resistor R25 for receiving drive signals. The negative terminal of the comparator U3A is connected in parallel with a capacitor C17 to ground, a resistor R15 to ground, and a resistor R18 with one end connected to VDD.

[0014] Preferably, the FWD level conversion circuit includes a comparator U3B. The output terminal of the comparator U3B is connected to a resistor R24 ​​with one end connected to VDD. The VDD terminal of the comparator U3B is connected to a capacitor C20 to ground. The positive terminal of the comparator U3B is connected in parallel with a capacitor C16 to ground, a resistor R21 to ground, and a resistor R16 for receiving drive signals. The negative terminal of the comparator U3B is connected in parallel with a capacitor C18 to ground, a resistor R17 to ground, and a resistor R19 with one end connected to VDD.

[0015] Preferably, the logic level driving circuit includes a WHELLTICK level driving circuit and an FWD level driving circuit, and the WHELLTICK level driving circuit and the FWD level driving circuit are configured in the same way.

[0016] Preferably, the FWD level driving circuit includes a driver chip U105 and a driver chip U106 connected in parallel. The driver chip U105 and the driver chip U106 have an eight-channel buffer and driver with tri-state output. Pins 1, 10, and 19 of the driver chip U105 and pins 1, 10, and 19 of the driver chip U106 are all grounded. A capacitor C113 is connected to ground at pin 20 of the driver chip U105. The connection terminal of the capacitor C113 to the driver chip U105 is provided with a connection terminal for connecting to VDD. A capacitor C114 is connected to ground at pin 20 of the driver chip U106. The connection terminal of the capacitor C114 to the driver chip U106 is provided with a connection terminal for connecting to VDD.

[0017] Preferably, it also includes a USB interface extender for connecting to a computer, with multiple USB interfaces connected in parallel on the USB interface extender.

[0018] Preferably, the GNSS module is provided with a PWR interface for connecting a linear voltage regulator and multiple UART interfaces for connecting a USB to UART circuit.

[0019] Preferably, the connection interface is provided with a bus interface for connecting a CAN bus transceiver, a WHELLTICK interface for connecting a WHELLTICK level conversion circuit, and an FWD interface for connecting an FWD level conversion circuit.

[0020] Compared with the prior art, the beneficial effects of the present invention are:

[0021] This invention, through the cooperation of multiple USB interfaces, logic level driving circuits, CAN bus transceivers, WHELLTICK level conversion circuits, and FWD level conversion circuits, can simultaneously test multiple GNSS modules. Since CAN bus, WHELLTICK, and FWD all provide information from the vehicle, the WHELLTICK and FWD level conversion circuits convert the vehicle's WHELLTICK and FWD levels to TTL levels to match the GNSS levels. The logic level driving circuit divides a set of signals into multiple identical signals, which are then connected to different GNSS module pins, ensuring that the information received by the GNSS is identical. This not only tests the consistency of GNSS modules but also allows for the addition of comparison samples, increasing the number of tests, improving testing efficiency, and simultaneously reducing testing costs.

[0022] This invention, through the inclusion of WHELLTICK and FWD level conversion circuits, is applicable to various vehicles. During vehicle operation, the generated WHELLTICK and FWD signals are directly transmitted to the testing device to complete the level conversion, thus improving the versatility of the testing device. Attached Figure Description

[0023] Figure 1 This is a system block diagram of the present invention;

[0024] Figure 2 The circuit diagrams for the WHELLTICK level conversion circuit and the FWD level conversion circuit of this utility model are shown below.

[0025] Figure 3 This is a circuit diagram of the logic level driving circuit of this utility model. Detailed Implementation

[0026] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0027] Please see Figure 1-3 This utility model provides a technical solution: a GNSS inertial navigation performance testing device, including multiple USB interfaces for connecting to a computer and multiple GNSS modules corresponding to the multiple USB interfaces. Each USB interface is connected to a linear regulator and a USB-to-UART circuit between itself and the GNSS module. One end of each GNSS module is connected to a logic level driving circuit, and one end of the logic level driving circuit is connected to a WHELLTICK level conversion circuit and an FWD level conversion circuit. One end of the WHELLTICK level conversion circuit and the FWD level conversion circuit is connected to a connection interface for connecting to a vehicle. One end of the connection interface is connected to a CAN bus transceiver, and one end of the CAN bus transceiver is connected to the logic level driving circuit. The GNSS module contains a universal asynchronous transceiver, which generates a UART signal.

[0028] In use, the computer connects to multiple USB ports. The UART signal of the GNSS module is connected to a USB-to-UART circuit to convert the UART data type to USB data type. The differential data from the USB module is connected to the computer via USB_DP and USB_DN data lines for data acquisition, firmware upgrades, and other operations on the GNSS. Additionally, the 5V voltage from the USB port is output to the level required by the GNSS through a linear regulator. This constitutes the complete test system for testing the performance of GNSS inertial navigation.

[0029] However, when using UDR (Under-Regulator Detection), weak GNSS signals, or even no GNSS signals, errors from inertial sensors due to mechanical vibration accumulate, causing the vehicle's positioning to deviate from its actual location. Therefore, adding data from vehicle wheel speed pulse sensors (WHELLTICK) and forward / reverse status data (FWD), or transmitting both data to the GNSS module via a CAN bus transceiver, and then using algorithms to reduce the errors caused by mechanical vibration, is a solution called ADR (Adaptive Detection), primarily used in automobiles and two-wheeled vehicles. Figure 1 As shown, the CAN bus (CAN_H and CAN_L), WHELLTICK, and FWD all provide information from the vehicle. The WHELLTICK level conversion circuit and the FWD level conversion circuit can convert the vehicle level of WHELLTICK and FWD to TTL level to match the GNSS level. The logic level drive circuit divides a set of signals into multiple identical signals and connects them to different module pins to ensure that the information received by the GNSS is the same. This not only tests the consistency of the GNSS but also allows for the addition of comparison samples, improving test efficiency and reducing test costs.

[0030] The WHELLTICK level conversion circuit includes a comparator U3A. The output terminal of the comparator U3A is connected to a resistor R23 with one end connected to VDD. The VDD terminal of the comparator U3A is connected to a capacitor C19 to ground. The positive terminal of the comparator U3A is connected in parallel with a capacitor C15 to ground, a resistor R20 to ground, and a resistor R25 for receiving drive signals. The negative terminal of the comparator U3A is connected in parallel with a capacitor C17 to ground, a resistor R15 to ground, and a resistor R18 with one end connected to VDD.

[0031] The FWD level conversion circuit includes a comparator U3B. The output terminal of the comparator U3B is connected to a resistor R24 ​​with one end connected to VDD. The VDD terminal of the comparator U3B is connected to a capacitor C20 to ground. The positive terminal of the comparator U3B is connected in parallel with a capacitor C16 to ground, a resistor R21 to ground, and a resistor R16 for receiving drive signals. The negative terminal of the comparator U3B is connected in parallel with a capacitor C18 to ground, a resistor R17 to ground, and a resistor R19 with one end connected to VDD.

[0032] During level conversion, since the voltage amplitudes of the WHELLTICK and FWD signals output by each vehicle differ, the purpose of adding level conversion is to solve this problem, converting the level signals within a certain range into the voltages required by the GNSS module. Specifically: ... Figure 2As shown, WHELLTICK_IN and FWD_IN are vehicle output signals. WHELLTICK_OUT and FWD_OUT are connected to a logic level driving circuit. By adjusting the resistance values of resistor R20 and resistor R21, a voltage of 500mV - 24V can be converted into the VDD voltage required by GNSS, greatly adapting to various types of vehicles. When a low level is input, V1+ < V1-, V2+ < V2-, and comparator U3A (LM393) and comparator U3B output a low level. When a high level is input, V1+ > V1-, V2+ > V2-, and comparator U3A (LM393) and comparator U3B output a high level. In this way, the signal can be converted into the level required by GNSS, completing the level conversion.

[0033] The logic level driving circuit includes a WHELLTICK level driving circuit and a FWD level driving circuit, and the WHELLTICK level driving circuit and the FWD level driving circuit are set in the same way.

[0034] As Figure 3 As shown, the FWD level driving circuit includes a driving chip U105 and a driving chip U106 connected in parallel. The driving chip U105 and the driving chip U106 have an eight-channel buffer and driver with three-state output. Pin 1, pin 10, and pin 19 of the driving chip U105 and pin 1, pin 10, and pin 19 of the driving chip U106 are all grounded. A ground capacitor C113 is connected to pin 20 of the driving chip U105. A connection terminal for connecting to VDD is provided at the connection end of the ground capacitor C113 and the driving chip U105. A ground capacitor C114 is connected to pin 20 of the driving chip U106. A connection terminal for connecting to VDD is provided at the connection end of the ground capacitor C114 and the driving chip U106.

[0035] As Figure 3 As shown, using the chip model SN74LVC244A, which is an 8-channel buffer with three-state output, and using two components, the driving chip U105 and the driving chip U106, a group of signals (FWD) can be divided into 16 groups of the same signals (FWD1 - FWD16) and directly connected to the pins of the GNSS module to ensure that the information received by GNSS is the same. The WHELLTICK level driving circuit and the FWD level driving circuit use the same logic driving circuit, which will not be repeated here.

[0036] It also includes a USB interface expander connected to a computer (such as Figure 1The USB hub (as indicated in the image) connects multiple USB ports in parallel to the USB port extender. By setting up the USB port extender, it is easy to increase the number of computer-to-USB connections, thereby facilitating the testing of the corresponding number of GNSS modules according to actual testing needs.

[0037] The GNSS module is equipped with a PWR interface for connecting a linear regulator and multiple UART interfaces for connecting a USB to UART circuit. The USB to UART circuit mainly consists of a conversion chip for converting USB signals to UART signals. The conversion chip models include FT232R, CH340, and DPU02, and different models of chips are selected according to actual usage requirements. The linear regulator is used to convert unstable input voltage into stable output voltage, providing a stable voltage for the GNSS module.

[0038] The connection interface is equipped with a bus interface for connecting the CAN bus transceiver, a WHELLTICK interface for connecting the WHELLTICK level conversion circuit, and an FWD interface for connecting the FWD level conversion circuit. This facilitates the connection of the device to the vehicle, enabling it to perform inertial navigation performance testing on the GNSS module while the vehicle is in motion.

[0039] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A GNSS inertial navigation performance testing device, characterized in that: The device includes multiple USB ports for connecting to a computer and multiple GNSS modules corresponding to the USB ports. Each USB port is connected to a linear regulator and a USB-to-UART circuit. One end of each GNSS module is connected to a logic level driving circuit. One end of the logic level driving circuit is connected to a WHELLTICK level conversion circuit and an FWD level conversion circuit. One end of the WHELLTICK level conversion circuit and the FWD level conversion circuit is connected to a connection interface for connecting to a vehicle. One end of the connection interface is connected to a CAN bus transceiver, and one end of the CAN bus transceiver is connected to the logic level driving circuit.

2. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: The WHELLTICK level conversion circuit includes a comparator U3A. The output terminal of the comparator U3A is connected to a resistor R23 with one end connected to VDD. The VDD terminal of the comparator U3A is connected to a capacitor C19 to ground. The positive terminal of the comparator U3A is connected in parallel with a capacitor C15 to ground, a resistor R20 to ground, and a resistor R25 for receiving drive signals. The negative terminal of the comparator U3A is connected in parallel with a capacitor C17 to ground, a resistor R15 to ground, and a resistor R18 with one end connected to VDD.

3. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: The FWD level conversion circuit includes a comparator U3B. The output terminal of the comparator U3B is connected to a resistor R24 ​​with one end connected to VDD. The VDD terminal of the comparator U3B is connected to a capacitor C20 to ground. The positive terminal of the comparator U3B is connected in parallel with a capacitor C16 to ground, a resistor R21 to ground, and a resistor R16 for receiving drive signals. The negative terminal of the comparator U3B is connected in parallel with a capacitor C18 to ground, a resistor R17 to ground, and a resistor R19 with one end connected to VDD.

4. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: The logic level driving circuit includes a WHELLTICK level driving circuit and an FWD level driving circuit, and the WHELLTICK level driving circuit and the FWD level driving circuit are configured in the same way.

5. The GNSS inertial navigation performance testing device according to claim 4, characterized in that: The FWD level driving circuit includes driver chips U105 and U106 connected in parallel. Driver chips U105 and U106 have eight-channel buffers and drivers with tri-state outputs. Pins 1, 10, and 19 of driver chip U105 and pins 1, 10, and 19 of driver chip U106 are all grounded. A capacitor C113 is connected to ground at pin 20 of driver chip U105. The connection terminal of the capacitor C113 to the driver chip U105 is provided with a connection terminal for connecting to VDD. A capacitor C114 is connected to ground at pin 20 of driver chip U106. The connection terminal of the capacitor C114 to the driver chip U106 is provided with a connection terminal for connecting to VDD.

6. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: It also includes a USB interface extender for connecting to a computer, with multiple USB interfaces connected in parallel on the USB interface extender.

7. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: The GNSS module is equipped with a PWR interface for connecting a linear voltage regulator and multiple UART interfaces for connecting a USB to UART circuit.

8. The GNSS inertial navigation performance testing device according to claim 1, characterized in that: The connection interface is provided with a bus interface for connecting the CAN bus transceiver, a WHELLTICK interface for connecting the WHELLTICK level conversion circuit, and an FWD interface for connecting the FWD level conversion circuit.

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