Control circuit of LED display screen and LED display equipment

Abstract

The utility model discloses a control circuit of an LED display screen and LED display equipment, and the control circuit is characterized in that a selection signal input end and an SPI signal input end of a channel selection module in the control circuit are connected with a selection signal output end and an SPI signal output end of a receiving card in a one-to-one correspondence manner; a first output end of the channel selection module is connected with a serial port data receiving end of the control module reservation module, and is connected with an SPI signal receiving end of the storage module reservation module through the short circuit reservation module; the second input end of the channel selection module is connected with the serial port data sending end of the control module reservation module and is connected with the SPI data sending end of the storage module reservation module through the short circuit reservation module, and the second output end of the channel selection output module is connected with the SPI data receiving end of the receiving card. The SPI signal end of the control module reserved module is connected with the SPI signal end of the storage module reserved module. According to the utility model, the compatibility of SPI communication and serial port communication of the receiving card is realized through the channel selection module, and the number of components is reduced.

Description

Technical Field

[0001] This utility model belongs to the field of LED display technology, specifically relating to a control circuit for an LED display screen and an LED display device. Background Technology

[0002] A complete LED display device typically includes an LED display screen, a receiver card, a controller, and a flash memory. The receiver card receives data from external devices and sends this data to the controller and / or flash memory. Therefore, the control circuit of the LED display screen needs to be compatible with the connection between the receiver card and the controller and / or flash memory.

[0003] The existing LED display control circuit uses a receiver card that connects to the controller via RS232 communication and to the flash memory via SPI communication. Because RS232 and SPI signals are incompatible, each communication method is connected to a channel selection module to enable RS232 serial communication between the receiver card and one of the multiple controllers, or SPI communication between the receiver card and one of the multiple memory cards.

[0004] Since each channel selection module includes several chips, the existing LED display control circuit not only has many components but also high cost. Therefore, it is necessary to design an LED display control circuit with fewer components and lower cost. Utility Model Content

[0005] In view of this, the present invention provides a control circuit and LED display device for an LED display screen, the main purpose of which is to solve the problem of the large number of components and high cost of existing LED display screen control circuits.

[0006] To address the aforementioned problems, this application provides a control circuit for an LED display screen, including a receiver card, a channel selection module, a control module reserved module, a storage module reserved module, and a short-circuit reserved module, wherein...

[0007] The selection signal input terminal of the channel selection module is electrically connected to the selection signal output terminal of the receiving card. The first input terminal of the channel selection module is electrically connected to the SPI data transmission terminal of the receiving card. The first output terminal of the channel selection module is electrically connected to the serial port data receiving terminal of the control module reserved module and the first input terminal of the short-circuit reserved module, respectively. The first output terminal of the short-circuit reserved module is electrically connected to the SPI data receiving terminal of the storage module reserved module. The SPI data receiving terminal of the storage module reserved module is also electrically connected to the SPI data transmission terminal of the control module reserved module.

[0008] The second input terminal of the channel selection module is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the channel selection module is electrically connected to the second input terminal of the short-circuit reserved module, the second output terminal of the short-circuit reserved module is electrically connected to the SPI chip select input terminal of the storage module reserved module, and the SPI chip select input terminal of the storage module reserved module is also electrically connected to the SPI chip select output terminal of the control module reserved module.

[0009] The third input terminal of the channel selection module is electrically connected to the SPI clock output terminal of the receiving card, the third output terminal of the channel selection module is electrically connected to the third input terminal of the shorting reserved module, the third output terminal of the shorting reserved module is electrically connected to the SPI clock input terminal of the storage module reserved module, and the SPI clock input terminal of the storage module reserved module is also electrically connected to the SPI clock output terminal of the control module reserved module.

[0010] The fourth input terminal of the short-circuit reserved module is electrically connected to the SPI data transmitting terminal of the storage module reserved module. The fourth output terminal of the short-circuit reserved module is electrically connected to the fourth input terminal of the channel selection module. The fourth input terminal of the channel selection module is also electrically connected to the SPI data transmitting terminal of the control module reserved module. The fourth output terminal of the channel selection module is electrically connected to the SPI data receiving terminal of the receiver card. The SPI data transmitting terminal of the storage module reserved module is also electrically connected to the SPI data receiving terminal of the control module reserved module.

[0011] In one embodiment of this utility model, optionally, when the controller is inserted into the reserved module of the control module, the memory is not inserted into the reserved module of the storage module, and the shorting reserved module is not shorted, the controller communicates with the receiving card via RS232 serial communication through the channel selection module; when the memory is inserted into the reserved module of the storage module, the shorting reserved module is shorted, and the controller is not inserted into the reserved module of the control module, the memory communicates with the receiving card via SPI communication through the channel selection module; when the controller is inserted into the reserved module of the control module, the memory is inserted into the reserved module of the storage module, and the shorting reserved module is not shorted, the controller communicates with the receiving card via RS232 serial communication through the channel selection module, and the controller communicates with the memory via SPI communication.

[0012] In one embodiment of this utility model, optionally, the channel selection module includes a selection unit and an output unit, wherein,

[0013] The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card, the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card, the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit, and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the reserved module of the control module and the first input terminal of the short-circuit reserved module, respectively.

[0014] The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the short-circuit reserved module.

[0015] The third input terminal of the output unit is electrically connected to the SPI clock output terminal of the receiving card, and the third output terminal of the output unit is electrically connected to the third input terminal of the short-circuit reserved module.

[0016] The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the short-circuit reserved module and the serial port data transmission terminal of the control module reserved module, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.

[0017] In one embodiment of this utility model, optionally, the selection unit includes a first analog switch chip and a second analog switch chip, wherein,

[0018] The first selection signal input terminal of the first analog switch chip is electrically connected to the first selection signal output terminal of the receiver card; the second selection signal input terminal of the first analog switch chip is electrically connected to the second selection signal output terminal of the receiver card; the first common terminal of the first analog switch chip is electrically connected to the SPI data receiving terminal of the receiver card; the first group of data terminals of the first analog switch chip is electrically connected to the fourth output terminal of the output unit; the second common terminal of the first analog switch chip is electrically connected to the SPI chip select output terminal of the receiver card; and the second group of data terminals of the first analog switch chip is electrically connected to the second input terminal of the output unit.

[0019] The selection signal input terminal of the second analog switch chip is electrically connected to the third selection signal output terminal of the receiver card, the first common terminal of the second analog switch chip is electrically connected to the SPI data transmission terminal of the receiver card, and the first data terminal of the second analog switch chip is electrically connected to the first input terminal of the output unit.

[0020] In one embodiment of this utility model, optionally, the output unit includes a first output chip and a second output chip, wherein,

[0021] The first set of input terminals of the first output chip is electrically connected to the first set of data terminals of the second analog switch chip. The first set of output terminals of the first output chip is electrically connected to the serial port data receiving terminal of the reserved module of the control module and the first input terminal of the short-circuit reserved module, respectively. The second set of input terminals of the first output chip is electrically connected to the SPI clock output terminal of the receiving card. The second set of output terminals of the first output chip is electrically connected to the third input terminal of the short-circuit reserved module.

[0022] The first set of input terminals of the second output chip is electrically connected to the second set of data terminals of the first analog switch chip, and the first set of output terminals of the second output chip is electrically connected to the second input terminal of the short-circuit reserved module; the second set of input terminals of the second output chip is electrically connected to the fourth output terminal of the short-circuit reserved module and the serial port data transmission terminal of the control module reserved module, respectively, and the second set of output terminals of the second output chip is electrically connected to the first set of data terminals of the first analog switch chip.

[0023] In one embodiment of this utility model, optionally, the control module reserved module includes multiple controller reserved areas, and the storage module reserved module includes multiple memory reserved areas, wherein,

[0024] Each controller reserved area's serial port data receiving terminal is electrically connected to the first set of output terminals of the first output chip; each controller reserved area's serial port data transmitting terminal is electrically connected to the second set of input terminals of the second output chip; each controller reserved area's SPI chip select output terminal is electrically connected to the SPI chip select input terminal of a memory reserved area; each controller reserved area's SPI clock output terminal is electrically connected to the SPI clock input terminal of a memory reserved area; each controller reserved area's SPI data transmitting terminal is electrically connected to the SPI data receiving terminal of a memory reserved area; and each controller reserved area's SPI data receiving terminal is electrically connected to the SPI data transmitting terminal of a memory reserved area.

[0025] In one embodiment of this utility model, optionally, the SPI chip select input terminal of each memory reserved area is electrically connected to the SPI chip select output terminal of a controller reserved area and the second output terminal of the short-circuit reserved module, the SPI clock input terminal of each memory reserved area is electrically connected to the SPI clock output terminal of a controller reserved area and the third output terminal of the short-circuit reserved module, the SPI data receiving terminal of each memory reserved area is electrically connected to the SPI data transmitting terminal of a controller reserved area and the first input terminal of the short-circuit reserved module, and the SPI data transmitting terminal of each memory reserved area is electrically connected to the SPI data receiving terminal of a controller reserved area and the fourth input terminal of the short-circuit reserved module.

[0026] In one embodiment of this utility model, optionally, the short-circuit reservation module includes multiple sets of short-circuit units, each set of short-circuit units including a first short-circuit reservation area, a second short-circuit reservation area, a third short-circuit reservation area, and a fourth short-circuit reservation area, wherein,

[0027] The first end of each first shorting reserved area is electrically connected to the first set of outputs of the first output chip, and the second end of each first shorting reserved area is electrically connected to the SPI data receiving end of a memory reserved area. The first end of each second shorting reserved area is electrically connected to the first set of outputs of the second output chip, and the second end of each second shorting reserved area is electrically connected to the SPI chip select input end of a memory reserved area. The first end of each third shorting reserved area is electrically connected to the second set of outputs of the first output chip, and the second end of each third shorting reserved area is electrically connected to the SPI clock input end of a memory reserved area. The first end of each fourth shorting reserved area is electrically connected to the second set of inputs of the second output chip, and the second end of each fourth shorting reserved area is electrically connected to the SPI data transmitting end of a memory reserved area.

[0028] In one embodiment of the present invention, optionally, the first shorting reserved area, the second shorting reserved area, the third shorting reserved area and the fourth shorting reserved area are connected to zero-ohm resistors or shorting plugs.

[0029] In addition, this application also provides an LED display device, including an LED display screen, a receiving card, and a control circuit for the LED display screen as described above.

[0030] This utility model provides a control circuit and LED display device for an LED display screen. The control module has a reserved module for multiple controllers, the storage module has a reserved module for multiple memories, and the shorting module has a reserved module for multiple shorting devices. A channel selection module connects the required channels. Corresponding controllers, memory cards, or shorting devices are placed as needed, enabling the receiving card to communicate with the corresponding controller or memory. Through a channel selection module, the controller and receiving card can communicate via serial port, and the memory and receiving card can communicate via SPI, achieving compatibility between SPI and serial communication of the receiving card. This reduces the number of components and lowers production costs.

[0031] The above description is merely an overview of the technical solution of this utility model. In order to better understand the technical means of this utility model and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this utility model more obvious and understandable, specific embodiments of this utility model are given below. Attached Figure Description

[0032] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present invention. The same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0033] Figure 1 A structural block diagram of a control circuit for an LED display screen, which is an exemplary embodiment of this utility model;

[0034] Figure 2 This is a circuit connection diagram of the selection unit of the control circuit of an LED display screen, which is an exemplary embodiment of the present invention.

[0035] Figure 3 This is a circuit connection diagram of the output unit of the control circuit of an LED display screen, which is an exemplary embodiment of the present invention.

[0036] Figure 4 This is a partial circuit connection diagram of the short-circuit reserved module of the control circuit of an LED display screen, which is an exemplary embodiment of this utility model.

[0037] Figure 5 This is a simplified schematic diagram of the control circuit for an LED display screen.

[0038] Figure 6 This is a simplified schematic diagram of a control circuit for an LED display screen, which is an exemplary embodiment of the present invention.

[0039] in,

[0040] Figures 1-6 The following are the labels: 11-Receiver Card; 12-Channel Selection Module; 13-Control Module Reserved Module; 14-Storage Module Reserved Module; 15-Short-Circuit Reserved Module; UF1-Second Output Chip; UF2-First Output Chip; UF3-Second Analog Switch Chip; UF4-First Analog Switch Chip; U1-Controller Reserved Area; U2-Memory Reserved Area; RD1-First Short-Circuit Reserved Area; RD2-Second Short-Circuit Reserved Area; RD3-Third Short-Circuit Reserved Area; RD4-Fourth Short-Circuit Reserved Area. Detailed Implementation

[0041] The present invention will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0042] To further illustrate the technical means and effects adopted by this utility model to achieve its intended purpose, the specific implementation methods, structures, features, and effects according to this utility model application are described in detail below with reference to the accompanying drawings and preferred embodiments. In the following description, different "an embodiment" or "an embodiment" do not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics in one or more embodiments can be combined in any suitable form.

[0043] The following is combined Figures 1 to 6 The present invention describes a control circuit for an LED display screen according to some embodiments thereof.

[0044] In one embodiment, such as Figure 1 As shown, a control circuit for an LED display screen includes a receiver card 11, a channel selection module 12, a control module reserved module 13, a storage module reserved module 14, and a short-circuit reserved module 15.

[0045] The selection signal input terminal of the channel selection module 12 is electrically connected to the selection signal output terminal of the receiving card 11. The first input terminal of the channel selection module 12 is electrically connected to the SPI data transmission terminal of the receiving card 11. The first output terminal of the channel selection module 12 is electrically connected to the serial port data receiving terminal of the control module reserved module 13 and the first input terminal of the short-circuit reserved module 15, respectively. The first output terminal of the short-circuit reserved module 15 is electrically connected to the SPI data receiving terminal of the storage module reserved module 14. The SPI data receiving terminal of the storage module reserved module 14 is also electrically connected to the SPI data transmission terminal of the control module reserved module 13.

[0046] The second input terminal of the channel selection module 12 is electrically connected to the SPI chip select output terminal of the receiver card 11. The second output terminal of the channel selection module 12 is electrically connected to the second input terminal of the short-circuit reserved module 15. The second output terminal of the short-circuit reserved module 15 is electrically connected to the SPI chip select input terminal of the storage module reserved module 14. The SPI chip select input terminal of the storage module reserved module 14 is also electrically connected to the SPI chip select output terminal of the control module reserved module 13.

[0047] The third input terminal of the channel selection module 12 is electrically connected to the SPI clock output terminal of the receiver card 11. The third output terminal of the channel selection module 12 is electrically connected to the third input terminal of the short-circuit reserved module 15. The third output terminal of the short-circuit reserved module 15 is electrically connected to the SPI clock input terminal of the storage module reserved module 14. The SPI clock input terminal of the storage module reserved module 14 is also electrically connected to the SPI clock output terminal of the control module reserved module 13.

[0048] The fourth input terminal of the short-circuit reserved module 15 is electrically connected to the SPI data transmitting terminal of the storage module reserved module 14. The fourth output terminal of the short-circuit reserved module 15 is electrically connected to the fourth input terminal of the channel selection module 12. The fourth input terminal of the channel selection module 12 is also electrically connected to the SPI data transmitting terminal of the control module reserved module 13. The fourth output terminal of the channel selection module is electrically connected to the SPI data receiving terminal of the receiver card 11. The SPI data transmitting terminal of the storage module reserved module 15 is also electrically connected to the SPI data receiving terminal of the control module reserved module 13.

[0049] Specifically, the control module has a reserved module for multiple controllers, the storage module has a reserved module for multiple memories, and the shorting module has multiple shorting devices. Therefore, the channel selection module selects the corresponding channel to connect based on the channel selection signal from the receiving card, enabling SPI data communication between the receiving card and the corresponding controller's serial port data or the memory's SPI data. For example, when the receiving card outputs a 00 selection signal, the first channel of the channel selection module connects, allowing the receiving card to communicate serially with the first controller or via SPI with the first memory.

[0050] When the controller is inserted into the reserved module of the control module, but the memory is not inserted into the reserved module of the storage module, and the shorted reserved module is not shorted, the controller communicates with the receiving card via RS232 serial port through the channel selection module. When the memory is inserted into the reserved module of the storage module, the shorted reserved module is shorted, and the controller is not inserted into the reserved module of the control module, the memory communicates with the receiving card via SPI through the channel selection module. When the controller is inserted into the reserved module of the control module, the memory is inserted into the reserved module of the storage module, and the shorted reserved module is shorted, the controller communicates with the receiving card via RS232 serial port through the channel selection module, and the controller communicates with the memory via SPI.

[0051] Compared with the prior art, the control circuit of the LED display provided in this application has multiple controllers in the reserved module of the control module, multiple memories in the reserved module of the storage module, multiple shorting devices in the shorting reserved module, and a channel selection module that connects the required channels. The corresponding controller, memory card or shorting device is placed as needed, so that the receiving card can communicate with the corresponding controller or the corresponding memory. Through a channel selection module, the controller and the receiving card can communicate via serial port, and the memory and the receiving card can communicate via SPI, realizing the compatibility of SPI communication and serial communication of the receiving card, reducing the number of components and reducing production costs.

[0052] In one embodiment, the channel selection module includes a selection unit and an output unit, wherein...

[0053] The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card; the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card; the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit; and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the reserved module of the control module and the first input terminal of the short-circuit reserved module, respectively.

[0054] The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiver card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the short-circuit reserved module.

[0055] The third input terminal of the output unit is electrically connected to the SPI clock output terminal of the receiver card, and the third output terminal of the output unit is electrically connected to the third input terminal of the short-circuit reserved module.

[0056] The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the short-circuit reserved module and the serial port data transmission terminal of the control module reserved module, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.

[0057] In this embodiment, the selection unit is a four-to-one analog switch. Since the control module reserved module houses multiple controllers and the storage module reserved module houses multiple memories, a multi-to-one analog switch is required. Each channel output terminal of the analog switch is connected to a signal of a controller or a memory. The connection of a channel is controlled by a selection signal. The input of the analog switch is connected to the SPI data of the receiving card, and the output of the analog switch is connected to the output module. The output module uses a bus transceiver to realize asynchronous bidirectional communication between data buses, enabling serial communication between the receiving card's SPI data and the controller on the control module reserved module or SPI communication between the memory on the storage module reserved module.

[0058] In one embodiment, such as Figure 2 Therefore, the selection unit includes a first analog switch chip UF4 and a second analog switch chip UF3, wherein,

[0059] The first selection signal input terminal of the first analog switch chip UF4 is electrically connected to the first selection signal output terminal of the receiver card 11. The second selection signal input terminal of the first analog switch chip UF4 is electrically connected to the second selection signal output terminal of the receiver card 11. The first common terminal of the first analog switch chip UF4 is electrically connected to the SPI data receiving terminal of the receiver card 11. The first group of data terminals of the first analog switch chip UF4 is electrically connected to the fourth output terminal of the output unit. The second common terminal of the first analog switch chip UF4 is electrically connected to the SPI chip select output terminal of the receiver card 11. The second group of data terminals of the first analog switch chip UF4 is electrically connected to the second input terminal of the output unit.

[0060] The selection signal input terminal of the second analog switch chip UF3 is electrically connected to the third selection signal output terminal of the receiver card 11, the first common terminal of the second analog switch chip UF3 is electrically connected to the SPI data transmission terminal of the receiver card 11, and the first data terminal of the second analog switch chip UF3 is electrically connected to the first input terminal of the output unit.

[0061] Specifically, as a preferred embodiment of this example, the analog switch uses a 74HC4052 chip, which is a dual-channel four-to-one analog switch circuit.

[0062] In the first 74HC4052 chip, the first common terminal is connected to the SPI data receiving terminal of the receiver card. The output terminal of the first set of data is connected one-to-one with a set of data of the output unit. The second common terminal is connected to the SPI chip select output terminal of the receiver card. The selection signal input terminal is connected to the selection signal input terminal of the receiver card. According to the selection signal, the corresponding channel is connected. For example, 00 connects the first common terminal with its corresponding first channel, so that the serial port data transmitting terminal of the first controller placed in the reserved area of ​​the control module or the fourth output terminal of the short-circuited reserved module is connected to the SPI data receiving terminal of the receiver card. The second common terminal is connected to its corresponding first channel, and the chip select data input terminal of the first memory placed in the reserved area of ​​the storage module is connected to the chip select data output terminal of the SPI of the receiver card.

[0063] In the second 74HC4052, the first common terminal is connected to the SPI data transmitter of the receiver card. The output terminal of the first set of data is connected one-to-one with a set of data in the output unit. According to the selection signal, the corresponding channel is connected. For example, 00 connects the first common terminal with its corresponding first channel, so that the serial port data receiver of the first controller placed in the reserved area of ​​the control module or the first input terminal of the short-circuited reserved module is connected to the SPI data transmitter of the receiver card.

[0064] In one embodiment, such as Figure 3 As shown, the output unit includes a first output chip UF2 and a second output chip UF1, wherein,

[0065] The first set of input terminals of the first output chip UF2 is electrically connected to the first set of data terminals of the second analog switch chip UF3. The first set of output terminals of the first output chip UF2 is electrically connected to the serial port data receiving terminal of the reserved module 13 and the first input terminal of the short-circuit reserved module 15, respectively. The second set of input terminals of the first output chip UF2 is electrically connected to the SPI clock output terminal of the receiver card 11. The second set of output terminals of the first output chip UF2 is electrically connected to the third input terminal of the short-circuit reserved module 15.

[0066] The first set of input terminals of the second output chip UF1 is electrically connected to the second set of data terminals of the first analog switch chip UF4. The first set of output terminals of the second output chip UF1 is electrically connected to the second input terminal of the short-circuit reserved module 15. The second set of input terminals of the second output chip UF1 is electrically connected to the fourth output terminal of the short-circuit reserved module 15 and the serial port data transmission terminal of the control module reserved module 13, respectively. The second set of output terminals of the second output chip UF1 is electrically connected to the first set of data terminals of the first analog switch chip UF4.

[0067] In a preferred embodiment of this invention, the output chip is the HC245 chip. The main function of the HC245 chip is as an eight-channel bus transceiver to realize asynchronous bidirectional communication between data buses. The HC245 can realize data transmission in two directions through its control port: the DIR pin input determines the direction of data transmission, sending from bus A to bus B, or from bus B to bus A, while the OE pin input serves as an enable terminal, effectively isolating the bus.

[0068] In the first HC245 chip, input data is transmitted from bus A to bus B. The input terminal of the first set of data is connected to the SPI data transmitter of the receiver card, and the output terminal of the first set of data is connected to the serial data receiver of the reserved module of the control module and the first input terminal of the short-circuit reserved module. The data is transmitted to the SPI data receiver of the memory through the short-circuit reserved module. The input terminal of the second set of data of the first HC245 chip is connected to the SPI clock output terminal of the receiver card, and the output terminal of the second set of data is connected to the third input terminal of the short-circuit reserved module. The data is transmitted to the SPI clock input terminal of the memory through the short-circuit reserved module.

[0069] In the second HC245 chip, input data is also transmitted from bus A to bus B. The input terminal of the first set of data is connected to the SPI chip select output terminal of the receiver card, and the output terminal of the first set of data is connected to the second input terminal of the shorting reserved module. The data is transmitted to the SPI chip select input terminal of the memory through the shorting reserved module. The input terminal of the second set of data is connected to the fourth output terminal of the shorting reserved module and the serial data transmission terminal of the control module reserved module, respectively. The output terminal of the second set of data is connected to the first set of data terminals of the first analog switch chip. The data is sent to the SPI data receiving terminal of the receiver card through the first analog switch chip.

[0070] In one embodiment, the control module reservation module 13 includes multiple controller reservation areas U1, and the storage module reservation module includes multiple memory reservation areas U2, wherein...

[0071] The serial data receiving end of each controller reserved area U1 is electrically connected to the first set of outputs of the first output chip UF2. The serial data transmitting end of each controller reserved area U1 is electrically connected to the second set of inputs of the second output chip UF1. The SPI chip select output end of each controller reserved area U1 is electrically connected to the SPI chip select input end of a memory reserved area U2. The SPI clock output end of each controller reserved area U1 is electrically connected to the SPI clock input end of a memory reserved area U2. The SPI data transmitting end of each controller reserved area U1 is electrically connected to the SPI data receiving end of a memory reserved area U2. The SPI data receiving end of each controller reserved area U1 is electrically connected to the SPI data transmitting end of a memory reserved area U2.

[0072] Specifically, taking a controller reserved area and a memory reserved area as an example, such as Figure 4 As shown, when a controller needs to be connected, the controller is inserted into the controller reserved area, and RS232 serial communication between the controller and the receiving card is realized through the channel selection module. When a memory needs to be connected, the memory is inserted into the memory reserved area, the controller acts as the SPI master device, and the memory acts as the SPI slave device. The controller obtains data from the receiving card through serial communication, and then transmits the data to be output to the memory to the memory card through SPI communication.

[0073] In one embodiment, the SPI chip select input of each memory reservation area U2 is electrically connected to the SPI chip select output of a controller reservation area U1 and the second output of the short-circuit reservation module 15, respectively; the SPI clock input of each memory reservation area U2 is electrically connected to the SPI clock output of a controller reservation area U1 and the third output of the short-circuit reservation module 15, respectively; the SPI data receiving end of each memory reservation area U2 is electrically connected to the SPI data transmitting end of a controller reservation area U1 and the first input of the short-circuit reservation module 15, respectively; and the SPI data transmitting end of each memory reservation area U2 is electrically connected to the SPI data receiving end of a controller reservation area U1 and the fourth input of the short-circuit reservation module, respectively.

[0074] Specifically, taking a controller reserved area and a memory reserved area as an example, such as Figure 4 As shown, the SPI signal terminal of the storage reserved area is connected to the SPI signal terminal of the controller reserved area. When the controller is inserted in the controller reserved area and the memory is inserted in the memory reserved area, the controller acts as the SPI master device and the memory acts as the SPI slave device. The controller obtains data from the receiving card through serial communication and then transmits the data to be output to the memory through SPI communication.

[0075] When the receiving card needs to communicate directly with the memory in the reserved storage area via SPI, the reserved area is shorted by inserting a shorting plug. Direct SPI communication between the memory and the receiving card is achieved by shorting the reserved area and the channel selection module.

[0076] In one embodiment, the short-circuit reservation module 15 includes multiple sets of short-circuit units, each set of short-circuit units including a first short-circuit reservation area RD1, a second short-circuit reservation area RD2, a third short-circuit reservation area RD3, and a fourth short-circuit reservation area RD4, wherein...

[0077] The first end of each first short-circuit reserved area RD1 is electrically connected to the first set of outputs of the first output chip UF2. The second end of each first short-circuit reserved area RD1 is electrically connected to the SPI data receiving end of a memory reserved area U2. The first end of each second short-circuit reserved area RD2 is electrically connected to the first set of outputs of the second output chip UF1. The second end of each second short-circuit reserved area RD2 is electrically connected to the SPI chip select input end of a memory reserved area U2. The first end of each third short-circuit reserved area RD3 is electrically connected to the second set of outputs of the first output chip UF2. The second end of each third short-circuit reserved area RD3 is electrically connected to the SPI clock input end of a memory reserved area U2. The first end of each fourth short-circuit reserved area RD4 is electrically connected to the second set of inputs of the second output chip UF1. The second end of each fourth short-circuit reserved area RD4 is electrically connected to the SPI data transmitting end of a memory reserved area U2.

[0078] Specifically, taking a shorting unit as an example, such as Figure 4 As shown, when the receiving card needs to communicate with the memory in the reserved storage area via SPI, a shorting plug is inserted into the first shorting reserved area, and the first set of output terminals of the first output chip is connected to the SPI data receiving terminal of a reserved memory. A shorting plug is inserted into the second shorting reserved area, and the first set of output terminals of the second output chip is electrically connected to the SPI chip select input terminal of a reserved memory. A shorting plug is inserted into the third shorting reserved area, and the second set of output terminals of the first output chip is electrically connected to the SPI clock input terminal of a reserved memory. A shorting plug is inserted into the fourth shorting reserved area, and the second set of input terminals of the second output chip is connected to the SPI data transmitting terminal of a reserved memory. Therefore, when a shorting plug is inserted into the shorting reserved area, the receiving card directly communicates with the memory in the reserved storage area via SPI. When SPI communication between the receiving card and the memory in the reserved storage area is not required, no shorting plug is inserted into the shorting reserved area.

[0079] In one embodiment, the first shorting reserved area RD1, the second shorting reserved area RD2, the third shorting reserved area RD3, and the fourth shorting reserved area RD4 are connected to zero-ohm resistors or shorting plugs.

[0080] Specifically, a zero-ohm resistor can be set in the shorting reserved area and connected by soldering, pasting, or plugging in a shorting plug. When the receiving card needs to communicate directly with the memory set in the storage reserved area via SPI, the zero-ohm resistor or shorting plug is inserted into the shorting reserved area. When the receiving card does not need to communicate directly with the memory set in the storage reserved area, the zero-ohm resistor or shorting plug is not inserted into the shorting reserved area.

[0081] Existing LED display control circuits use two channel selection modules: one for serial communication between the receiver card and the controller, and the other for SPI communication between the receiver card and the memory. Figure 5 As shown, each channel selection module includes several 74HC4052 chips and several HC245 chips, using a relatively large number of components. However, the LED display control circuit provided in this application uses a single channel selection module (including a smaller number of 74HC4052 chips and HC245 chips) to achieve serial communication between the receiver card and the controller, and SPI communication between the receiver card and the memory. Figure 6 As shown, fewer components are used, which greatly reduces production costs.

[0082] In addition, this application also provides an LED display device, including an LED display screen, a receiver card, and a control circuit for the LED display screen as described above.

[0083] Compared with the prior art, the LED display device provided in this application has a control module reserved module for placing multiple controllers, a storage module reserved module for placing multiple memories, a shorting reserved module for placing multiple shorting devices, and a channel selection module for connecting the required channels. Corresponding controllers, memory cards, or shorting devices are placed as needed, enabling the receiving card to communicate with the corresponding controller or memory. Through a channel selection module, the controller and the receiving card can communicate via serial port, and the memory and the receiving card can communicate via SPI, achieving compatibility between the receiving card's SPI and serial communication, reducing the number of components and lowering production costs.

[0084] It should be understood that various modifications can be made to the embodiments described herein. Therefore, the above description should not be considered as limiting, but merely as an example of embodiments. Other modifications within the scope and spirit of this application will be apparent to those skilled in the art.

[0085] The accompanying drawings, which are included in and form part of this specification, illustrate embodiments of the present application and, together with the general description of the present application given above and the detailed description of the embodiments given below, serve to explain the principles of the present application.

[0086] These and other features of this application will become apparent from the following description of preferred forms of embodiments given as non-limiting examples, with reference to the accompanying drawings.

[0087] It should also be understood that although this application has been described with reference to some specific examples, those skilled in the art can certainly implement many other equivalent forms of this application.

[0088] The above and other aspects, features and advantages of this application will become more apparent when taken in conjunction with the accompanying drawings and in view of the following detailed description.

[0089] Specific embodiments of this application are described thereafter with reference to the accompanying drawings; however, it should be understood that the claimed embodiments are merely examples of this application, which can be implemented in various ways. Well-known and / or repeated functions and structures are not described in detail to avoid unnecessary or redundant details that could obscure the application. Therefore, the specific structural and functional details claimed herein are not intended to be limiting, but merely serve as the basis and representative basis for the claims to teach those skilled in the art to use this application in a variety of substantially any suitable detailed structures.

[0090] This specification may use the phrases “in one embodiment,” “in another embodiment,” “in yet another embodiment,” or “in other embodiments,” all of which may refer to one or more of the same or different embodiments according to this application.

[0091] The above embodiments are merely exemplary embodiments of this application and are not intended to limit this application. The scope of protection of this application is defined by the claims. Those skilled in the art can make various modifications or equivalent substitutions to this application within its substance and scope of protection, and such modifications or equivalent substitutions should also be considered to fall within the scope of protection of this application.

Claims

1. A control circuit for an LED display screen, the control circuit comprising a receiver card, characterized in that, This includes a channel selection module, a control module reserved module, a storage module reserved module, and a short-circuit reserved module. The selection signal input terminal of the channel selection module is electrically connected to the selection signal output terminal of the receiving card. The first input terminal of the channel selection module is electrically connected to the SPI data transmission terminal of the receiving card. The first output terminal of the channel selection module is electrically connected to the serial port data receiving terminal of the control module reserved module and the first input terminal of the short-circuit reserved module, respectively. The first output terminal of the short-circuit reserved module is electrically connected to the SPI data receiving terminal of the storage module reserved module. The SPI data receiving terminal of the storage module reserved module is also electrically connected to the SPI data transmission terminal of the control module reserved module. The second input terminal of the channel selection module is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the channel selection module is electrically connected to the second input terminal of the short-circuit reserved module, the second output terminal of the short-circuit reserved module is electrically connected to the SPI chip select input terminal of the storage module reserved module, and the SPI chip select input terminal of the storage module reserved module is also electrically connected to the SPI chip select output terminal of the control module reserved module. The third input terminal of the channel selection module is electrically connected to the SPI clock output terminal of the receiving card, the third output terminal of the channel selection module is electrically connected to the third input terminal of the shorting reserved module, the third output terminal of the shorting reserved module is electrically connected to the SPI clock input terminal of the storage module reserved module, and the SPI clock input terminal of the storage module reserved module is also electrically connected to the SPI clock output terminal of the control module reserved module. The fourth input terminal of the short-circuit reserved module is electrically connected to the SPI data transmitting terminal of the storage module reserved module. The fourth output terminal of the short-circuit reserved module is electrically connected to the fourth input terminal of the channel selection module. The fourth input terminal of the channel selection module is also electrically connected to the SPI data transmitting terminal of the control module reserved module. The fourth output terminal of the channel selection module is electrically connected to the SPI data receiving terminal of the receiver card. The SPI data transmitting terminal of the storage module reserved module is also electrically connected to the SPI data receiving terminal of the control module reserved module.

2. The control circuit for the LED display screen according to claim 1, characterized in that, When the controller is inserted into the reserved module of the control module, but the memory is not inserted into the reserved module of the storage module, and the shorting reserved module is not shorted, the controller communicates with the receiving card via RS232 serial communication through the channel selection module. When the memory is inserted into the reserved module of the storage module, the shorting reserved module is shorted, and the controller is not inserted into the reserved module of the control module, the memory communicates with the receiving card via SPI communication through the channel selection module. When the controller is inserted into the reserved module of the control module, the memory is inserted into the reserved module of the storage module, and the shorting reserved module is not shorted, the controller communicates with the receiving card via RS232 serial communication through the channel selection module, and the controller communicates with the memory via SPI communication.

3. The control circuit for the LED display screen according to claim 1, characterized in that, The channel selection module includes a selection unit and an output unit, wherein... The selection signal input terminal of the selection unit is electrically connected to the selection signal output terminal of the receiving card, the first data input terminal of the selection unit is electrically connected to the SPI data transmission terminal of the receiving card, the first output terminal of the selection unit is electrically connected to the first input terminal of the output unit, and the first output terminal of the output unit is electrically connected to the serial port data receiving terminal of the reserved module of the control module and the first input terminal of the short-circuit reserved module, respectively. The second data input terminal of the selection unit is electrically connected to the SPI chip select output terminal of the receiving card, the second output terminal of the selection unit is electrically connected to the second input terminal of the output unit, and the second output terminal of the output unit is electrically connected to the second input terminal of the short-circuit reserved module. The third input terminal of the output unit is electrically connected to the SPI clock output terminal of the receiving card, and the third output terminal of the output unit is electrically connected to the third input terminal of the short-circuit reserved module. The fourth input terminal of the output unit is electrically connected to the fourth output terminal of the short-circuit reserved module and the serial port data transmission terminal of the control module reserved module, respectively. The fourth output terminal of the output unit is electrically connected to the third data input terminal of the selection unit, and the third output terminal of the selection unit is electrically connected to the SPI data receiving terminal of the receiving card.

4. The control circuit for the LED display screen according to claim 3, characterized in that, The selection unit includes a first analog switch chip and a second analog switch chip, wherein... The first selection signal input terminal of the first analog switch chip is electrically connected to the first selection signal output terminal of the receiver card; the second selection signal input terminal of the first analog switch chip is electrically connected to the second selection signal output terminal of the receiver card; the first common terminal of the first analog switch chip is electrically connected to the SPI data receiving terminal of the receiver card; the first group of data terminals of the first analog switch chip is electrically connected to the fourth output terminal of the output unit; the second common terminal of the first analog switch chip is electrically connected to the SPI chip select output terminal of the receiver card; and the second group of data terminals of the first analog switch chip is electrically connected to the second input terminal of the output unit. The selection signal input terminal of the second analog switch chip is electrically connected to the third selection signal output terminal of the receiver card, the first common terminal of the second analog switch chip is electrically connected to the SPI data transmission terminal of the receiver card, and the first data terminal of the second analog switch chip is electrically connected to the first input terminal of the output unit.

5. The control circuit for the LED display screen according to claim 4, characterized in that, The output unit includes a first output chip and a second output chip, wherein... The first set of input terminals of the first output chip is electrically connected to the first set of data terminals of the second analog switch chip. The first set of output terminals of the first output chip is electrically connected to the serial port data receiving terminal of the reserved module of the control module and the first input terminal of the short-circuit reserved module, respectively. The second set of input terminals of the first output chip is electrically connected to the SPI clock output terminal of the receiving card. The second set of output terminals of the first output chip is electrically connected to the third input terminal of the short-circuit reserved module. The first set of input terminals of the second output chip is electrically connected to the second set of data terminals of the first analog switch chip, and the first set of output terminals of the second output chip is electrically connected to the second input terminal of the short-circuit reserved module; the second set of input terminals of the second output chip is electrically connected to the fourth output terminal of the short-circuit reserved module and the serial port data transmission terminal of the control module reserved module, respectively, and the second set of output terminals of the second output chip is electrically connected to the first set of data terminals of the first analog switch chip.

6. The control circuit for the LED display screen according to claim 5, characterized in that, The control module reserved module includes multiple controller reserved areas, and the storage module reserved module includes multiple memory reserved areas, wherein, Each controller reserved area's serial port data receiving terminal is electrically connected to the first set of output terminals of the first output chip; each controller reserved area's serial port data transmitting terminal is electrically connected to the second set of input terminals of the second output chip; each controller reserved area's SPI chip select output terminal is electrically connected to the SPI chip select input terminal of a memory reserved area; each controller reserved area's SPI clock output terminal is electrically connected to the SPI clock input terminal of a memory reserved area; each controller reserved area's SPI data transmitting terminal is electrically connected to the SPI data receiving terminal of a memory reserved area; and each controller reserved area's SPI data receiving terminal is electrically connected to the SPI data transmitting terminal of a memory reserved area.

7. The control circuit for the LED display screen according to claim 6, characterized in that, The SPI chip select input of each memory reserved area is electrically connected to the SPI chip select output of a controller reserved area and the second output of the short-circuit reserved module, respectively. The SPI clock input of each memory reserved area is electrically connected to the SPI clock output of a controller reserved area and the third output of the short-circuit reserved module, respectively. The SPI data receiver of each memory reserved area is electrically connected to the SPI data transmitter of a controller reserved area and the first input of the short-circuit reserved module, respectively. The SPI data transmitter of each memory reserved area is electrically connected to the SPI data receiver of a controller reserved area and the fourth input of the short-circuit reserved module, respectively.

8. The control circuit for the LED display screen according to claim 6, characterized in that, The short-circuit reservation module includes multiple sets of short-circuit units. Each set of short-circuit units includes a first short-circuit reservation area, a second short-circuit reservation area, a third short-circuit reservation area, and a fourth short-circuit reservation area. The first end of each first shorting reserved area is electrically connected to the first set of outputs of the first output chip, and the second end of each first shorting reserved area is electrically connected to the SPI data receiving end of a memory reserved area. The first end of each second shorting reserved area is electrically connected to the first set of outputs of the second output chip, and the second end of each second shorting reserved area is electrically connected to the SPI chip select input end of a memory reserved area. The first end of each third shorting reserved area is electrically connected to the second set of outputs of the first output chip, and the second end of each third shorting reserved area is electrically connected to the SPI clock input end of a memory reserved area. The first end of each fourth shorting reserved area is electrically connected to the second set of inputs of the second output chip, and the second end of each fourth shorting reserved area is electrically connected to the SPI data transmitting end of a memory reserved area.

9. The control circuit for the LED display screen according to claim 8, characterized in that, Zero-ohm resistors or shorting plugs are inserted into the first shorting reserved area, the second shorting reserved area, the third shorting reserved area and the fourth shorting reserved area.

10. An LED display device, characterized in that, The LED display device includes an LED display screen, a receiving card, and a control circuit for the LED display screen as described in any one of claims 1-9.

Images