Display device

Abstract

There is provided a display device including: a substrate including a display area and a peripheral area disposed adjacent to the display area; pixels arranged in the display area of the substrate; and a signal transmission line configured to transmit a signal to the pixel, in which the signal transmission line includes: a first line including a first contact portion and a first extension portion extending in a first direction from the first contact portion; and a second line including a second contact portion overlapping the first contact portion and a second extension portion extending from the second contact portion in a direction opposite to the first direction, and wherein the first line and the second line are electrically connected to each other through a contact hole in a region where the first contact portion and the second contact portion overlap each other.

Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2023-0149356, filed on November 1, 2023, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure generally relates to display devices. More specifically, this disclosure relates to display devices with a structure having contact portions for signal transmission lines. Background Technology

[0004] There are several ways to construct and use display devices that can provide visual information to users. Liquid crystal displays use liquid crystal layers to emit light, while inorganic light-emitting displays use inorganic light-emitting diodes (LEDs) and organic light-emitting displays use organic light-emitting diodes (OLEDs) to emit light.

[0005] The peripheral region that does not emit light for image rendering is located outside the display area where the light-emitting diodes are arranged to provide the image. Signal transmission lines for transmitting signals to the pixels arranged in the display area can be arranged in the peripheral region. Utility Model Content

[0006] One or more embodiments include a display device and may provide a structure for the contact portion of a signal transmission line.

[0007] Other aspects will be set forth in part in the description which follows and will be apparent in part from the description, or may be learned by practicing the embodiments proposed in this disclosure.

[0008] According to one or more embodiments, a display device includes: a substrate having a display area and a peripheral area disposed adjacent to the display area; a plurality of pixels disposed in the display area of ​​the substrate; and a plurality of signal transmission lines configured to transmit signals to the plurality of pixels, wherein each of the plurality of signal transmission lines includes: a first line having a first contact portion and a first extension portion, wherein the first extension portion extends from the first contact portion in a first direction; and a second line having a second contact portion and a second extension portion, wherein the second contact portion of the second line overlaps with the first contact portion of the first line, and the second extension portion extends from the second contact portion in a direction opposite to the first direction, and wherein the first line and the second line are electrically connected to each other through a first contact hole located in a region in which the first contact portion and the second contact portion overlap each other, and the first extension portion of the first line includes a first recessed portion.

[0009] The first recessed portion of the first line may include a first recessed portion that may not overlap with the second line.

[0010] The first contact hole may include a plurality of sub-contact holes arranged in a matrix in the first direction and the second direction perpendicular to the first direction in the plan view.

[0011] The first recessed portion may include multiple sub-recessed portions arranged in a matrix in the first and second directions in the plan view.

[0012] In the plan view, the first recessed portion and the first contact hole can have the same shape as each other.

[0013] The first recessed portion may be a single through-hole that penetrates a portion of the first line in the thickness direction.

[0014] The first contact hole includes a plurality of contact holes in the region where the first contact portion of the first line and the second contact portion of the second line overlap each other.

[0015] The first recessed portion may include a plurality of recessed portions arranged in the first direction.

[0016] The first recessed portion can be a welded portion formed by laser welding process.

[0017] The first recessed portion can penetrate a portion of the first line in the thickness direction.

[0018] The upper surface of the first contact portion of the first line can have a concave shape in the cross-sectional view.

[0019] The multiple signal transmission lines may include a first signal transmission line and a second signal transmission line spaced apart from the first signal transmission line in a second direction perpendicular to the first direction, and the display device may further include a sacrificial line, which is located between the first signal transmission line and the second signal transmission line, electrically insulated from the multiple pixels, and configured to receive a third voltage different from the first voltage applied to the first signal transmission line and the second voltage applied to the second signal transmission line.

[0020] The third voltage can have the same polarity as the second voltage, and the absolute value of the third voltage can be greater than the absolute value of the second voltage.

[0021] The multiple signal transmission lines may include a first signal transmission line and a second signal transmission line, and the multiple signal transmission lines are spaced apart from each other in a second direction perpendicular to the first direction. The second contact hole is located in the region where the first line of the second signal transmission line and the second line of the second signal transmission line overlap each other. The second contact hole is arranged in a third direction from the first contact hole located in the region where the first line of the first signal transmission line and the second line of the first signal transmission line overlap each other, and the third direction is between the first direction and the second direction.

[0022] According to one or more embodiments, a display device includes: a substrate including a display area and a peripheral area disposed adjacent to the display area; a plurality of pixels disposed in the display area of ​​the substrate; a plurality of signal transmission lines configured to transmit signals to the plurality of pixels, wherein each of the plurality of signal transmission lines includes a first signal transmission line and a second signal transmission line spaced apart from the first signal transmission line; and a sacrificial line electrically insulated from each of the plurality of pixels, wherein the sacrificial line is located between the first signal transmission line and the second signal line, wherein a first voltage is applied to the first signal transmission line and a second voltage is applied to the second signal line, and a third voltage different from the first voltage and the second voltage is applied to the sacrificial line.

[0023] The first voltage has a polarity different from that of the second voltage, and the third voltage has the same polarity as the second voltage, and the absolute value of the third voltage is greater than the absolute value of the second voltage.

[0024] Each of the multiple signal transmission lines may include: a first line having a first contact portion and a first extension portion extending from the first contact portion in a first direction; and a second line having a second contact portion and a second extension portion, wherein the second contact portion of the second line overlaps with the first contact portion and the second extension portion extends from the second contact portion in a direction opposite to the first direction, and the first line and the second line are electrically connected to each other through a contact hole located in a region in which the first contact portion of the first line and the second contact portion of the second line overlap each other.

[0025] The contact hole may include a plurality of contact holes located in the region where the first contact portion and the second contact portion overlap each other.

[0026] Each of the multiple contact holes may include multiple sub-contact holes arranged in a matrix in a first direction and a second direction perpendicular to the first direction in a plan view.

[0027] According to one or more embodiments, a display device includes: a substrate including a display area and a peripheral area disposed adjacent to the display area; a plurality of pixels disposed in the display area of ​​the substrate; and a plurality of signal transmission lines configured to transmit signals to the plurality of pixels, wherein each of the plurality of signal transmission lines includes a first signal transmission line and a second signal transmission line spaced apart from the first signal transmission line in a first direction, wherein the first signal transmission line includes a first line and a second line and extends in a second direction perpendicular to the first direction, the second signal transmission line includes a first line and a second line and extends in the second direction, a first contact hole defined in the first signal transmission line is located in a region where the first line and the second line of the first signal transmission line overlap each other, and a second contact hole defined in the second signal line is located in a region where the first line and the second line of the second signal transmission line overlap each other, the second contact hole being disposed in a third direction from the first contact hole, and the third direction being between the first direction and the second direction. Attached Figure Description

[0028] The above and other aspects, features, and advantages of specific embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0029] Figure 1 This is a schematic plan view of a display device according to an embodiment;

[0030] Figure 2 It is a schematic diagram along Figure 1 A cross-sectional view of the section intercepted by line I-I' in the diagram;

[0031] Figure 3 The illustration is based on an embodiment. Figure 1 An enlarged view of area A in the image;

[0032] Figure 4 It is a schematic diagram along Figure 3 A cross-sectional view of the section intercepted by line II-II' in the diagram;

[0033] Figure 5 It is a diagram. Figure 4 A magnified view of area B in the image;

[0034] Figure 6 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image;

[0035] Figure 7 It is a schematic diagram along Figure 6 A cross-sectional view of the section intercepted by line III-III' in the diagram;

[0036] Figure 8 It is a diagram. Figure 7A magnified view of area C in the image;

[0037] Figure 9 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image;

[0038] Figure 10 It is a schematic diagram along Figure 9 A cross-sectional view of the section intercepted by line IV-IV' in the diagram;

[0039] Figure 11 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image; and

[0040] Figure 12 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image. Detailed Implementation

[0041] Reference will now be made in detail to embodiments illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this respect, the proposed embodiments may take different forms and should not be construed as limited to the description set forth herein. Accordingly, embodiments are described below only by reference to the accompanying drawings to illustrate aspects of the proposed description. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout this disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0042] Because this disclosure allows for various modifications and numerous embodiments, specific embodiments will be illustrated in the accompanying drawings and described in detail in the written description. Hereinafter, the effects and features of this disclosure, as well as methods for implementing them, will be described more fully with reference to the accompanying drawings, in which one or more embodiments are illustrated. However, this disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein.

[0043] One or more embodiments will now be described in more detail with reference to the accompanying drawings. Identical or corresponding parts are given the same reference numerals regardless of the reference numerals, and redundant descriptions thereof are omitted.

[0044] In the embodiments described below, terms such as “first” and “second” are used only herein to describe various elements, but the elements are not limited by the terms. Such terms are used only for the purpose of distinguishing one element from another.

[0045] In the following embodiments, unless the meaning is clearly different in the context, expressions used in the singular include expressions used in the plural.

[0046] In the following embodiments, terms such as “comprising” or “including” may be interpreted as indicating a particular feature or element or combination thereof, but may not be interpreted as excluding the presence or possibility of the addition of one or more other features, elements or combinations thereof.

[0047] It will be understood that when a layer, area, or element is referred to as being “formed” on another layer, area, or element, it can be formed directly or indirectly on that other layer, area, or element. That is, for example, an intermediary layer, area, or element may exist.

[0048] For ease of illustration, the dimensions of the elements in the accompanying drawings may be exaggerated or reduced. In other words, since the dimensions and thicknesses of the elements in the accompanying drawings are arbitrarily illustrated for ease of illustration, the following embodiments are not limited thereto.

[0049] When a particular embodiment can be implemented differently, the specific process sequence can be performed differently than the order in which it is described. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of their description.

[0050] In this disclosure, "A and / or B" may include "A", "B" or "A and B". Additionally, "at least one of A and B" may include "A", "B" or "A and B".

[0051] It will be understood that when a layer, area, or element is referred to as being "connected" to another layer, area, or element, it can be "directly connected" to that other layer, area, or element and / or can be "indirectly connected" to that other layer, area, or element, with other layers, areas, or elements in between. For example, it will be understood that when a layer, area, or element is referred to as being "electrically connected" to another layer, area, or element, it can be "directly electrically connected" to that other layer, area, or element and / or can be "indirectly electrically connected" to that other layer, area, or element, with other layers, areas, or elements in between.

[0052] Figure 1 This is a schematic plan view of the display device 1 according to an embodiment.

[0053] Reference Figure 1The display device 1 can be used not only as a display screen for portable electronic devices such as mobile communication terminals (e.g., mobile phones, smartphones, or tablet PCs), e-notebooks, e-readers, portable multimedia players (PMPs), navigators, or ultra-mobile PCs (UMPCs), but also as a display screen for various products such as televisions, laptops, monitors, billboards, or the Internet of Things (IoT). Additionally, the display device 1 according to the embodiment can be used for wearable devices such as smartwatches, watch phones, glasses displays, or head-mounted displays (HMDs). Furthermore, the display device 1 according to the embodiment can be used as a vehicle's instrument panel, a central information display (CID) arranged on the vehicle's center dashboard or instrument cluster, an interior mirror display replacing the vehicle's side mirrors, or a display screen arranged on the rear surface of the front seats as an entertainment screen for the rear seats of the vehicle. For ease of description, the case of the display device 1 being used in a smartphone is described below.

[0054] When viewed in a direction perpendicular to one surface of the display device 1, the display device 1 can have an approximately rectangular shape. For example, as Figure 1 As depicted, the display device 1 may have an overall rectangular planar shape, which has a long side extending in a first direction DR1 and a short side extending in a second direction DR2. Figure 1 As depicted, the corner where the long side on the first direction DR1 and the short side on the second direction DR2 intersect each other has a right-angle shape or a circular shape with a specific curvature. However, the planar shape of the display device 1 is not limited to a rectangle, and can include various shapes such as triangles, circles, ellipses and any polygonal shapes.

[0055] The display device 1 may include a display area DA and a peripheral area PA disposed outside the display area DA.

[0056] Display device 1 can provide an image via an array of multiple pixels PX arranged in rows and columns in a two-dimensional manner within a display area DA. Each pixel PX may include pixel circuitry and a light-emitting element driven by the pixel circuitry. The image can be provided by light emitted by the light-emitting element of the pixel PX. Because the area providing the image is defined by the arrangement of the multiple light-emitting elements, the display area DA can be defined by the multiple light-emitting elements. In the display area DA, not only light-emitting elements and pixel circuitry can be arranged, but also various signal lines and power lines electrically connected to the pixel circuitry can be arranged. For example, Figure 1 The scan line SL and data line DL, which are electrically connected to the transistor included in pixel PX, are shown as signal lines.

[0057] The peripheral area PA may not provide an image and may completely or partially surround the display area DA. Various lines and drive circuits can be arranged in the peripheral area PA to provide electrical signals or power to the display area DA.

[0058] The peripheral region PA may include a first peripheral region PA1 disposed outside the display region DA, a second peripheral region PA2 disposed to one side of the first peripheral region PA1, and a bent region BA located between the first peripheral region PA1 and the second peripheral region PA2 along a first direction DR1. A portion of the peripheral region PA may extend in a direction away from the display region DA. In other words, the display device 1 may include a first region and a second region, the first region including the display region DA and the first peripheral region PA1 surrounding the display region DA, and the second region extending from the first region in one direction. The second region may include the bent region BA and the second peripheral region PA2.

[0059] A portion of the display device 1 can be bent. The display device 1 can be bent at a specific curvature in the bending region BA. For example, when the display device 1 is bent in the bending region BA, the first region, including the display region DA and the first peripheral region PA1, can face a surface of the second peripheral region PA2.

[0060] The first peripheral region PA1 can form the front surface of the display device 1 together with the display region DA. The front surface of the display device 1 can be the surface on which an image is displayed.

[0061] The second peripheral region PA2 may include a pad region PADA1 in which multiple pads are arranged. Within the pad region PADA1, a display driving unit configured to receive control signals and power voltages and generate and output signals and voltages for driving the display device 1 may be arranged. The display driving unit may include an integrated circuit (IC).

[0062] The display device 1 may include a substrate 10, and various components included in the display device 1 may be disposed on the substrate 10. For example, a plurality of light-emitting elements defining a display area DA, pixel circuits that drive the light-emitting elements respectively, and signal lines and / or voltage lines configured to provide electrical signals and / or voltages to the respective pixel circuits and driving circuits may be disposed on the substrate 10.

[0063] Figure 2 It is a schematic diagram along Figure 1 A cross-sectional view of the section intercepted by line I-I' in the diagram. Figure 2 A portion of the cross-section of the display device 1 arranged in the display area DA is shown.

[0064] Reference Figure 2The display device 1 may include a substrate 10, a light-emitting element (LED) disposed on the substrate 10, and an encapsulation component 30 disposed on the light-emitting element (LED).

[0065] The substrate 10 may comprise glass or a polymer resin. The polymer resin may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, etc. The substrate 10 comprising the polymer resin may be flexible, rollable, or bendable. The substrate 10 may have a multilayer structure comprising a layer having the aforementioned polymer resin and an inorganic layer (not shown herein). The substrate 10 may have a display area DA and a peripheral area PA arranged adjacent to the display area DA.

[0066] A buffer layer 11 may be located on the substrate 10 to reduce or block the penetration of foreign matter, moisture, or ambient air from the lower part of the substrate 10, and may provide a flat surface to the semiconductor layer Act. The buffer layer 11 may comprise inorganic materials, organic materials, or organic / inorganic composites such as oxides or nitrides, and may have a single-layer or multi-layer structure of inorganic and / or organic materials. A barrier layer for blocking ambient air penetration may be further included between the substrate 10 and the buffer layer 11.

[0067] A pixel circuit PC, including a thin-film transistor (TFT) and a storage capacitor Cst, can be disposed on the buffer layer 11. The thin-film transistor (TFT) may include a drain electrode DE, a source electrode SE, a semiconductor layer Act between the source electrode SE and the drain electrode DE, and a gate electrode GE that overlaps with the semiconductor layer Act along the thickness direction (i.e., the fourth direction DR4).

[0068] The semiconductor layer Act can be disposed on the buffer layer 11 and can include polycrystalline silicon. In one example, the semiconductor layer Act can include amorphous silicon. In another example, the semiconductor layer Act can include an oxide of at least one material selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer Act includes a channel region corresponding to the semiconductor layer Act and a source region doped with impurities, corresponding to the source electrode SE and a drain region corresponding to the drain electrode DE. The source region can be disposed on the opposite side of the drain region relative to the channel region.

[0069] The first gate insulating layer 12 may be disposed on the buffer layer 11 and the semiconductor layer Act, and overlaps with the semiconductor layer Act in the thickness direction. The first gate insulating layer 12 may include materials such as silicon oxide (SiO2) and silicon nitride (SiN). x ), silicon oxynitride (SiO)x N y The first gate insulating layer 12 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, such as aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2).

[0070] The gate electrode GE can be disposed on the first gate insulating layer 12 to overlap with the semiconductor layer Act in the thickness direction. The gate electrode GE may include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a single layer or multiple layers. For example, the gate electrode GE may be a single Mo layer.

[0071] The second gate insulating layer 13 may be disposed on the first gate insulating layer 12 and the gate electrode GE, and overlaps with the gate electrode GE in the thickness direction. The second gate insulating layer 13 may include materials such as SiO2 and SiN. x SiO x N y Inorganic insulating materials such as Al2O3, TiO2, Ta2O5, HfO2, or ZnO2. The second gate insulating layer 13 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials.

[0072] The second capacitor electrode CE2 of the storage capacitor Cst can be disposed on the second gate insulating layer 13. The second capacitor electrode CE2 can overlap with the gate electrode GE in the thickness direction. The gate electrode GE and the second capacitor electrode CE2 can form the storage capacitor Cst by overlapping each other with respect to the second gate insulating layer 13 disposed therebetween. In this case, the gate electrode GE can function as the first capacitor electrode CE1 of the storage capacitor Cst.

[0073] The second capacitor electrode CE2 may include Al, platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), Cr, calcium (Ca), Mo, Ti, tungsten (W) and / or Cu, and has a single layer or multiple layers of the above materials.

[0074] The interlayer insulating layer 14 can be disposed on the second gate insulating layer 13 and the second capacitor electrode CE2, and overlaps with the second capacitor electrode CE2 in the thickness direction. The interlayer insulating layer 14 may include SiO2, SiN, etc. x SiO x N y Al2O3, TiO2, Ta2O5, HfO2, or ZnO2. The interlayer insulation layer 14 can be a single layer or multiple layers of the above-mentioned inorganic insulating materials.

[0075] The source electrode SE and drain electrode DE can be disposed on the interlayer insulating layer 14 and penetrate through the first gate insulating layer 12, the second gate insulating layer 13, and the interlayer insulating layer 14 to directly contact the source and drain regions of the semiconductor layer Act. Each of the source electrode SE and drain electrode DE can include a conductive material comprising Mo, Al, Cu, Ti, etc., and can be formed from a single layer or multiple layers comprising the aforementioned materials. For example, the source electrode SE and drain electrode DE can have a Ti / Al / Ti multilayer structure. In another example, the source electrode SE or drain electrode DE can be omitted. For example, adjacent thin-film transistors (TFTs) can share the source or drain region of the semiconductor layer Act, and the source or drain region can function as the source electrode SE or drain electrode DE.

[0076] A first planarization insulating layer 15 may be disposed on the interlayer insulating layer 14 to cover the source electrode SE and the drain electrode DE. A connection electrode CE may be disposed on the first planarization insulating layer 15. The connection electrode CE may be directly connected to the drain electrode DE that penetrates through the first planarization insulating layer 15. However, in another example, the connection electrode CE may be directly connected to the source electrode SE. A second planarization insulating layer 17 may be disposed on the first planarization insulating layer 15 to cover the connection electrode CE. The second planarization insulating layer 17 may provide a flat surface to the pixel electrode 21 disposed thereon. The pixel electrode 21 may be connected to the connection electrode CE by penetrating the second planarization insulating layer 17. Therefore, the pixel electrode 21 and the thin-film transistor TFT may be electrically connected to each other through the connection electrode CE. In this document, the planarization insulating layer may include two layers. However, in another example, various modifications may be made to the number of planarization insulating layers. Therefore, the number of planarization insulating layers may be more or less than two layers.

[0077] The first planarization insulating layer 15 and the second planarization insulating layer 17 may comprise organic or inorganic materials and may have a single-layer or multi-layer structure. The first planarization insulating layer 15 and the second planarization insulating layer 17 may comprise general polymers such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS), polymer derivatives having phenolic groups, acryloyl polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, etc. The first planarization insulating layer 15 and the second planarization insulating layer 17 may comprise materials such as SiO2 and SiN. x SiO x N yInorganic insulating materials such as Al2O3, TiO2, Ta2O5, HfO2, or ZnO2. When forming the first planarization insulating layer 15 and the second planarization insulating layer 17, chemical mechanical polishing can be performed on the upper surface of that layer after the layer is formed to provide a flat upper surface.

[0078] The light-emitting element (LED) can be disposed on the second planarized insulating layer 17. The light-emitting element (LED) can include a pixel electrode 21, an intermediate layer 22 disposed on the pixel electrode 21, and a counter electrode 23 disposed on the intermediate layer 22 in the thickness direction.

[0079] Pixel electrode 21 may be disposed on the second planarization insulating layer 17. Pixel electrode 21 may include conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or zinc aluminum oxide (AZO). Pixel electrode 21 may include a reflective film comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or compounds thereof. For example, pixel electrode 21 may have a structure having a film formed of ITO, IZO, ZnO, or In2O3 above / below the aforementioned reflective film. In this case, pixel electrode 21 may have an ITO / Ag / ITO stacked structure.

[0080] A pixel defining layer 19 may be disposed on the second planarization insulating layer 17 to cover the edge of the pixel electrode 21, and a pixel opening 19OP exposing the central portion of the pixel electrode 21 is defined in the pixel defining layer 19. The size and shape of the emitting region EA of the light-emitting element LED (i.e., pixel) when viewed from a plane may be defined by the pixel opening 19OP.

[0081] The pixel limiting layer 19 can increase the distance between the edge of the pixel electrode 21 and the counter electrode 23 disposed on the pixel limiting layer 19, thereby preventing electric arcs and the like from occurring at the edge of the pixel electrode 21.

[0082] The pixel-defining layer 19 may include organic insulating materials such as polyimide, polyamide, acrylic resin, BCB, HMDSO and phenolic resin, and may be formed by spin coating process.

[0083] In an embodiment, the pixel defining layer 19 may further include a light-blocking material (not shown herein). The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles such as Ni, Al, Mo, and their alloys, metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). When the pixel defining layer 19 includes a light-blocking material, external reflections caused by the metal structure disposed beneath the pixel defining layer 19 can be reduced.

[0084] The intermediate layer 22 may be located between the pixel electrode 21 and the counter electrode 23. The intermediate layer 22 may include a first functional layer 22a, an emission layer 22b disposed on the first functional layer 22a, and a second functional layer 22c disposed on the emission layer 22b in the thickness direction.

[0085] An emitting layer 22b, which corresponds to the pixel defining layer 19, can be disposed in the pixel opening 19OP of the pixel defining layer 19. The emitting layer 22b may comprise a polymer material or a low molecular weight material, and emits red, green, blue, or white light.

[0086] The first functional layer 22a may be disposed below the emitting layer 22b, and the second functional layer 22c may be disposed above the emitting layer 22b. In an embodiment, unlike the emitting layer 22b which is patterned and arranged for each pixel, the first functional layer 22a and the second functional layer 22c may be provided integrally across the entire surface of the display area DA. That is, the emitting layer 22b may overlap with the emitting area EA of the light-emitting element LED in the thickness direction.

[0087] The first functional layer 22a can be a single layer or multiple layers. For example, when the first functional layer 22a is formed of a polymer material, it is a single-layer hole transport layer and can be formed of poly(3,4)-ethylene-dihydroxythiophene (PEDOT) or polyaniline (PANI). When the first functional layer 22a is formed of a low molecular weight material, it can include a hole injection layer and a hole transport layer.

[0088] The second functional layer 22c can be optionally arranged. For example, the second functional layer 22c can be formed when the first functional layer 22a and the emitter layer 22b are formed of a polymer material. The second functional layer 22c can be a single layer or multiple layers. The second functional layer 22c may include an electron transport layer and / or an electron injection layer. In another example, at least one of the hole injection layer, hole transport layer, electron transport layer, and electron injection layer may be omitted.

[0089] The counter electrode 23 may comprise a conductive material having a relatively low work function. For example, the counter electrode 23 may comprise a (semi-)transparent layer having Ag, Mg, Al, Ni, Cr, Li, Ca, or alloys thereof. Alternatively, the counter electrode 23 may further comprise a layer comprising ITO, IZO, ZnO, or In2O3 on a (semi-)transparent layer having the aforementioned material. In embodiments, the counter electrode 23 may comprise Ag and Mg.

[0090] In this embodiment, a capping layer (not shown herein) may be disposed on the light-emitting element (LED). Based on the principle of constructive interference, the capping layer can improve the emission efficiency of the LED. The capping layer may be an organic capping layer comprising organic materials, an inorganic capping layer comprising inorganic materials, or a composite capping layer comprising both organic and inorganic materials.

[0091] The encapsulation component 30 can be disposed on the light-emitting element LED. The encapsulation component 30 can encapsulate the light-emitting element LED. In an embodiment, the encapsulation component 30 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the encapsulation component 30 may include a first inorganic encapsulation layer 31, a second inorganic encapsulation layer 33, and an organic encapsulation layer 32 therebetween.

[0092] Each of the first inorganic encapsulation layer 31 and the second inorganic encapsulation layer 33 may include one or more inorganic insulating materials. The inorganic insulating materials may include Al₂O₃, TiO₂, Ta₂O₅, HfO₂, ZnO, SiO₂, etc. x SiN x and / or SiO x N y The first inorganic encapsulation layer 31 and the second inorganic encapsulation layer 33 can be formed by chemical vapor deposition. However, the first inorganic encapsulation layer 31 and the second inorganic encapsulation layer 33 can be formed by other deposition processes such as physical vapor deposition.

[0093] The organic encapsulation layer 32 may further include polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, HMDSO, acryloyl resin or combinations thereof.

[0094] Figure 3 The illustration is based on an embodiment. Figure 1 An enlarged view of area A in the image. Figure 4 It is a schematic diagram along Figure 3 A cross-sectional view of the section cut by line II-II' in the diagram. Figure 5 It is a diagram. Figure 4 An enlarged view of area B in the image.

[0095] Reference Figures 3 to 5 The display device 1 may include multiple signal transmission lines STL arranged in the peripheral area PA. The signal transmission lines STL may be configured to transmit signals to pixels PX arranged in the display area DA (see...). Figure 1 The signal transmission line (STL) can be electrically connected to signal lines or power lines arranged in the display area (DA). For example, the signal transmission line (STL) can be electrically connected to the scan line (SL) arranged in the display area (DA) (see...). Figure 1 ) or data cable DL (see Figure 1 ) line.

[0096] A signal transmission line (STL) may include multiple signal transmission lines in a peripheral area (PA). Multiple signal transmission lines (STLs) may extend in a first direction (DR1) and may be spaced apart from each other in a second direction (DR2) intersecting the first direction (DR1). Each signal transmission line (STL) may include a first line (WL1), a second line (WL2), and a third line (WL3). The first line (WL1), second line (WL2), and third line (WL3) provided in each signal transmission line (STL) may be electrically connected to each other and configured to transmit a signal.

[0097] The first line WL1 may be arranged in the first peripheral region PA1. The first line WL1 may include a first contact portion CP1 and a first extension portion EP1 extending from the first contact portion CP1 in a first direction DR1. The first contact portion CP1 of the first line WL1 may overlap with the upper part of the second line WL2.

[0098] The second line WL2 may include a second first contact portion CP2a, a second second contact portion CP2b, and a second extension portion EP2 located between the second first contact portion CP2a and the second second contact portion CP2b. The second first contact portion CP2a of the second line WL2 may overlap with the lower portion of the first line WL1. The second first contact portion CP2a of the second line WL2 may overlap with the first contact portion CP1 of the first line WL1. The second second contact portion CP2b of the second line WL2 may overlap with the upper portion of the third line WL3. The second second contact portion CP2b of the second line WL2 may overlap with the third contact portion CP3 of the third line WL3. The second extension portion EP2 of the second line WL2 may extend in a direction opposite to the first direction DR1. The second extension portion EP2 of the second line WL2 may be located between the second first contact portion CP2a and the second second contact portion CP2b. The second extension portion EP2 may extend from the second first contact portion CP2a in a direction opposite to the first direction DR1.

[0099] The middle portion of the second line WL2 can be arranged in the bending region BA. The upper portion of the second line WL2 can be arranged in the first outer region PA1, and the lower portion of the second line WL2 can be arranged in the second outer region PA2. In this case, the second extension portion EP2 of the second line WL2 can be arranged in the bending region BA. The second first contact portion CP2a of the second line WL2 can be provided in the first outer region PA1 to overlap with the first line WL1. The second second contact portion CP2b of the second line WL2 can be provided in the second outer region PA2 to overlap with the third line WL3.

[0100] The third line WL3 can be arranged in the second peripheral region PA2. The third line WL3 may include a third contact portion CP3 and a third extension portion EP3 extending from the third contact portion CP3 in a direction opposite to the first direction DR1. The third contact portion CP3 of the third line WL3 may overlap with the second line WL2.

[0101] In one embodiment, the second line WL2 may be disposed on the first line WL1. In another embodiment, the third line WL3 may be disposed on the same layer as the first line WL1. That is, the second line WL2 may be disposed on top of the first line WL1 and the third line WL3. However, one or more embodiments are not limited thereto.

[0102] In an embodiment, such as Figure 5 As depicted, the first line WL1 can be arranged between the first gate insulating layer 12 and the second gate insulating layer 13 in the thickness direction (i.e., the fourth direction DR4). For example, the first line WL1 can be arranged in the same layer as the gate electrode GE. In embodiments, such as Figure 4 As depicted, the second line WL2 can be located between the interlayer insulating layer 14 and the first planarization insulating layer 15. For example, the second line WL2 can be disposed in the same layer as the drain electrode DE or the source electrode SE. In an embodiment, similar to the first line WL1, the third line WL3 can be located between the first gate insulating layer 12 and the second gate insulating layer 13 in the thickness direction (i.e., the fourth direction DR4). However, the stacked structure of the first to third lines WL1, WL2 and WL3 is not limited to this and can be modified in various ways. For example, the first line WL1 can be disposed in the same layer as the second capacitor electrode CE2, and the second line WL2 can be disposed in the same layer as the connection electrode CE.

[0103] The first wire WL1, the second wire WL2, and the third wire WL3 can be electrically connected to each other. The first wire WL1 and the second wire WL2 can be electrically connected to each other through a first contact hole CT1 in the region where the first contact portion CP1 of the first wire WL1 and the second first contact portion CP2a of the second wire WL2 overlap. In an embodiment, as... Figure 4 As depicted herein, the first contact hole CT1 can penetrate through the second gate insulating layer 13 and the interlayer insulating layer 14 in the thickness direction (i.e., the fourth direction DR4). Although not shown herein, the second line WL2 and the third line WL3 can be electrically connected to each other through the second contact hole CT2 in the region where the second contact portion CP2b of the second line WL2 and the third contact portion CP3 of the third line WL3 overlap. In an embodiment, similar to the first contact hole CT1, the second contact hole CT2 can penetrate through the second gate insulating layer 13 and the interlayer insulating layer 14 in the thickness direction (i.e., the fourth direction DR4).

[0104] Each of the first contact hole CT1 and the second contact hole CT2 may include a plurality of sub-contact holes SCT arranged in a matrix in a first direction DR1 and a second direction DR2 in a plan view. In an embodiment, the first contact hole CT1 and the second contact hole CT2 may be referred to as a first welded portion formed by laser welding. Figure 5 The diagram shows that the first wire WL1 and the second wire WL2 are electrically connected to each other through the sub-contact hole SCT. In the embodiment, as shown... Figure 5 As depicted, the upper surface of the first contact portion CP1 of the first line WL1 can have a concave shape due to the sub-contact hole SCT. A second line WL2 can be disposed on the sub-contact hole SCT, and the sub-contact hole SCT can expose the upper surface of the first line WL1. However, in another example, the sub-contact hole SCT can expose the upper surface of the first gate insulating layer 12 by penetrating through the first line WL1 in the thickness direction (i.e., the fourth direction DR4).

[0105] The first extension EP1 of the first line WL1 may include a first recessed portion RP1. The first recessed portion RP1 may not overlap with the second line WL2 in the thickness direction. In an embodiment, the first recessed portion RP1 may have substantially the same shape as the first contact hole CT1. For example, similar to the plurality of sub-contact holes SCT of the first contact hole CT1, the first recessed portion RP1 may include a plurality of sub-recessed portions SRP arranged in a matrix in a first direction DR1 and a second direction DR2 in a plan view. For example, as... Figure 4 As depicted, each of the plurality of sub-recessed portions SRP of the first recessed portion RP1 can penetrate through the second gate insulating layer 13 and the interlayer insulating layer 14. In an embodiment, the first recessed portion RP1 may be referred to as a second welded portion formed by laser welding. In an embodiment, as... Figure 5 As depicted, due to the sub-recessed portion SRP, the upper surface of the first extension portion EP1 of the first line WL1 can have a concave shape. Figure 5 In one example, the sub-recessed portion SRP can expose the upper surface of the first line WL1. However, in another example, the sub-recessed portion SRP can expose the upper surface of the first gate insulating layer 12 by penetrating through the first line WL1 in the thickness direction (i.e., the fourth direction DR4).

[0106] Similar to the first line WL1, the third extension EP3 of the third line WL3 includes a second recessed portion RP2. The second recessed portion RP2 may not overlap with the second line WL2. In embodiments, the shape of the second recessed portion RP2 may be substantially equal to the shape of the first contact hole CT1 or the second contact hole CT2. For example, the second recessed portion RP2 includes a plurality of sub-recessed portions SRP arranged in a matrix in the first direction DR1 and the second direction DR2 in a plan view. In embodiments, the second recessed portion RP2 may be formed by a laser welding process.

[0107] like Figure 3 As depicted, two first recessed portions RP1 may be arranged in a first direction DR1. However, in another example, the first recessed portion RP1 may include one or more first recessed portions. According to one or more embodiments, similar to the first recessed portion RP1, the second recessed portion RP2 may include one or more second recessed portions.

[0108] Due to the first recessed portion RP1 of the first extension portion EP1 of the first wire WL1, the resistance of the first extension portion EP1 of the first wire WL1 increases, thereby preventing or minimizing the increase in current caused by the ohmic contact at the intersection of the first wire WL1 and the second wire WL2. Therefore, corrosion at the overlapping area of ​​the first wire WL1 and the second wire WL2 can be prevented or minimized. Similarly, due to the second recessed portion RP2 of the third wire WL3, corrosion at the overlapping area of ​​the second wire WL2 and the third wire WL3 can be prevented or minimized.

[0109] Figure 6 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image. Figure 7 It is a schematic diagram along Figure 6 A cross-sectional view of the section cut by line III-III' in the diagram. Figure 8 It is a diagram. Figure 7 Enlarged view of area C in the image. Figures 6 to 8 They are references Figures 3 to 5 Modifications to the described embodiments, and primarily descriptions of... Figures 3 to 5 The differences between the embodiments are omitted and redundant descriptions are not included.

[0110] Reference Figures 6 to 8The first extension EP1 of the first line WL1 includes a plurality of first recessed portions RP1a. Each of the first recessed portions RP1a may not overlap with the second line WL2. Each of the first recessed portions RP1a may be a single through-hole penetrating through a portion of the first line WL1 in the thickness direction (i.e., the fourth direction DR4). Each of the first recessed portions RP1a may be a through-hole formed by removing a portion of the first line WL1. The plurality of first recessed portions RP1a of the first line WL1 may be formed by, for example, an etching process.

[0111] like Figure 7 and Figure 8 As depicted, the second gate insulating layer 13 and the interlayer insulating layer 14 may overlap with the first recessed portion RP1a in the thickness direction. For example, although the second gate insulating layer 13 may not be arranged in the first contact hole CT1, the second gate insulating layer 13 may be arranged in the first recessed portion RP1a.

[0112] When viewed from a plan view, each of the first recessed portions RP1a may have a shape or size different from that of the first contact hole CT1. For example, unlike the first contact hole CT1 which has a plurality of sub-contact holes SCT arranged in a matrix, each of the first recessed portions RP1a may be a single through hole. For example, in a plan view, the size of the first recessed portion RP1a of the first extension EP1 may be larger than the size of the sub-contact holes SCT of the first contact hole CT1.

[0113] In an embodiment, such as Figure 7 and Figure 8 As depicted, the first extension portion EP1 of the first line WL1 can penetrate through the first line WL1 in the thickness direction (i.e., the fourth direction DR4) and can expose the upper surface of the first gate insulating layer 12. The second gate insulating layer 13 can be disposed on the first gate insulating layer 12 to cover the first recessed portion RP1a of the first line WL1.

[0114] In the embodiment, due to the first recessed portion RP1a of the first extension portion EP1 of the first line WL1, the resistance of the first extension portion EP1 of the first line WL1 increases, which can prevent or minimize the increase in current caused by the ohmic contact at the intersection of the first line WL1 and the second line WL2.

[0115] Similar to the first line WL1, the third extension EP3 of the third line WL3 may include a plurality of second recessed portions RP2a. Each of the second recessed portions RP2a may not overlap with the second line WL2. Each of the second recessed portions RP2a may be a single through-hole penetrating through a portion of the third line WL3 in the thickness direction (i.e., the fourth direction DR4). Each of the second recessed portions RP2a may be a through-hole formed by removing a portion of the third line WL3. Each of the second recessed portions RP2a of the third line WL3 may be formed by, for example, an etching process.

[0116] like Figure 8 As depicted, due to the sub-contact hole SCT, the upper surface of the first contact portion CP1 of the first line WL1 can have a concave shape. The second line WL2 can be disposed over the entire sub-contact hole SCT, and the sub-contact hole SCT can expose the upper surface of the first line WL1. However, in another example, the sub-contact hole SCT can expose the upper surface of the first gate insulating layer 12 by penetrating through the first line WL1 in the thickness direction (i.e., the fourth direction DR4). Furthermore, the first recessed portion RP1a of the first extension portion EP1 can expose the side surface of the first line WL1.

[0117] Since the description of the structure of the second recessed portion RP2a also applies to the structure of the first recessed portion RP1a, redundant descriptions for the second recessed portion RP2a are omitted.

[0118] Figure 9 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image. Figure 10 It is a schematic diagram along Figure 9 A cross-sectional view of the section cut by line IV-IV' in the diagram.

[0119] Reference Figure 9 and Figure 10 The first contact portion CP1 of the first line WL1 and the second first contact portion CP2a of the second line WL2 can overlap each other at the location where multiple first contact holes CT1a, CT1b, and CT1c are provided. For example, the multiple first contact holes CT1a, CT1b, and CT1c can be arranged in the first direction DR1. Similarly, the third contact portion CP3 of the third line WL3 and the second second contact portion CP2b of the second line WL2 can overlap each other at the location where multiple second contact holes CT2a, CT2b, and CT2c are provided. For example, the multiple second contact holes CT2a, CT2b, and CT2c can be arranged in the first direction DR1. In this case, the second line WL2 can be provided on each of the first line WL1 and the third line WL3.

[0120] Each of the plurality of first contact holes CT1a, CT1b, and CT1c may include a plurality of sub-contact holes SCT arranged in a matrix in the first direction DR1 and the second direction DR2 in the plan view. Similarly, each of the plurality of second contact holes CT2a, CT2b, and CT2c may include a plurality of sub-contact holes SCT arranged in a matrix in the first direction DR1 and the second direction DR2 in the plan view. In this case, the second line WL2 can be connected to the first line WL1 and the third line WL3 through the plurality of sub-contact holes.

[0121] In addition, such as Figure 9 As depicted, each of the plurality of first contact holes CT1a, CT1b, and CT1c and the plurality of second contact holes CT2a, CT2b, and CT2c may include three contact holes. However, in another example, the number of the plurality of first contact holes CT1a, CT1b, and CT1c and the number of the plurality of second contact holes CT2a, CT2b, and CT2c can be modified in various ways. That is, the number of first contact holes CT1a, CT1b, and CT1c and the number of second contact holes CT2a, CT2b, and CT2c may be more or less than three.

[0122] Because the signal transmission line STL can include multiple first contact holes CT1a, CT1b, and CT1c at the intersection of the first line WL1 and the second line WL2, the ohmic contact at the intersection of the first line WL1 and the second line WL2 is dispersed, thereby preventing or minimizing corrosion due to increased current. Similarly, because the signal transmission line STL includes multiple second contact holes CT2a, CT2b, and CT2c at the intersection of the second line WL2 and the third line WL3, corrosion of the line due to increased current can be prevented or minimized.

[0123] according to Figure 9 and Figure 10 The embodiment, including a plurality of first contact holes CT1a, CT1b and CT1c and / or a plurality of second contact holes CT2a, CT2b and CT2c, can be further adapted to the reference. Figures 3 to 5 The described embodiments or references Figures 6 to 8 The described embodiments.

[0124] Figure 11 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image.

[0125] Reference Figure 11The display device 1 may include multiple signal transmission lines STL having a first signal transmission line STL1 and a second signal transmission line STL2. Each of the multiple signal transmission lines STL may extend in a first direction DR1 and may be spaced apart from each other in a second direction DR2.

[0126] The first signal transmission line STL1 and the second signal transmission line STL2 can transmit different signals from each other. Each of the first signal transmission lines STL1 and STL2 may include a first line WL1, a second line WL2, and a third line WL3. The first line WL1, the second line WL2, and the third line WL3 provided in each of the first signal transmission lines STL1 and STL2 can be electrically connected to each other to transmit a single signal.

[0127] The display device 1 may further include a sacrificial line SCL located between the first signal transmission line STL1 and the second signal transmission line STL2 along the second direction DR2. That is, the sacrificial line SCL may be spaced apart from each of the first signal transmission lines STL1 and the second signal transmission line STL2 along the second direction DR2, and may extend along the first direction DR1. However, unlike the first signal transmission lines STL1 and the second signal transmission lines STL2, the sacrificial line SCL may not transmit signals to the pixels PX arranged in the display area DA (see...). Figure 1 For example, the sacrificial line SCL can be electrically insulated from the pixel PX arranged in the display area DA.

[0128] In one embodiment, a first voltage may be applied to a first signal transmission line STL1, a second voltage may be applied to a second signal transmission line STL2, and a third voltage, different from the first and second voltages, may be applied to a sacrificial line SCL. In another embodiment, the first voltage applied to the first signal transmission line STL1 and the second voltage applied to the second signal transmission line STL2 may be voltages with different polarities. In yet another embodiment, the second voltage applied to the second signal transmission line STL2 and the third voltage applied to the sacrificial line SCL may be voltages with the same polarity. For example, the first voltage may be positive, and the second and third voltages may be negative. In yet another embodiment, the absolute value of the third voltage applied to the sacrificial line SCL may be greater than the absolute value of the second voltage applied to the second signal transmission line STL2.

[0129] The sacrificial line SCL can be arranged adjacent to the second signal transmission line STL2, and the magnitude of the DC voltage applied to the sacrificial line SCL can be greater than the magnitude of the DC voltage applied to the second signal transmission line STL2. Accordingly, electrons can be emitted from the sacrificial line SCL, thereby preventing corrosion in the second signal transmission line STL2 adjacent to the sacrificial line SCL. Similarly, a sacrificial line SCL to which a voltage of a different polarity than the voltage applied to the first signal transmission line STL1 can be arranged adjacent to the first signal transmission line STL1, thereby preventing corrosion in the first signal transmission line STL1. For example, the sacrificial line SCL between the first signal transmission line STL1 and the second signal transmission line STL2 can emit electrons, thereby reducing corrosion in both the first signal transmission line STL1 and the second signal transmission line STL2.

[0130] With reference Figures 3 to 5 The described embodiments or references Figures 6 to 8 The described embodiments are similar, in Figure 11 In some embodiments, the structure in which the first line WL1 includes a first recessed portion RP1 or RP1a can be further adapted. (Refer to...) Figure 9 and Figure 10 The described embodiments are similar, in Figure 11 In some embodiments, a structure including multiple contact holes can be further applied.

[0131] Figure 12 The illustration is based on another embodiment. Figure 1 An enlarged view of area A in the image.

[0132] Reference Figure 12 The display device 1 may include multiple signal transmission lines STL, including a first signal transmission line STL1 and a second signal transmission line STL2. Each of the multiple signal transmission lines STL may extend in a first direction DR1. The multiple signal transmission lines STL may be spaced apart from each other in a second direction DR2.

[0133] The first signal transmission line STL1 and the second signal transmission line STL2 can transmit different signals from each other. Each of the first signal transmission lines STL1 and STL2 may include a first line WL1, a second line WL2, and a third line WL3. The first line WL1, the second line WL2, and the third line WL3 provided in each of the first signal transmission lines STL1 and STL2 can be electrically connected to each other to transmit a single signal.

[0134] The first wire WL1 and the second wire WL2 of the first signal transmission line STL1 can be electrically connected to each other through a first contact hole CT11 at the point where the first contact portion CP1 of the first wire WL1 and the second first contact portion CP2a of the second wire WL2 overlap. The first first contact hole CT11 can be located at the intersection of the first wire WL1 and the second wire WL2 of the first signal transmission line STL1. More specifically, the first first contact hole CT11 can be located at the intersection of the first contact portion CP1 and the second first contact portion CP2a of the first signal transmission line STL1. The second wire WL2 and the third wire WL3 of the first signal transmission line STL1 can be electrically connected to each other through a second first contact hole CT21 at the point where the third contact portion CP3 of the third wire WL3 and the second second contact portion CP2b of the second wire WL2 overlap. The second first contact hole CT21 can be located at the intersection of the second wire WL2 and the third wire WL3 of the first signal transmission line STL1. More specifically, the second first contact hole CT21 can be located at the intersection of the third contact portion CP3 and the second second contact portion CP2b of the first signal transmission line STL1.

[0135] The first wire WL1 and the second wire WL2 of the second signal transmission line STL2 can be electrically connected to each other through a first second contact hole CT12 at the point where the first contact portion CP1 of the first wire WL1 and the second first contact portion CP2a of the second wire WL2 overlap. The first second contact hole CT12 can be located at the intersection of the first wire WL1 and the second wire WL2 of the second signal transmission line STL2. More specifically, the first second contact hole CT12 can be located at the intersection of the first contact portion CP1 and the second first contact portion CP2a of the second signal transmission line STL2. Additionally, the second wire WL2 and the third wire WL3 of the second signal transmission line STL2 can be electrically connected to each other through a second second contact hole CT22 at the point where the third contact portion CP3 of the third wire WL3 and the second second contact portion CP2b of the second wire WL2 overlap. The second second contact hole CT22 can be located at the intersection of the second wire WL2 and the third wire WL3 of the second signal transmission line STL2. More specifically, the second contact hole CT22 can be located at the intersection of the third contact portion CP3 and the second contact portion CP2b of the second signal transmission line STL2.

[0136] The first second contact hole CT12 of the second signal transmission line STL2 can be arranged on the third direction DR3 from the first first contact hole CT11 of the first signal transmission line STL1, where the third direction DR3 is between the first direction DR1 and the second direction DR2. For example, as Figure 12 As depicted, the first second contact hole CT12 of the second signal transmission line STL2 can be arranged diagonally from the first first contact hole CT11 of the first signal transmission line STL1.

[0137] The second contact hole CT22 of the second signal transmission line STL2 can be arranged from the second contact hole CT21 of the first signal transmission line STL1 in a fifth direction, which is between the second direction DR2 and the first direction DR1. For example, as Figure 12 As depicted, the second second contact hole CT22 of the second signal transmission line STL2 can be arranged diagonally from the second first contact hole CT21 of the first signal transmission line STL1.

[0138] With reference Figures 3 to 5 The described embodiments or references Figures 6 to 8 The described embodiments are similar, in Figure 12 In some embodiments, the structure in which the first line WL1 includes a first recessed portion RP1 or RP1a can be further adapted. (Refer to...) Figure 9 and Figure 10 The described embodiments are similar, in Figure 12 In some embodiments, a structure including multiple contact holes can be further applied. Figure 12 The sacrificial line SCL is not shown, but this disclosure is not limited thereto. For example, with reference to... Figure 11 The described embodiments are similar, in Figure 12 In some embodiments, a structure including a sacrificial line SCL can be further applied.

[0139] According to an embodiment, by minimizing corrosion occurring between lines that come into contact with each other, a display device with improved reliability can be provided. However, the scope of one or more embodiments is not limited to this effect.

[0140] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the claims.

Claims

1. A display device, comprising: A substrate having a display area and a peripheral area arranged adjacent to the display area; Multiple pixels are arranged in the display area of ​​the substrate; as well as Multiple signal transmission lines are configured to transmit signals to the multiple pixels. Each of the plurality of signal transmission lines includes: A first line has a first contact portion and a first extension portion, wherein the first extension portion extends from the first contact portion in a first direction; and The second line has a second contact portion and a second extension portion, wherein the second contact portion of the second line overlaps with the first contact portion of the first line, and the second extension portion extends from the second contact portion in a direction opposite to the first direction. The first wire and the second wire are electrically connected to each other through a first contact hole located in the region where the first contact portion and the second contact portion overlap. The first extension of the first line includes a first recessed portion.

2. The display device according to claim 1, wherein, The first recessed portion does not overlap with the second line.

3. The display device according to claim 1, wherein, The first contact hole includes a plurality of sub-contact holes arranged in a matrix in the first direction and a second direction perpendicular to the first direction in a plan view. The first recessed portion includes a plurality of sub-recessed portions arranged in a matrix in the first and second directions in the plan view, and In the plan view, the first recessed portion and the first contact hole have the same shape.

4. The display device according to claim 1, wherein, The first contact hole includes a plurality of sub-contact holes arranged in a matrix in the first direction and a second direction perpendicular to the first direction in a plan view, and The first recessed portion is a single through-hole that penetrates a portion of the first line in the thickness direction.

5. The display device according to claim 1, wherein, The first contact hole includes a plurality of sub-contact holes arranged in a matrix in the first direction and a second direction perpendicular to the first direction in a plan view, and The first contact hole includes a plurality of contact holes in the region where the first contact portion of the first line and the second contact portion of the second line overlap with each other.

6. The display device according to any one of claims 1 to 5, wherein, The first recessed portion includes a plurality of recessed portions arranged in the first direction, and The first recessed portion penetrates a portion of the first line in the thickness direction.

7. A display device, comprising: The substrate includes a display area and a peripheral area arranged adjacent to the display area; Multiple pixels are arranged in the display area of ​​the substrate; Multiple signal transmission lines are configured to transmit signals to the multiple pixels, wherein each of the multiple signal transmission lines includes a first signal transmission line and a second signal transmission line spaced apart from the first signal transmission line; and The sacrificial line is electrically insulated from the plurality of pixels, wherein the sacrificial line is located between the first signal transmission line and the second signal transmission line. Wherein, a first voltage is applied to the first signal transmission line and a second voltage is applied to the second signal transmission line, and A third voltage, different from the first and second voltages, is applied to the sacrificial line.

8. The display device according to claim 7, wherein, The first voltage has a polarity different from that of the second voltage, and The third voltage has the same polarity as the second voltage, and the absolute value of the third voltage is greater than the absolute value of the second voltage.

9. The display device according to any one of claims 7 and 8, wherein, Each of the plurality of signal transmission lines includes: A first line, having a first contact portion and a first extension portion extending from the first contact portion in a first direction; and The second line has a second contact portion and a second extension portion, wherein the second contact portion of the second line overlaps with the first contact portion and the second extension portion extends from the second contact portion in a direction opposite to the first direction. The first wire and the second wire are electrically connected to each other through contact holes located in the region where the first contact portion of the first wire and the second contact portion of the second wire overlap.

10. A display device, comprising: The substrate includes a display area and a peripheral area arranged adjacent to the display area; Multiple pixels are arranged in the display area of ​​the substrate; as well as Multiple signal transmission lines are configured to transmit signals to the multiple pixels, wherein each of the multiple signal transmission lines includes a first signal transmission line and a second signal transmission line spaced apart from the first signal transmission line in a first direction. The first signal transmission line includes a first line and a second line, and the first signal transmission line extends in a second direction perpendicular to the first direction. The second signal transmission line includes a first line and a second line, and the second signal transmission line extends in the second direction. The first contact hole defined in the first signal transmission line is located in the area where the first line and the second line of the first signal transmission line overlap each other. The second contact hole defined in the second signal transmission line is located in the area where the first line and the second line of the second signal transmission line overlap each other. The second contact hole is arranged in a third-direction orientation from the first contact hole, and The third direction is located between the first direction and the second direction.

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