Harmonic amplitude extraction circuit
By combining phase-locked loop frequency multiplication and filtering with multiplication operations, real-time and continuous extraction of harmonic amplitudes is achieved, solving the problem of large hardware resource investment in existing technologies, reducing costs and improving circuit reliability and ease of maintenance.
Patent Information
- Application Number
- CN202422436046.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-09
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-10-09
AI Technical Summary
Existing technologies for harmonic amplitude extraction circuits require significant hardware resources and are costly, making it difficult to achieve efficient monitoring and management of harmonic interference in power systems.
A phase-locked loop is used to perform frequency doubling of the fundamental frequency. The filter waveform is obtained through bandpass filtering. The harmonic amplitude characteristics of the frequency doubling waveform are extracted using multiplication operations. The harmonic amplitude is then extracted through a low-pass filter, thus avoiding the use of Fourier transform and computer programs.
It achieves real-time and continuous extraction of harmonic amplitude, consumes less hardware resources, reduces costs, and improves circuit reliability and ease of maintenance.
Smart Images
Figure CN223514887U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power harmonic signal analysis technology, and in particular to a harmonic amplitude extraction circuit. Background Technology
[0002] Harmonics refer to the components of a periodic non-sinusoidal alternating current that are integer multiples of the fundamental frequency, obtained by Fourier series decomposition. These are commonly referred to as higher harmonics, while the fundamental frequency refers to the component whose frequency is the same as the power frequency (50Hz). Higher harmonic interference is a major "public nuisance" affecting power quality in current power systems, and countermeasures are urgently needed.
[0003] To strengthen the monitoring, management, and control of harmonics, countries around the world have promulgated corresponding standards and developed various power quality monitoring devices based on these standards. These devices are widely used in substations, wind farms, steel enterprises, and electrified railways to safeguard the safety of the power grid. Among related technologies, harmonic monitoring mainly relies on Fourier transform extraction. Typically, waveform signals are sampled, and the amplitude characteristics of harmonics are extracted through Fourier transform analysis before further analysis and indication.
[0004] Extracting and analyzing power harmonics using Fourier transform requires strong computing power, resulting in significant hardware resource investment and high costs.
[0005] Therefore, it is necessary to develop a harmonic amplitude extraction circuit. Utility Model Content
[0006] This utility model provides a harmonic amplitude extraction circuit to solve the problem of excessive hardware resource investment in existing harmonic amplitude extraction circuits.
[0007] In a first aspect, embodiments of this utility model provide a harmonic amplitude extraction circuit, comprising:
[0008] The two input terminals of the amplitude extraction unit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively.
[0009] When the fundamental waveform and the target waveform are respectively input to the phase-locked loop frequency multiplier and the first filter, the output terminal of the phase-locked loop frequency multiplier and the output terminal of the first filter respectively output a frequency multiplier waveform that is multiplied by the fundamental waveform and a filter waveform of a preset frequency, wherein the first filter is a bandpass filter;
[0010] The amplitude extraction unit is used to perform a multiplication operation on the frequency harmonic waveform and the filter waveform to obtain a product waveform, and to perform a low-pass filter on the product waveform to obtain the amplitude of the target frequency waveform, wherein the target frequency waveform has the same frequency as the frequency harmonic waveform.
[0011] In some possible implementations, the amplitude extraction unit includes a multiplication circuit and a second filter;
[0012] The two input terminals of the multiplication circuit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively. The input terminal of the second filter is electrically connected to the output terminal of the multiplication circuit. The second filter is a low-pass filter.
[0013] When the multiplication circuit receives the frequency multiplication waveform and the filter waveform, it outputs the product waveform at the output terminal of the multiplication circuit. The second filter performs low-pass filtering on the product waveform to obtain the amplitude of the target frequency waveform.
[0014] In some possible implementations, the phase-locked loop frequency multiplier includes: a phase detector, a loop filter, a voltage-controlled oscillator, and a frequency divider;
[0015] The input and output terminals of the loop filter are electrically connected to the output terminal of the phase detector and the input terminal of the voltage-controlled oscillator, respectively.
[0016] The input and output terminals of the frequency divider are electrically connected to the output terminal of the voltage-controlled oscillator and the second input terminal of the phase detector, respectively.
[0017] When the fundamental waveform is input to the first input terminal of the phase detector, the phase detector generates a first waveform containing phase difference characteristics based on the fundamental waveform and the output waveform of the frequency divider. The loop filter performs low-pass filtering on the first waveform to generate a phase difference characteristic waveform, and the voltage-controlled oscillator generates the frequency doubling waveform based on the phase difference characteristic waveform.
[0018] In some possible implementations, the multiplication circuit includes: an addition circuit, an exponentiation circuit, and two sets of logarithmic circuits;
[0019] The outputs of the two logarithmic circuits are electrically connected to the two inputs of the adder circuit, and the output of the adder circuit is electrically connected to the input of the exponential circuit.
[0020] In some possible implementations, the logarithmic circuit includes:
[0021] First operational amplifier, first transistor, first resistor, and second resistor;
[0022] The first end of the first resistor is electrically connected to the collector of the first transistor and the inverting input of the first operational amplifier. The two ends of the second resistor are electrically connected to the non-inverting input of the first operational amplifier and ground, respectively. The base and emitter of the first transistor are electrically connected to ground and the output of the first operational amplifier, respectively.
[0023] In some possible implementations, the exponential circuit includes:
[0024] The fourth operational amplifier, the third transistor, the ninth resistor, and the tenth resistor;
[0025] The emitter of the third transistor is electrically connected to the first end of the ninth resistor and the inverting input of the fourth operational amplifier. The second end of the ninth resistor is electrically connected to the output of the fourth operational amplifier. The two ends of the tenth resistor are electrically connected to the non-inverting input of the fourth operational amplifier and ground, respectively. The base of the third transistor is electrically connected to the collector of the third transistor.
[0026] In some possible implementations, the second filter includes: a 51st resistor, a 52nd resistor, a 51st capacitor, and a 52nd capacitor;
[0027] The second end of the fifty-first resistor is electrically connected to the first end of the fifty-first capacitor and the first end of the fifty-second resistor, respectively. The second end of the fifty-second resistor is electrically connected to the first end of the fifty-second capacitor. The second ends of the fifty-first capacitor and the fifty-second capacitor are grounded.
[0028] In some possible implementations, the first filter includes: a fifth operational amplifier, a forty-first resistor, a forty-second resistor, a forty-third resistor, a forty-first capacitor, a forty-second capacitor, and a forty-third capacitor;
[0029] The first terminal of the forty-first capacitor is electrically connected to the second terminal of the forty-first resistor, the first terminal of the forty-second resistor, and the first terminal of the forty-second capacitor. The second terminal of the forty-first capacitor is electrically connected to the inverting input terminal of the fifth operational amplifier and the first terminal of the forty-third resistor.
[0030] The first terminal of the forty-third capacitor is electrically connected to the output terminal of the fifth operational amplifier, the second terminal of the forty-third resistor, and the second terminal of the forty-second capacitor;
[0031] The non-inverting input terminal of the fifth operational amplifier and the second terminal of the forty-second resistor are grounded.
[0032] The beneficial effects of this utility model embodiment compared with the prior art are:
[0033] This utility model discloses a harmonic amplitude extraction circuit, which obtains a harmonic waveform by performing frequency multiplication on the fundamental wave through a phase-locked loop, and obtains a filter waveform through bandpass filtering. By multiplying the two waveforms, a waveform containing harmonic amplitude characteristics is extracted. Finally, the harmonic amplitude is extracted through a low-pass filter. The above process does not require Fourier transform or computer programs, has good real-time performance and continuity, and consumes few hardware resources.
[0034] The embodiments of the present invention rely solely on common electronic components such as operational amplifiers, resistors, capacitors, and transistors to construct analog circuits for signal processing, which are highly reliable, readily replaceable, and easy to troubleshoot and adjust for precision. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0036] Figure 1 This is a functional block diagram of the harmonic amplitude extraction circuit provided in this embodiment of the utility model;
[0037] Figure 2 This is a functional block diagram of the phase-locked loop frequency multiplier provided in the embodiments of this utility model;
[0038] Figure 3 This is a schematic diagram of the multiplication circuit provided by an embodiment of the present invention;
[0039] Figure 4 This is a schematic diagram of the first filter provided in this embodiment of the utility model;
[0040] Figure 5 This is a schematic diagram of the second filter provided in an embodiment of the present invention. Detailed Implementation
[0041] In the following description, specific details such as particular system structures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the present invention. However, those skilled in the art will understand that the present invention can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, and methods have been omitted so as not to obscure the description of the present invention with unnecessary detail.
[0042] To make the objectives, technical solutions, and advantages of this utility model clearer, the following description will be provided in conjunction with the accompanying drawings and specific embodiments.
[0043] The embodiments of this utility model are described in detail below. This example is implemented based on the technical solution of this utility model, and provides detailed implementation methods and specific operation processes. However, the protection scope of this utility model is not limited to the following embodiments.
[0044] Figure 1 The overall structure diagram of the harmonic amplitude extraction circuit provided for the embodiment of this utility model.
[0045] like Figure 1 The diagram shows the overall structure of the harmonic amplitude extraction circuit provided by this embodiment of the invention, which is described in detail below:
[0046] A harmonic amplitude extraction circuit includes: a phase-locked loop frequency multiplier, a first filter, and an amplitude extraction unit;
[0047] The two input terminals of the amplitude extraction unit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively.
[0048] When the fundamental waveform and the target waveform are respectively input to the phase-locked loop frequency multiplier and the first filter, the output terminal of the phase-locked loop frequency multiplier and the output terminal of the first filter respectively output a frequency multiplier waveform that is multiplied by the fundamental waveform and a filter waveform of a preset frequency, wherein the first filter is a bandpass filter;
[0049] The amplitude extraction unit is used to perform a multiplication operation on the harmonic waveform and the filter waveform to obtain a product waveform, and then perform a low-pass filter on the product waveform to obtain the amplitude of the target frequency waveform, wherein the target frequency waveform has the same frequency as the harmonic waveform.
[0050] For example, in this embodiment of the invention, the amplitude of harmonics is obtained by multiplying the target waveform and the fundamental waveform and then performing a low-pass filtering operation. The target waveform is the waveform to be measured, for example, the voltage waveform to be measured is a voltage signal acquired by a voltage transformer, which may contain multiple harmonics. In this embodiment of the invention, the target waveform is filtered by a first filter, retaining only the harmonic waveform to be measured, for example, the 7th harmonic (7 times the power frequency). Accordingly, a harmonic signal of the 7th harmonic is generated at the phase-locked loop (PLL) frequency multiplier. The PLL frequency multiplier is typically based on the fundamental waveform, which also originates from the voltage signal acquired by the voltage transformer as described above. This fundamental waveform is usually obtained by filtering the voltage signal acquired by the voltage transformer to obtain a power frequency signal. In this way, since the filter waveform obtained by the first filter and the harmonic waveform obtained by the PLL frequency multiplier are from the same source, the harmonic waveform and the filter waveform are in phase.
[0051] Multiplying two signals in phase yields a product waveform, which is expressed as follows:
[0052] (U m ·sin(nω0t))·(U f ·sin(nω0t))=U m ·U f ·sin 2 (nω0t)
[0053] =U m ·U f ·(1-cos(2nω0t))
[0054] In the formula, U m U represents the amplitude of the harmonic waveform. f ω0 is the amplitude of the filter waveform, n is the fundamental frequency (power frequency), t is the harmonic, and t is the time variable.
[0055] As can be seen from the above expression, the product waveform is actually a constant U. m ·U f A waveform U that is twice the frequency of the harmonic waveform m ·U f The sum of cos(2nω0t) can be obtained as a constant by low-pass filtering. And within this constant, if U... m If the value is 1, then the amplitude of the harmonic can be obtained directly. The implementation details of each part will be discussed in the following sections.
[0056] The embodiments of the present invention obtain a frequency-doubled waveform by performing frequency doubling on the fundamental wave through a phase-locked loop, and obtain a filter waveform by bandpass filtering. By multiplying the two waveforms, a waveform containing harmonic amplitude characteristics is extracted. Finally, the harmonic amplitude is extracted by a low-pass filter. The above process does not require Fourier transform or computer programs, has good real-time performance and continuity, and consumes less hardware resources.
[0057] In some embodiments, the phase-locked loop frequency multiplier includes: a phase detector, a loop filter, a voltage-controlled oscillator, and a frequency divider;
[0058] The input and output terminals of the loop filter are electrically connected to the output terminal of the phase detector and the input terminal of the voltage-controlled oscillator, respectively.
[0059] The input and output terminals of the frequency divider are electrically connected to the output terminal of the voltage-controlled oscillator and the second input terminal of the phase detector, respectively.
[0060] When the fundamental waveform is input to the first input terminal of the phase detector, the phase detector generates a first waveform containing phase difference characteristics based on the fundamental waveform and the output waveform of the frequency divider. The loop filter performs low-pass filtering on the first waveform to generate a phase difference characteristic waveform, and the voltage-controlled oscillator generates the frequency doubling waveform based on the phase difference characteristic waveform.
[0061] For example, such as Figure 2 As shown, a phase-locked loop (PLL) frequency multiplier circuit is illustrated. This circuit includes a phase detector (PD), a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The working principle of the PLL is to detect the phase difference between the input signal and the output signal, and convert the detected phase difference signal into a voltage signal output through the phase detector. After being filtered by a low-pass filter, it forms the control voltage of the voltage-controlled oscillator, which controls the frequency of the oscillator output signal. Then, the frequency and phase of the oscillator output signal are fed back to the phase detector through a feedback path.
[0062] During operation, when the frequency of the output signal proportionally reflects the frequency of the input signal, the output voltage and the input voltage maintain a fixed phase difference, thus locking the phase between the output voltage and the input voltage.
[0063] In this process, the voltage-controlled oscillator (VCO) provides a signal, part of which is output, and the other part is compared with the phase of the frequency-divided fundamental waveform. To maintain a constant frequency, the phase difference must remain unchanged. If there is a change in the phase difference, the voltage at the output of the loop filter changes, controlling the VCO until the phase difference is restored, thus achieving frequency locking. This closed-loop electronic circuit ensures that the frequency and phase of the controlled oscillator maintain a definite relationship with the input signal.
[0064] An analog phase-locked loop (PLL) mainly consists of a phase reference extraction circuit, a voltage-controlled oscillator (VCO), a phase comparator, and a control circuit. The VCO outputs a constant-amplitude signal very close to the required frequency. This signal, along with a reference signal extracted from the signal by the phase reference extraction circuit, is simultaneously fed into the phase comparator. The error generated by the comparison is used by the control circuit to continuously change the frequency of the VCO in the direction of reducing the absolute value of the error, thus achieving phase locking and synchronization.
[0065] In some embodiments, the first filter includes: a fifth operational amplifier, a forty-first resistor, a forty-second resistor, a forty-third resistor, a forty-first capacitor, a forty-second capacitor, and a forty-third capacitor;
[0066] The first terminal of the forty-first capacitor is electrically connected to the second terminal of the forty-first resistor, the first terminal of the forty-second resistor, and the first terminal of the forty-second capacitor. The second terminal of the forty-first capacitor is electrically connected to the inverting input terminal of the fifth operational amplifier and the first terminal of the forty-third resistor.
[0067] The first terminal of the forty-third capacitor is electrically connected to the output terminal of the fifth operational amplifier, the second terminal of the forty-third resistor, and the second terminal of the forty-second capacitor;
[0068] The non-inverting input terminal of the fifth operational amplifier and the second terminal of the forty-second resistor are grounded.
[0069] For example, such as Figure 4 As shown in the figure, this is a bandpass filter. A bandpass filter is a waveform filtering circuit that filters a specific frequency range. When the bandwidth of a bandpass filter is very narrow, it is called a narrowband filter. Figure 4 The bandpass filter shown, when the parameters are selected appropriately, can output a waveform at the output FilterWave terminal that approximates a certain frequency point when the signal collected by the current transformer at the input Target Wave terminal is as described above, such as the 7th harmonic (7 times the power frequency harmonic) required above.
[0070] In some implementations, the amplitude extraction unit includes a multiplication circuit and a second filter;
[0071] The two input terminals of the multiplication circuit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively. The input terminal of the second filter is electrically connected to the output terminal of the multiplication circuit. The second filter is a low-pass filter.
[0072] When the multiplication circuit receives the frequency multiplication waveform and the filter waveform, it outputs the product waveform at the output terminal of the multiplication circuit. The second filter performs low-pass filtering on the product waveform to obtain the amplitude of the target frequency waveform.
[0073] For example, such as Figure 1 As shown, the amplitude extraction unit of this embodiment includes a multiplication circuit and a second filter. The multiplication circuit receives the frequency-multiplied waveform output from the phase-locked loop frequency multiplier circuit and the filtered waveform obtained by the bandpass filter (first filter), and performs a multiplication operation on the two to obtain a product waveform. This product waveform is then passed through a low-pass filter to remove the waveform that is twice the frequency multiplier waveform in the above formula, obtaining a constant U. m ·U f The multiplication circuit will now be discussed in detail.
[0074] In some implementations, the multiplication circuit includes: an addition circuit, an exponentiation circuit, and two sets of logarithmic circuits;
[0075] The outputs of the two logarithmic circuits are electrically connected to the two inputs of the adder circuit, and the output of the adder circuit is electrically connected to the input of the exponential circuit.
[0076] In some embodiments, the logarithmic circuit includes:
[0077] First operational amplifier, first transistor, first resistor, and second resistor;
[0078] The first end of the first resistor is electrically connected to the collector of the first transistor and the inverting input of the first operational amplifier. The two ends of the second resistor are electrically connected to the non-inverting input of the first operational amplifier and ground, respectively. The base and emitter of the first transistor are electrically connected to ground and the output of the first operational amplifier, respectively.
[0079] In some embodiments, the exponential circuit includes:
[0080] The fourth operational amplifier, the third transistor, the ninth resistor, and the tenth resistor;
[0081] The emitter of the third transistor is electrically connected to the first end of the ninth resistor and the inverting input of the fourth operational amplifier. The second end of the ninth resistor is electrically connected to the output of the fourth operational amplifier. The two ends of the tenth resistor are electrically connected to the non-inverting input of the fourth operational amplifier and ground, respectively. The base of the third transistor is electrically connected to the collector of the third transistor.
[0082] like Figure 3 As shown, the multiplication circuit consists of three parts: two sets of logarithmic circuits: the first logarithmic circuit 310 and the second logarithmic circuit 311, the addition circuit 320, and the exponentiation circuit 330.
[0083] Two logarithmic circuits receive the frequency-doubling waveform and the filter waveform obtained in the aforementioned steps, respectively, and perform logarithmic operations on both. The result of the logarithmic operation is calculated in the adder circuit 320 to obtain the sum of the two logarithmic operation results. This sum is then subjected to an exponential operation by the exponentiation circuit 330. As those skilled in the art will know, the above logarithmic, summation, and exponential operations result in the result of multiplication operations on the frequency-doubling waveform and the filter waveform.
[0084] In some embodiments, the second filter includes: a 51st resistor, a 52nd resistor, a 51st capacitor, and a 52nd capacitor;
[0085] The second end of the fifty-first resistor is electrically connected to the first end of the fifty-first capacitor and the first end of the fifty-second resistor, respectively. The second end of the fifty-second resistor is electrically connected to the first end of the fifty-second capacitor. The second ends of the fifty-first capacitor and the fifty-second capacitor are grounded.
[0086] For example, such as Figure 5 As shown, in some application scenarios, the low-pass filter (second filter) consists of two cascaded first-order filters. Specifically, the first terminal of the 51st resistor and the 51st capacitor are connected in series, the second terminal of the 51st capacitor is grounded, and the first terminal of the 51st resistor is used to input the product waveform. In this case, due to the low impedance of the 51st resistor to high-frequency signals, the high-frequency signal is bypassed. Meanwhile, the higher impedance of the 51st capacitor to low-frequency signals creates a voltage node at the connection point of the 51st resistor and the 51st capacitor, resulting in a low-frequency signal. This low-frequency signal is then filtered again by the 52nd resistor and the 52nd capacitor, bypassing the high-frequency signal once more while retaining the low-frequency signal. This results in a low-frequency waveform being output at the Volume Out output terminal, which is U... m ·U f The low-frequency waveform formed. When U m When the amplitude is 1, this low-frequency waveform is precisely U. f The waveform fluctuates over time, and the harmonic amplitude can be extracted.
[0087] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of this utility model.
[0088] The following are embodiments of the device of this utility model. For details not described in detail, please refer to the corresponding method embodiments described above.
Claims
1. A harmonic amplitude extraction circuit, characterized in that, include: Phase-locked loop frequency multiplier, first filter, and amplitude extraction unit; The two input terminals of the amplitude extraction unit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively. When the fundamental waveform and the target waveform are respectively input to the phase-locked loop frequency multiplier and the first filter, the output terminal of the phase-locked loop frequency multiplier and the output terminal of the first filter respectively output a frequency multiplier waveform that is multiplied by the fundamental waveform and a filter waveform of a preset frequency, wherein the first filter is a bandpass filter; The amplitude extraction unit is used to perform a multiplication operation on the frequency harmonic waveform and the filter waveform to obtain a product waveform, and to perform a low-pass filter on the product waveform to obtain the amplitude of the target frequency waveform, wherein the target frequency waveform has the same frequency as the frequency harmonic waveform.
2. The harmonic amplitude extraction circuit according to claim 1, characterized in that, The amplitude extraction unit includes a multiplication circuit and a second filter; The two input terminals of the multiplication circuit are electrically connected to the output terminal of the phase-locked loop and the output terminal of the first filter, respectively. The input terminal of the second filter is electrically connected to the output terminal of the multiplication circuit. The second filter is a low-pass filter. When the multiplication circuit receives the frequency multiplication waveform and the filter waveform, it outputs the product waveform at the output terminal of the multiplication circuit. The second filter performs low-pass filtering on the product waveform to obtain the amplitude of the target frequency waveform.
3. The harmonic amplitude extraction circuit according to claim 1, characterized in that, The phase-locked loop frequency multiplier includes: a phase detector, a loop filter, a voltage-controlled oscillator, and a frequency divider; The input and output terminals of the loop filter are electrically connected to the output terminal of the phase detector and the input terminal of the voltage-controlled oscillator, respectively. The input and output terminals of the frequency divider are electrically connected to the output terminal of the voltage-controlled oscillator and the second input terminal of the phase detector, respectively. When the fundamental waveform is input to the first input terminal of the phase detector, the phase detector generates a first waveform containing phase difference characteristics based on the fundamental waveform and the output waveform of the frequency divider. The loop filter performs low-pass filtering on the first waveform to generate a phase difference characteristic waveform, and the voltage-controlled oscillator generates the frequency doubling waveform based on the phase difference characteristic waveform.
4. The harmonic amplitude extraction circuit according to claim 2, characterized in that, The multiplication circuit includes: an addition circuit, an exponentiation circuit, and two sets of logarithmic circuits; The outputs of the two logarithmic circuits are electrically connected to the two inputs of the adder circuit, and the output of the adder circuit is electrically connected to the input of the exponential circuit.
5. The harmonic amplitude extraction circuit according to claim 4, characterized in that, The logarithmic circuit includes: First operational amplifier, first transistor, first resistor, and second resistor; The first end of the first resistor is electrically connected to the collector of the first transistor and the inverting input of the first operational amplifier. The two ends of the second resistor are electrically connected to the non-inverting input of the first operational amplifier and ground, respectively. The base and emitter of the first transistor are electrically connected to ground and the output of the first operational amplifier, respectively.
6. The harmonic amplitude extraction circuit according to claim 4, characterized in that, The exponential circuit includes: The fourth operational amplifier, the third transistor, the ninth resistor, and the tenth resistor; The emitter of the third transistor is electrically connected to the first end of the ninth resistor and the inverting input of the fourth operational amplifier. The second end of the ninth resistor is electrically connected to the output of the fourth operational amplifier. The two ends of the tenth resistor are electrically connected to the non-inverting input of the fourth operational amplifier and ground, respectively. The base of the third transistor is electrically connected to the collector of the third transistor.
7. The harmonic amplitude extraction circuit according to claim 2, characterized in that, The second filter includes: a 51st resistor, a 52nd resistor, a 51st capacitor, and a 52nd capacitor; The second end of the fifty-first resistor is electrically connected to the first end of the fifty-first capacitor and the first end of the fifty-second resistor, respectively. The second end of the fifty-second resistor is electrically connected to the first end of the fifty-second capacitor. The second ends of the fifty-first capacitor and the fifty-second capacitor are grounded.
8. The harmonic amplitude extraction circuit according to any one of claims 1-7, characterized in that, The first filter includes: a fifth operational amplifier, a forty-first resistor, a forty-second resistor, a forty-third resistor, a forty-first capacitor, a forty-second capacitor, and a forty-third capacitor; The first terminal of the forty-first capacitor is electrically connected to the second terminal of the forty-first resistor, the first terminal of the forty-second resistor, and the first terminal of the forty-second capacitor. The second terminal of the forty-first capacitor is electrically connected to the inverting input terminal of the fifth operational amplifier and the first terminal of the forty-third resistor. The first terminal of the forty-third capacitor is electrically connected to the output terminal of the fifth operational amplifier, the second terminal of the forty-third resistor, and the second terminal of the forty-second capacitor; The non-inverting input terminal of the fifth operational amplifier and the second terminal of the forty-second resistor are grounded.