Test circuit capable of rapidly adjusting SiC Mosfet double-pulse switching speed

Abstract

The utility model relates to a test circuit capable of rapidly adjusting the speed of a SiC Mosfet double-pulse switch, which comprises a test circuit and a bus capacitor arranged on the test circuit, the bus capacitor is applied to the bus capacitor through bus voltage provided by a high-voltage source, an upper bridge element, a lower bridge element and an inductor L3 are respectively arranged on a parallel circuit of the bus capacitor, and the lower bridge element is connected with the inductor L3. The upper bridge element is composed of a SiC Mosfet and a signal source, the M1 end of the SiC Mosfet is kept closed, the lower bridge element is composed of a SiC Mosfet and a driving PCB used for controlling a semiconductor field effect transistor, an inductor L2, a resistor R1 and a signal control PWM are sequentially arranged on the driving PCB, and the M2 end of the SiC Mosfet silicon carbide metal oxide semiconductor field effect transistor serves as a switching tube. According to the utility model, on the premise that the layout of the power device module is not changed, the switching speed of the device is adjusted by changing the inductance connected between the driving plate and the grid loop of the power device module.

Description

Technical Field

[0001] This invention belongs to the field of power device testing technology, and relates to a test circuit that can quickly adjust the dual-pulse switching speed of SiC MOSFETs. Background Technology

[0002] In practical applications, SiC MOSFET power device modules have a very fast switching speed, which sometimes poses the risk of overvoltage failure and oscillation. Therefore, it is desirable to reduce the switching speed to suppress overvoltage and oscillation.

[0003] Sometimes, we want to reduce switching losses, lower the junction temperature, and improve the efficiency in practical applications. So, we might want to increase the switching speed to achieve even lower switching losses.

[0004] To address this issue, a test circuit was designed to rapidly adjust the dual-pulse switching speed of SiC MOSFETs, thereby overcoming the aforementioned problems. Utility Model Content

[0005] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a test circuit that is simple and reasonable in structure, stable in operation, and convenient to use, and can quickly adjust the speed of SiC MOSFET dual-pulse switching.

[0006] This utility model is achieved through the following technical solution: a test circuit for rapidly adjusting the switching speed of a SiC MOSFET dual-pulse transistor, comprising a test circuit and a bus capacitor disposed on the test circuit. The bus capacitor is supplied with a bus voltage from a high-voltage source. An upper bridge element, a lower bridge element, and an inductor L3 are respectively disposed on the parallel circuit of the bus capacitor. The upper bridge element consists of a SiC MOSFET and a signal source, with the M1 terminal of the SiC MOSFET kept closed. The lower bridge element consists of a SiC MOSFET and an inductor L3. The system consists of a silicon carbide metal-oxide-semiconductor field-effect transistor (MOSFET) and a gate circuit for controlling the MOSFET. An inductor L2, a resistor R1, and a PWM signal control circuit are sequentially arranged on the gate circuit. The M2 terminal of the MOSFET is used as a switch. A signal source is used to provide a dual-pulse drive signal VGS to the M2 terminal of the lower bridge element, thereby testing the switching characteristics of the M2 terminal of the lower bridge element and the reverse recovery characteristics of the M1 terminal of the upper bridge element.

[0007] Preferably, the signal source is a load inductor, and the two ends of the load inductor are connected in parallel with the M1 terminal of the SiC MOSFET.

[0008] Preferably, the inductor L2 is an adjustable inductor, used to change the switching speed of the SiC MOSFET by modifying the inductor on the drive PCB.

[0009] The beneficial effects of this utility model are as follows:

[0010] This invention adjusts the switching speed of the device by changing the inductance connecting the gate circuit of the driver board and the power device module without altering the layout of the power device module. It has the advantages of simple and reasonable structure, stable operation, and convenient use. Attached Figure Description

[0011] Figure 1 This is a circuit diagram (on) of the present invention.

[0012] Figure 2 This is a circuit diagram of the present invention (off). Detailed Implementation

[0013] To enable those skilled in the art to more clearly understand the purpose, technical solution and advantages of this utility model, the present utility model will be further described below in conjunction with the accompanying drawings and embodiments.

[0014] In the description of this utility model, it should be understood that the orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "inner", "outer", "horizontal", and "vertical" are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0015] The present invention will now be described in detail with reference to the accompanying drawings: Figure 1-2As shown, a test circuit for rapidly adjusting the switching speed of a SiC MOSFET dual-pulse transistor includes a test circuit 1 and a bus capacitor 2 mounted on the test circuit 1. The bus capacitor 2 is connected to a bus voltage 3 provided by a high-voltage source. The parallel circuit of the bus capacitor 2 includes an upper bridge element 4, a lower bridge element 5, and an inductor L3. The upper bridge element 4 consists of a SiC MOSFET and a signal source, with the M1 terminal of the SiC MOSFET kept closed. The lower bridge element 5 consists of a SiC MOSFET and a gate circuit for controlling the MOSFET. An inductor L2, a resistor R1, and a PWM signal control circuit are sequentially mounted on the gate circuit. The M2 terminal of the MOSFET silicon carbide metal oxide semiconductor field-effect transistor 6 is used as a switch. The signal source is used to provide a dual-pulse drive signal VGS to the M2 terminal of the lower bridge element 5, thereby testing the switching characteristics of the M2 terminal of the lower bridge element 5 and the reverse recovery characteristics of the M1 terminal of the upper bridge element 4.

[0016] The signal source is a load inductor 7, and the two ends of the load inductor 7 are connected in parallel with the M1 terminal of the SiC MOSFET field-effect transistor 6.

[0017] The inductor L2 is an adjustable inductor used to change the switching speed of the SiC MOSFET by modifying the inductor on the drive PCB.

[0018] This invention sets the inductor L2 as an adjustable inductor, allowing the switching speed of the SiC MOSFET to be changed directly by modifying the L2 inductor on the power board.

[0019] The principle behind the effect of gate circuit inductance on switching speed: Increasing the inductance of the circuit between the driver board and the gate will increase the gate current, which eventually stabilizes. The gate current reaches its maximum just before the module reaches Vgs(th). Before this point, the gate current also increases due to the increased inductance of the driver board and gate circuit, thus accelerating the switching speed. Conversely, decreasing the gate circuit inductance will reduce the switching speed.

[0020] The specific embodiments described herein are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A test circuit for rapidly adjusting the dual-pulse switching speed of a SiC MOSFET, comprising a test circuit (1) and a bus capacitor (2) disposed on the test circuit (1), wherein the bus capacitor (2) is connected to the bus capacitor (2) by a bus voltage (3) provided by a high-voltage source, characterized in that: The parallel circuit of the bus capacitor (2) is provided with an upper bridge element (4), a lower bridge element (5) and an inductor L3. The upper bridge element (4) is composed of a SiC MOSFET (6) and a signal source. The M1 terminal of the SiC MOSFET (6) is kept closed. The lower bridge element (5) is composed of a SiC MOSFET and a gate circuit for controlling the semiconductor field-effect transistor. An inductor L2, a resistor R1 and a signal control PWM are arranged in sequence on the gate circuit. The M2 terminal of the SiC MOSFET (6) is used as a switch. The signal source is used to provide a dual-pulse drive signal VGS to the M2 terminal of the lower bridge element (5) to test the switching characteristics of the M2 terminal of the lower bridge element (5) and the reverse recovery characteristics of the M1 terminal of the upper bridge element (4).

2. The test circuit for rapidly adjusting the dual-pulse switching speed of SiC MOSFET according to claim 1, characterized in that: The signal source is a load inductor (7), and the two ends of the load inductor (7) are connected in parallel with the M1 terminal of the SiC MOSFET (6).

3. The test circuit for rapidly adjusting the dual-pulse switching speed of SiC MOSFETs according to claim 1, characterized in that: The inductor L2 is an adjustable inductor used to change the switching speed of the SiC MOSFET by modifying the inductor on the drive PCB.

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