Multipath filtering output direct current voltage stabilizing circuit

Abstract

The utility model discloses a multipath filtering output DC voltage stabilizing circuit, and relates to the technical field of power supply. Comprising a power supply anti-reverse connection protection circuit, an overvoltage protection circuit, four DC / DC voltage stabilizing circuit outputs and an EMI filter circuit. The power supply anti-reverse connection protection circuit is connected with the DC input circuit and the overvoltage protection circuit. The overvoltage protection circuit is connected with the output of the power supply anti-reverse connection protection circuit and the output of the four DC / DC voltage stabilizing circuits; the outputs of the four DC / DC voltage stabilizing circuits are connected with the overvoltage protection circuit; the EMI filter circuit is respectively connected with the output of the four DC / DC voltage stabilizing circuits and the DC voltage stabilizing output port; the circuit can be controlled to output + 3.3 V, + 5V, + 12V and ADJ adjustable DC voltage; each path of voltage stabilization output is provided with an anti-reverse connection circuit, an overvoltage protection circuit and an EMI filter circuit; the problems of single output, no overvoltage protection and large direct-current output ripple pulsation of the voltage-stabilized power supply which is actually used at present are solved.

Description

Technical Field

[0001] This utility model relates to the field of power supply technology, and in particular to a multi-channel filtered output DC voltage regulator circuit. Background Technology

[0002] A DC regulated power supply module is an electronic device designed to convert an input DC voltage into a more stable and cleaner output voltage. It converts the input AC power to DC and provides a stable voltage at the output to meet the power quality requirements of electronic devices. It boasts advantages such as high reliability and balanced energy consumption, and thus holds a very important position in power supply technology.

[0003] The voltage regulator module is the most important and fundamental part of the entire circuit, providing a constant voltage source unaffected by power fluctuations. Currently, most diode-capacitor DC power supplies use a combination of capacitors and inductors for filtering at both the input and output ports, lacking effective overvoltage and reverse connection protection, and offering only single or dual-channel regulated output. Furthermore, due to the inherent characteristics of DC power supply circuits and external noise interference at both ends of switching power supplies, problems arise such as large output voltage ripple, inadequate circuit protection, and limited applicability.

[0004] Based on this, this utility model proposes a DC voltage regulator circuit with multiple outputs, a protection module, and low ripple, to solve the above-mentioned problems existing in the current diode capacitor DC power supply. Utility Model Content

[0005] In view of this, the main purpose of this utility model is to provide a multi-channel filtered output DC voltage regulator circuit to solve the problems of single output, lack of overvoltage protection, and large DC output ripple in current practical power supplies.

[0006] To achieve the above objectives, the technical solution of this utility model is implemented as follows:

[0007] A multi-channel filtered output DC voltage regulator circuit includes a reverse connection protection circuit, an overvoltage protection circuit, four DC / DC voltage regulator outputs, and an EMI filter circuit. The input terminal of the reverse connection protection circuit is connected to a DC input circuit, and its output terminal is connected to the overvoltage protection circuit. The input terminal of the overvoltage protection circuit is connected to the reverse connection protection circuit, and its output terminal is connected to the four DC / DC voltage regulator outputs. The input terminals of the four DC / DC voltage regulator outputs are connected to the output terminals of the overvoltage protection circuit, and include a +30V to +3.3V circuit, a +5V circuit, a +12V circuit, and a +ADJ adjustable circuit. The input terminals of the EMI filter circuit are connected to the outputs of the four DC / DC voltage regulator circuits, and its output terminal is connected to a DC voltage regulator output port.

[0008] In a preferred embodiment, the power supply reverse connection protection circuit is a DC input reverse connection protection circuit, including resistor R, resistor R1, transistor Q, diode D, and diode D1. Specifically, resistor R and resistor R1 are connected in series and then in parallel at the DC input terminal of the circuit. Resistor R is connected to the positive terminal of the DC input terminal. The gate of transistor Q is connected to the center node of the series connection of resistor R and resistor R1, and the source of transistor Q is connected to the other end of resistor R1. The drain of transistor Q is connected to the input terminal of diode D1. The output terminal of diode D is connected to the center node of the series connection of resistor R and resistor R1. The input terminal of diode D is connected to the other end of resistor R1 and the source of transistor Q. The input terminal of diode D1 is connected to the drain of transistor Q, and the output terminal of diode D1 is connected to the negative terminal of the DC input terminal.

[0009] In a preferred embodiment, the overvoltage protection circuit includes chip U1, chip U2, and chip U3; the IN pin of chip U1 is connected to the positive input terminals of capacitors C1 and C2, which are connected in parallel; the OUT pin of chip U1 is connected to the positive input terminals of capacitors C3 and C4, which are connected in parallel; the GND pin of chip U1 is connected to the inverting input terminals of capacitors C1, C2, C3, and C4, and GND is grounded; the positive input terminal of capacitor C1 is connected to VCC-INPUT, and the positive input terminal of capacitor C4 is connected to +5V.

[0010] In a preferred embodiment, the OUT pin of chip U2 is connected to the 1N- pin of chip U3; the + pin of chip U2 is connected to one end of capacitor C9 and connected to +5V; the other end of capacitor C9 is connected to the VCC pin of chip U3; the - pin of chip U2 is connected to the GND pin of chip U3; resistor R1 is connected to one end of resistor R2; the 1N+ pin of chip U3 is connected to the center node of resistor R1 and resistor R2; the 1OUT pin of chip U3 is connected to one end of capacitor C8; one end of resistor R3 is connected to resistor R4 and capacitor C8; the other end of resistor R4 is connected to the gate of transistor Q1; the anode of transistor Q1 is connected to pin 2 of Switch1; the cathode of transistor Q1 is connected to resistor R5; and the other end of resistor R5... One end is connected to diode D1, the other end of diode D1 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to pin T2 of resistor Re and inductor Lay, the emitter of transistor Q2 is connected to resistor R6, the other end of resistor R6 is connected to one end of inductor L4, the other end of inductor L4 is connected to the inverting input of diode D2, the other end of diode D2 is connected to resistor R7, the other end of resistor R7 is connected to pin 3 of Switch2, the T1 end of Switch2, resistor Re and inductor Lay is connected to +5V, pin 1 of Switch2 is connected to VCC-INPUT, one end of resistor R1 is connected to VCC-INPUT, and pin 1 of Switch1 is connected to +5V.

[0011] In a preferred embodiment, the +3.3V voltage regulator circuit includes a chip U1. The VIN pin of the chip U1 is connected to the positive input terminals of capacitors C14 and C15, and the OUTPUT pin is connected to the negative input terminal of diode D9. The other end of diode D9 is connected to one end of inductor L1, and the other end of inductor L1 is connected to the positive input terminals of capacitors C16 and C17. The FEEDBA capacitor CK, ON / OFF, GND, and TAB pins of the chip U1 are connected to VCC-GND. The positive input terminals of capacitors C14 and C15 are connected to VCC-INPUT, and the positive input terminals of capacitors C16 and C17 are connected to VCC-3.3V.

[0012] In a preferred embodiment, the +5V voltage regulator circuit includes a chip U2. The VIN pin of the chip U2 is connected to the positive input terminal of capacitors C18 and C19, and the OUTPUT pin is connected to the negative input terminal of diode D10. The other end of diode D10 is connected to one end of inductor L2, and the other end of inductor L2 is connected to the positive input terminal of capacitors C20 and C21. The FEEDBA capacitor CK, ON / OFF, GND, and TAB of U2 are connected to VCC-GND. The positive input terminals of capacitors C18 and C19 are connected to VCC-INPUT, and the positive input terminals of capacitors C20 and C21 are connected to VCC-5V.

[0013] In a preferred embodiment, the +12V voltage regulator circuit includes a chip U3. The VIN pin of the chip U3 is connected to the positive input terminal of capacitors C22 and C23, and the OUTPUT pin is connected to the negative input terminal of diode D11. The other end of diode D11 is connected to one end of inductor L3, and the other end of inductor L3 is connected to the positive input terminal of capacitors C24 and C25. The FEEDBA, CK, ON / OFF, GND, and TAB pins of U3 are connected to VCC-GND. The positive input terminals of capacitors C22 and C23 are connected to VCC-INPUT, and the positive input terminals of capacitors C24 and C25 are connected to VCC-12V.

[0014] In a preferred embodiment, the ADJ adjustable voltage regulator circuit includes a chip U4. The VIN pin of the chip U4 is connected to the positive input terminal of capacitors C26 and C27, the OUTPUT pin is connected to the negative input terminal of diode D12, the other end of diode D12 is connected to one end of inductor L4, the other end of inductor L4 is connected to the positive input terminal of capacitors C28 and C29, one end of resistor R15 is connected to the center node of capacitors C28 and C29, the FEEDBA capacitor CK, ON / OFF, GND and TAB of the chip U4 are connected to VCC-GND, the positive input terminals of capacitors C26 and C27 are connected to VCC-INPUT, and the positive input terminals of capacitors C28 and C29 are connected to VCC-ADJ.

[0015] In a preferred embodiment, the EMI filter circuit includes an inductor L1, one end of which is connected to one end of a capacitor C10, one end of which is connected to the upper left pin of the inductor L, one end of an inductor L2 is connected to the other end of a capacitor C10, the other end of which is connected to the lower left pin of the inductor L, the upper right pin of the inductor L is connected to one end of a capacitor C11, the lower right pin of the inductor L is connected to one end of a capacitor C12, one end of which is connected to one end of a capacitor C11, one end of which is connected to the other end of a capacitor C12, one end of which is connected to one end of a capacitor C11, one end of which is connected to the other end of a capacitor C12, one end of the inductor L1 is connected to VCC, one end of the inductor L2 is connected to VCC-GND, one end of the capacitor C is connected to VCC-OUT, the other end of which is connected to VCC-GND, pin 1 of the switch is connected to VCC, pin 2 is connected to VCC-3.3V, pin 3 is connected to VCC-5V, pin 4 is connected to VCC-12V, and pin 5 is connected to VCC-ADJ.

[0016] In a preferred embodiment, the multi-channel filtered output DC voltage regulator circuit further includes six inductor LED indicator lights.

[0017] Compared with the prior art, this utility model provides a multi-channel filtered output DC voltage regulator circuit, which has the following beneficial effects:

[0018] 1. By incorporating reverse polarity protection circuits, overvoltage protection circuits, four-channel DC / DC voltage regulation circuits, and EMI filtering circuits, the circuit can control the output of +3.3V, +5V, +12V, and ADJ adjustable DC voltages. Each regulated output channel has corresponding reverse polarity protection, overvoltage protection, and EMI filtering circuits, resulting in low output ripple and a small output load variation rate. This solves the problems of single output, lack of overvoltage protection, and large DC output ripple in current practical power supplies.

[0019] 2. Meanwhile, this multi-channel filtered output DC voltage regulator circuit uses a full surface mount soldering process design, which helps with chain production and improves production efficiency. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0021] Figure 1 This is a structural block diagram of the multi-channel DC regulated output power supply module provided by this utility model;

[0022] Figure 2This is a structural diagram of the DC input reverse polarity protection circuit provided by this utility model;

[0023] Figure 3 This is a structural diagram of the DC input overvoltage protection circuit provided by this utility model;

[0024] Figure 4 This is a structural diagram of the +3.3V voltage regulator circuit provided by this utility model;

[0025] Figure 5 This is a structural diagram of the +5V voltage regulator circuit provided by this utility model;

[0026] Figure 6 This is a structural diagram of the +12V voltage regulator circuit provided by this utility model;

[0027] Figure 7 This is a structural diagram of the ADJ adjustable voltage regulator circuit provided by this utility model;

[0028] Figure 8 This is a structural diagram of the EMI filter circuit provided by this utility model;

[0029] Figure 9 This is a structural diagram of the 6-channel inductive LED indicator circuit provided by this utility model. Detailed Implementation

[0030] The circuit structure of the multi-channel filter output DC voltage regulator circuit will be further described in detail below with reference to the accompanying drawings and embodiments of the present invention.

[0031] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0032] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments as described in this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0033] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0034] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0035] The following is in conjunction with the instruction manual appendix. Figures 1-9 This invention describes the multi-channel filtered output DC voltage regulator circuit.

[0036] like Figure 1 As shown, Figure 1 This is a block diagram of the multi-channel filtered output DC voltage regulator circuit. The multi-channel filtered output DC voltage regulator circuit includes: a reverse connection protection circuit, an overvoltage protection circuit, four DC / DC voltage regulator outputs, and an EMI filter circuit; wherein:

[0037] The power supply reverse connection protection circuit is connected to the DC input and overvoltage protection circuit respectively;

[0038] The overvoltage protection circuit is connected to the power reverse connection protection circuit and the output of the four-channel DC / DC voltage regulator circuit respectively.

[0039] The four-channel DC / DC voltage regulator circuit outputs include a +30V to +3.3V circuit, a +5V circuit, a +12V circuit, and a +ADJ adjustable circuit;

[0040] The EMI filter circuit is connected to the output of four DC / DC voltage regulator circuits and the DC voltage regulator output port, respectively.

[0041] It should be noted that, through the above-mentioned reverse connection protection circuit, overvoltage protection circuit, four-channel DC / DC voltage regulator output circuit and EMI filter circuit, each voltage regulator output has corresponding reverse connection protection, overvoltage protection and EMI filter circuit, resulting in small output ripple and small output load change rate, solving the problems of single output, lack of overvoltage protection and large DC output ripple in current practical use of voltage regulators.

[0042] In a preferred embodiment, such as Figure 2 As shown, Figure 2 This is a structural diagram of a power supply reverse connection protection circuit. This circuit is a DC input reverse connection protection circuit, implemented based on the simple conduction characteristics of an NMOS transistor. It includes a resistor R, a resistor R1, a transistor Q, a diode D, and a diode D1. Specifically, resistors R and R1 are connected in series and then in parallel at the DC input terminal of the circuit. Resistor R is connected to the positive terminal of the DC input terminal. The gate of transistor Q is connected to the center node of the series connection between resistors R and R1, and the source of transistor Q is connected to the other end of resistor R1. The drain of transistor Q is connected to the input terminal of diode D1. The output terminal of diode D is connected to the center node of the series connection between resistors R and R1, and the input terminal of diode D is connected to the other end of resistor R1 and the source of transistor Q. The input terminal of diode D1 is connected to the drain of transistor Q, and the output terminal of diode D1 is connected to the negative terminal of the DC input terminal. Figure 2 The aforementioned power supply reverse connection protection circuit is designed to protect the internal circuit from damage caused by operator error in reversing the positive and negative terminals of the power supply. For example, when the operator reverses the positive and negative terminals of VCC-INPUT, the diode D is in a reverse connection state and the NMOS transistor is not conducting, thus preventing the input current from forming a loop. Consequently, the circuit is in an open circuit state, effectively protecting the circuit.

[0043] In a preferred embodiment, such as Figure 3 As shown, Figure 3 This is a structural diagram of a DC input overvoltage protection circuit, including chip U1, chip U2, and chip U3; where:

[0044] The chip U1 is an LM7805. The IN pin of chip U1 is connected to the positive input terminal of capacitors C1 and C2, which are connected in parallel. The OUT pin of chip U1 is connected to the positive input terminal of capacitors C3 and C4, which are connected in parallel. The GND pin of chip U1 is connected to the inverting input terminal of capacitors C1, C2, C3, and C4, and GND is grounded. The positive input terminal of capacitor C1 is connected to VCC-INPUT, and the positive input terminal of capacitor C4 is connected to +5V.

[0045] Chip U2 is an LM358, and chip U3 is an LM2903. The OUT pin of chip U2 is connected to the 1N- pin of chip U3. The + pin of chip U2 is connected to one end of capacitor C9 and connected to +5V. The other end of capacitor C9 is connected to the VCC pin of chip U3. The - pin of chip U2 is connected to the GND pin of chip U3. Resistor R1 is connected to one end of resistor R2. The 1N+ pin of chip U3 is connected to the center node of resistor R1 and resistor R2. The 1OUT pin of chip U3 is connected to one end of capacitor C8. One end of resistor R3 is connected to resistor R4 and capacitor C8. The other end of resistor R4 is connected to the gate of transistor Q1. The anode of transistor Q1 is connected to pin 2 of Switch1. The cathode of transistor Q1 is connected to resistor R... 5. Connect the other end of resistor R5 to diode D1. Connect the other end of diode D1 to the base of transistor Q2. Connect the collector of transistor Q2 to pin T2 of relay Relay. Connect the emitter of transistor Q2 to resistor R6. Connect the other end of resistor R6 to one end of inductor L4. Connect the other end of inductor L4 to the inverting input of diode D2. Connect the other end of diode D2 to resistor R7. Connect the other end of resistor R7 to pin 3 of Switch2. Connect Switch2 and T1 of relay Relay to +5V. Connect pin 1 of Switch2 to VCC-INPUT. Connect one end of resistor R1 to VCC-INPUT. Connect pin 1 of Switch1 to +5V. Figure 3 The aforementioned DC input overvoltage protection circuit aims to protect components from damage when the external input voltage VCC-INPUT exceeds the voltage threshold of the entire circuit. For example, when the VCC-INPUT input voltage, after being divided by resistors R1 and R2, is input to the reference voltage of chip U3, exceeding the voltage reference value set by chip U3, thyristor Q1 conducts, the thyristor conduction indicator D1 illuminates, and thyristor Q2-NPN conducts. At this time, the relay operates, activating Switch2 to disconnect the VCC-INPUT input voltage. Subsequently, the DC regulated input indicator turns off, thus providing overvoltage protection for the subsequent voltage regulation circuit.

[0046] In a preferred embodiment, such as Figure 4 As shown, Figure 4The diagram shows the structure of a +3.3V voltage regulator circuit. The +3.3V voltage regulator circuit includes a chip U1, which is an LM2596S-3.3V. The VIN pin of chip U1 is connected to the positive input terminals of capacitors C14 and C15, and the OUTPUT pin is connected to the negative input terminal of diode D9. The other end of diode D9 is connected to one end of inductor L1, and the other end of inductor L1 is connected to the positive input terminals of capacitors C16 and C17. The FEEDBA, CK, ON / OFF, GND, and TAB pins of chip U1 are connected to VCC-GND. The positive input terminals of capacitors C14 and C15 are connected to VCC-INPUT, and the positive input terminals of capacitors C16 and C17 are connected to VCC-3.3V. Figure 4 The +3.3V voltage regulator circuit is designed to convert the VCC-INPUT DC input voltage, after reverse connection protection and overvoltage protection, into a standard +3.3V DC voltage. For example, when the DC voltage is input, it passes through capacitors C14 and C15 for input filtering, then through the voltage regulator chip and output through the OUTPUT port. After further filtering and regulation by Zener diode D9, a simple LC filter circuit with capacitor C16, inductor L1, and capacitor C17, the output voltage is VCC-3.3V.

[0047] like Figure 5 As shown, Figure 5 The diagram shows the structure of a +5V voltage regulator circuit. The +5V voltage regulator circuit includes a chip U2, which is an LM2596S-5V. The VIN pin of chip U2 is connected to the positive input terminal of capacitors C18 and C19, and the OUTPUT pin is connected to the negative input terminal of diode D10. The other end of diode D10 is connected to one end of inductor L2, and the other end of inductor L2 is connected to the positive input terminal of capacitors C20 and C21. The FEEDBA, CK, ON / OFF, GND, and TAB pins of U2 are connected to VCC-GND. The positive input terminals of capacitors C18 and C19 are connected to VCC-INPUT, and the positive input terminals of capacitors C20 and C21 are connected to VCC-5V. Figure 5 The +5V voltage regulator circuit described herein is designed to convert the VCC-INPUT DC input voltage, after reverse connection protection and overvoltage protection, into a standard +5V DC voltage. For example, when the DC voltage is input, it will be filtered by capacitors C18 and C19, then output through the OUTPUT port after passing through the voltage regulator chip. After further filtering and regulation by Zener diode D10, a simple LC filter circuit with capacitor C20, inductor L2, and capacitor C21, the output voltage is VCC-5V.

[0048] like Figure 6 As shown, Figure 6The diagram shows the structure of a +12V voltage regulator circuit. The +12V voltage regulator circuit includes a chip U3, which is an LM2596S-12V. The VIN pin of chip U3 is connected to the positive input terminals of capacitors C22 and C23, and the OUTPUT pin is connected to the negative input terminal of diode D11. The other end of diode D11 is connected to one end of inductor L3, and the other end of inductor L3 is connected to the positive input terminals of capacitors C24 and C25. The FEEDBA, CK, ON / OFF, GND, and TAB pins of U3 are connected to VCC-GND. The positive input terminals of capacitors C22 and C23 are connected to VCC-INPUT, and the positive input terminals of capacitors C24 and C25 are connected to VCC-12V. Figure 6 The +12V voltage regulator circuit described herein is designed to convert the VCC-INPUT DC input voltage, after reverse connection protection and overvoltage protection, into a standard +12V DC voltage. For example, when the DC voltage is input, it will be filtered by capacitors C22 and C23, then output through the OUTPUT port after passing through the voltage regulator chip. Finally, after filtering and regulation by Zener diode D11, a simple LC filter circuit with capacitor C24, inductor L3, and capacitor C25, the output voltage is VCC-12V.

[0049] like Figure 7 As shown, Figure 7 The diagram shows the structure of the ADJ adjustable voltage regulator circuit. The ADJ adjustable voltage regulator circuit includes chip U4, which is an LM2596S-ADJ. The VIN pin of chip U4 is connected to the positive input terminal of capacitors C26 and C27, and the OUTPUT pin is connected to the negative input terminal of diode D12. The other end of diode D12 is connected to one end of inductor L4, and the other end of inductor L4 is connected to the positive input terminal of capacitors C28 and C29. One end of resistor R15 is connected to the center node of capacitors C28 and C29. The FEEDBA, CK, ON / OFF, GND, and TAB pins of chip U4 are connected to VCC-GND. The positive input terminals of capacitors C26 and C27 are connected to VCC-INPUT, and the positive input terminals of capacitors C28 and C29 are connected to VCC-ADJ. Figure 7 The ADJ adjustable voltage regulator circuit is designed to convert the VCC-INPUT DC input voltage, after reverse connection protection and overvoltage protection, into a standard ADJ DC voltage. For example, when a DC voltage is input, it is filtered by capacitors C26 and C27, then output through the OUTPUT port after passing through the voltage regulator chip. Finally, after filtering and regulation by Zener diode D12, a simple LC filter circuit with capacitor C28, inductor L4, and capacitor C29, the output voltage is VCC-ADJ.

[0050] In a preferred embodiment, such as Figure 8 As shown, Figure 8This is a structural diagram of an EMI filter circuit. The EMI filter circuit includes an inductor L1. One end of inductor L1 is connected to one end of capacitor C10. One end of capacitor C10 is connected to the upper left pin of inductor L. One end of inductor L2 is connected to the other end of capacitor C10. The other end of capacitor C10 is connected to the lower left pin of inductor L. The upper right pin of inductor L is connected to one end of capacitor C11. The lower right pin of inductor L is connected to one end of capacitor C12. One end of capacitor C11 is connected to one end of capacitor C. One end of capacitor C12 is connected to the other end of capacitor C. One end of inductor L1 is connected to VCC. One end of inductor L2 is connected to VCC-GND. One end of capacitor C is connected to VCC-OUT. The other end of capacitor C is connected to VCC-GND. Pin 1 of Switch is connected to VCC. Pin 2 is connected to VCC-3.3V. Pin 3 is connected to VCC-5V. Pin 4 is connected to VCC-12V. Pin 5 is connected to VCC-ADJ. Figure 8 The EMI filtering circuit is designed to perform EMI filtering on the DC output voltages VCC-3.3V, VCC-5V, VCC-12V, and VCC-ADJ, which have undergone reverse connection protection, overvoltage protection, and voltage regulation. For example, connect pins 2-5 of the Switch to VCC-3.3V, VCC-5V, VCC-12V, and VCC-ADJ respectively. To use the required DC voltage, simply toggle the Switch pin to the corresponding position. For instance, if a standard +3.3V DC voltage is required, toggle the Switch to pin 2. This +3.3V voltage is then filtered by differential-mode filtering through inductors L1 and L2, common-mode filtering through inductor L, and finally filtered by ceramic capacitors C11 and C12 before being regulated by the output capacitor C before being output. This is just an example of a +3.3V output; other output scenarios are similar.

[0051] In a preferred embodiment, the above six circuit diagrams are integrated to form a multi-channel DC regulated output power supply module. In addition to the above-mentioned reverse polarity protection circuit, overvoltage protection circuit, four-channel DC / DC voltage regulation circuit output, and EMI filter circuit, this multi-channel DC regulated output power supply module also includes six inductor LED indicator lights. The circuit structure of the six inductor LED indicator lights is as follows: Figure 9 As shown, in Figure 9In the diagram, the forward input terminal of diode D3 is connected to VCC-INPUT, the reverse input terminal of diode D3 is connected to resistor R8, and the other end of resistor R8 is connected to GND. The forward input terminal of diode D4 is connected to VCC-OUT-3.3V; the reverse input terminal of diode D4 is connected to resistor R9, and the other end of resistor R9 is connected to VCC-GND. The forward input terminal of diode D5 is connected to VCC-OUT-5V, the reverse input terminal of diode D5 is connected to resistor R10, and the other end of resistor R10 is connected to VCC-GND. The forward input terminal of diode D6 is connected to VCC-OUT-12V, the reverse input terminal of diode D6 is connected to resistor R11, and the other end of resistor R11 is connected to VCC-GND. The forward input terminal of diode D7 is connected to VCC-OUT-ADJ, the reverse input terminal of diode D7 is connected to resistor R12, and the other end of resistor R12 is connected to VCC-GND. The forward input terminal of diode D8 is connected to +5V, the reverse input terminal of diode D8 is connected to resistor R13, and the other end of resistor R13 is connected to GND.

[0052] It should be noted that, of the above 6 inductive LED input terminals, the first channel is connected to VCC-INPUT, the second, third, fourth and fifth channels are connected to the voltages processed by the EMI filter circuit: VCC-OUT-3.3V, VCC-OUT-5V, VCC-OUT-12V, and VCC-OUT-ADJ, respectively, and the sixth channel is connected to the +5V voltage processed by the LM7805. Figure 9 The aforementioned 6-channel inductor LED indicator circuit is designed to visually display the input voltage VCC-INPUT, the output voltage VCC-OUT after passing through reverse connection protection, overvoltage protection, voltage regulation circuit, and EMI filtering, as well as the +5V output voltage of the LM7805.

[0053] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the scope of protection of the present utility model.

Claims

1. A multi-channel filtered output DC voltage regulator circuit, characterized in that: It includes a reverse connection protection circuit, an overvoltage protection circuit, four DC / DC voltage regulator outputs, and an EMI filter circuit. The input terminal of the reverse connection protection circuit is connected to the DC input circuit, and the output terminal is connected to the overvoltage protection circuit. The input terminal of the overvoltage protection circuit is connected to the reverse connection protection circuit, and the output terminal is connected to the four DC / DC voltage regulator outputs. The input terminals of the four DC / DC voltage regulator outputs are connected to the output terminals of the overvoltage protection circuit, including a 30V to +3.3V circuit, a +5V circuit, a +12V circuit, and a +ADJ adjustable circuit. The input terminals of the EMI filter circuit are connected to the output terminals of the four DC / DC voltage regulator circuits, and the output terminal is connected to the DC voltage regulator output port.

2. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The power supply reverse connection protection circuit is a DC input reverse connection protection circuit, which is based on the simple conduction characteristics of an NMOS transistor. It includes a resistor R, a resistor R1, a transistor Q, a diode D, and a diode D1. Specifically, the resistors R and R1 are connected in series and then in parallel at the DC input terminal of the circuit. The resistor R is connected to the positive terminal of the DC input terminal. The gate of the transistor Q is connected to the center node of the series connection of the resistors R and R1, and the source of the transistor Q is connected to the other end of the resistor R1. The drain of the transistor Q is connected to the input terminal of the diode D1. The output terminal of the diode D is connected to the center node of the series connection of the resistors R and R1. The input terminal of the diode D is connected to the other end of the resistor R1 and the source of the transistor Q. The input terminal of the diode D1 is connected to the drain of the transistor Q, and the output terminal of the diode D1 is connected to the negative terminal of the DC input terminal.

3. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The overvoltage protection circuit includes chips U1, U2, and U3. The IN pin of chip U1 is connected to the positive input terminals of capacitors C1 and C2, which are connected in parallel. The OUT pin of chip U1 is connected to the positive input terminals of capacitors C3 and C4, which are connected in parallel. The GND pin of chip U1 is connected to the inverting input terminals of capacitors C1, C2, C3, and C4, and GND is grounded. The positive input terminal of capacitor C1 is connected to VCC-INPUT, and the positive input terminal of capacitor C4 is connected to +5V.

4. The multi-channel filtered output DC voltage regulator circuit as described in claim 3, characterized in that: The OUT pin of chip U2 is connected to the 1N- pin of chip U3. The + pin of chip U2 is connected to one end of capacitor C9 and connected to +5V. The other end of capacitor C9 is connected to the VCC of chip U3. The - pin of chip U2 is connected to the GND of chip U3. Resistor R1 is connected to one end of resistor R2. The 1N+ pin of chip U3 is connected to the center node of resistor R1 and resistor R2. The 1OUT pin of chip U3 is connected to one end of capacitor C8. One end of resistor R3 is connected to resistor R4 and capacitor C8. The other end of resistor R4 is connected to the gate of transistor Q1. The anode of transistor Q1 is connected to pin 2 of Switch1. The cathode of transistor Q1 is connected to resistor R5. The other end of resistor R5 is connected to diode. D1, the other end of diode D1 is connected to the base of transistor Q2. The collector of transistor Q2 is connected to pin T2 of resistor Re and inductor Lay. The emitter of transistor Q2 is connected to resistor R6. The other end of resistor R6 is connected to one end of inductor L4. The other end of inductor L4 is connected to the inverting input of diode D2. The other end of diode D2 is connected to resistor R7. The other end of resistor R7 is connected to pin 3 of Switch2. Switch2, resistor Re, and inductor Lay's pin T1 are connected to +5V. Switch2's pin 1 is connected to VCC-INPUT. One end of resistor R1 is connected to VCC-INPUT. Switch1's pin 1 is connected to +5V.

5. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The +3.3V circuit includes chip U1. The VIN pin of chip U1 is connected to the positive input terminal of capacitors C14 and C15, and the OUTPUT pin is connected to the negative input terminal of diode D9. The other end of diode D9 is connected to one end of inductor L1, and the other end of inductor L1 is connected to the positive input terminal of capacitors C16 and C17. The FEEDBA capacitor CK, ON / OFF, GND, and TAB of chip U1 are connected to VCC-GND. The positive input terminals of capacitors C14 and C15 are connected to VCC-INPUT, and the positive input terminals of capacitors C16 and C17 are connected to VCC-3.3V.

6. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The +5V circuit includes chip U2. The VIN pin of chip U2 is connected to the positive input terminal of capacitors C18 and C19, and the OUTPUT pin is connected to the negative input terminal of diode D10. The other end of diode D10 is connected to one end of inductor L2, and the other end of inductor L2 is connected to the positive input terminal of capacitors C20 and C21. The FEEDBA capacitor CK, ON / OFF, GND, and TAB of U2 are connected to VCC-GND. The positive input terminals of capacitors C18 and C19 are connected to VCC-INPUT, and the positive input terminals of capacitors C20 and C21 are connected to VCC-5V.

7. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The +12V circuit includes chip U3. The VIN pin of chip U3 is connected to the positive input terminal of capacitors C22 and C23, and the OUTPUT pin is connected to the negative input terminal of diode D11. The other end of diode D11 is connected to one end of inductor L3, and the other end of inductor L3 is connected to the positive input terminal of capacitors C24 and C25. The FEEDBA capacitor CK, ON / OFF, GND, and TAB of U3 are connected to VCC-GND. The positive input terminals of capacitors C22 and C23 are connected to VCC-INPUT, and the positive input terminals of capacitors C24 and C25 are connected to VCC-12V.

8. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The ADJ adjustable circuit includes chip U4. The VIN pin of chip U4 is connected to the positive input terminal of capacitors C26 and C27, and the OUTPUT pin is connected to the negative input terminal of diode D12. The other end of diode D12 is connected to one end of inductor L4, and the other end of inductor L4 is connected to the positive input terminal of capacitors C28 and C29. One end of resistor R15 is connected to the center node of capacitors C28 and C29. The FEEDBA capacitor CK, ON / OFF, GND and TAB of chip U4 are connected to VCC-GND. The positive input terminals of capacitors C26 and C27 are connected to VCC-INPUT, and the positive input terminals of capacitors C28 and C29 are connected to VCC-ADJ.

9. The multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The EMI filter circuit includes an inductor L1, one end of which is connected to one end of a capacitor C10. One end of the capacitor C10 is connected to the upper left pin of the inductor L. One end of an inductor L2 is connected to the other end of the capacitor C10. The other end of the capacitor C10 is connected to the lower left pin of the inductor L. The upper right pin of the inductor L is connected to one end of a capacitor C11. The lower right pin of the inductor L is connected to one end of a capacitor C12. One end of the capacitor C11 is connected to one end of the capacitor C. One end of the capacitor C12 is connected to the other end of the capacitor C. One end of the inductor L1 is connected to VCC. One end of the inductor L2 is connected to VCC-GND. One end of the capacitor C is connected to VCC-OUT. The other end of the capacitor C is connected to VCC-GND. Pin 1 of the Switch is connected to VCC. Pin 2 is connected to VCC-3.3V. Pin 3 is connected to VCC-5V. Pin 4 is connected to VCC-12V. Pin 5 is connected to VCC-ADJ.

10. A multi-channel filtered output DC voltage regulator circuit as described in claim 1, characterized in that: The multi-channel filtered output DC voltage regulator circuit also includes 6 inductor LED indicator lights.

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