Signal generation device, quantum calculation measurement and control system and quantum computer
By combining a frequency upsampling module, DDS, and mixer, along with filters and voltage regulators, the problem of insufficient measurement and control signal quality in quantum computers was solved, resulting in more stable and accurate measurement and control signal output, reduced spurious signals, and improved measurement and control accuracy of quantum chips.
Patent Information
- Application Number
- CN202423219585.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2034-12-24
AI Technical Summary
In existing technologies, the quality of measurement and control signals for quantum computers is insufficient, especially the high level of spurious signals, which leads to insufficient accuracy in the measurement and control of quantum chips.
The method combines a frequency upsampling module, DDS and mixer to increase the signal frequency in stages, and uses the integer mode of the phase-locked loop module to output the measurement and control signal. At the same time, filters and voltage regulators are introduced to reduce spurious signals and ensure signal quality.
It improves the stability and accuracy of measurement and control signals, reduces spurious signals, and enhances the measurement and control performance of quantum chips.
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Figure CN223566077U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to quantum computer technical field, in particular to a signal generating device, quantum computing measurement and control system and quantum computer. BACKGROUND
[0002] Quantum computer is a kind of physical device that carries out high-speed mathematical and logic operation, storage and processing quantum information in compliance with quantum mechanics law;It is mainly composed of quantum measurement and control system, quantum chip system, quantum computing environment support system and quantum computer operating system. Among them, the quantum measurement and control system includes signal generating device, for providing measurement and control signal for each quantum bit in quantum chip, in order to improve the accuracy of quantum chip measurement and control, the quality of measurement and control signal needs to be improved, for example, the quality of signal can be improved by reducing the stray of measurement and control signal generated by signal generating device.
[0003] It should be noted that the information disclosed in the background section of the present application is only intended to deepen the understanding of the general background of the present application, and should not be regarded as acknowledging or implying in any form that the information constitutes prior art known to those skilled in the art. UTILITY MODEL CONTENT
[0004] The utility model aims at providing a kind of signal generating device, quantum computing measurement and control system and quantum computer, can produce low stray measurement and control signal, improve the accuracy of quantum chip measurement and control.
[0005] In order to achieve the above-mentioned purpose, the utility model provides the following technical scheme:
[0006] The utility model provides a kind of signal generating device in the first aspect, comprising:
[0007] Frequency up-regulation module, for being based on the 100MHz reference clock signal received, output frequency higher than the first signal and the second signal of 100MHz;
[0008] DDS, for being based on the first signal, output frequency lower than the third signal of the first signal;
[0009] Mixer, for being based on the third signal and the second signal, output fourth signal, the frequency of the fourth signal is equal to the difference of the second signal and the third signal;
[0010] Phase-locked loop module, for being based on the fourth signal, output measurement and control signal;
[0011] The frequency of the measurement and control signal is an integer multiple of the frequency of the fourth signal.
[0012] The signal generating device as described above, further comprising a first surface acoustic wave filter, configured to filter the fourth signal and output the filtered fourth signal to the phase-locked loop module.
[0013] And / or, a low-pass filter, configured to filter the third signal and output the filtered third signal to the frequency mixer.
[0014] The signal generating device as described above, wherein the frequency up-conversion module comprises:
[0015] An amplifier, configured to receive a 100MHz reference clock signal and perform power amplification on the reference clock signal;
[0016] A frequency multiplication element, connected to an output end of the amplifier, configured to receive the power-amplified signal and perform frequency multiplication on the power-amplified signal to output a first signal and a second signal with a frequency higher than 100MHz.
[0017] The signal generating device as described above, further comprising:
[0018] A second surface acoustic wave filter, electrically connected between the frequency multiplication element and the DDS, configured to receive the first signal, perform filtering on the first signal, and output the filtered first signal to the DDS;
[0019] And / or, a third surface acoustic wave filter, electrically connected between the frequency multiplication element and the frequency mixer, configured to receive the second signal, perform filtering on the second signal, and output the filtered second signal to the frequency mixer.
[0020] The signal generating device as described above, wherein the DDS has a frequency control word with a length greater than or equal to 48 bits.
[0021] The signal generating device as described above, wherein the loop filter in the phase-locked loop module comprises a passive loop filter.
[0022] The signal generating device as described above, further comprising a linear voltage regulator, electrically connected between an electrical device in the phase-locked loop module and a power supply, configured to provide a stable output voltage to the electrical device.
[0023] The signal generating device as described above, wherein the electrical device is electrically connected to a filter capacitor at a power supply pin.
[0024] The utility model discloses a second aspect provides a kind of quantum computing measurement and control system, comprising above-mentioned signal generating device, the signal generating device is used to output measurement and control signal to quantum chip.
[0025] The utility model discloses a third aspect provides a kind of quantum computer, including above-mentioned quantum computing measurement and control system and quantum chip, the quantum chip operates quantum computing task according to the measurement and control signal provided by the quantum computing measurement and control system.
[0026] The utility model has the advantages that:
[0027] The signal generating device of the present application uses a 100MHz clock signal as a reference signal, and after processing by a frequency up-modulation module, the signal frequency is initially increased, outputting a first signal and a second signal with higher frequencies. Then, a fourth signal is generated by combining DDS and a frequency mixer, and the fourth signal is used as the input signal of a phase-locked loop module. The signal frequency is increased again by the phase-locked loop module, and the required measurement and control signal is output. By increasing the frequency in steps, the measurement and control signal is more stable. By setting the DDS and frequency mixer combination, the frequency of the fourth signal can be accurately controlled so that the frequency of the measurement and control signal is an integer multiple of the frequency of the fourth signal. Therefore, only the integer mode of the phase-locked loop module is used, which has the function of reducing spurious signals.
[0028] The quantum computing measurement and control system and the quantum computer provided by the utility model both include the above-mentioned signal generating device, so they have the same beneficial effects, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS
[0029] Figure 1 Structure diagram of the signal generating device provided by the utility model Figure 1 ;
[0030] Figure 2 Structure diagram of the signal generating device provided by the utility model Figure 2 ;
[0031] Figure 3 Structure diagram of the signal generating device provided by the utility model Figure 3 ;
[0032] In the drawing, 10 is a frequency up-modulation module; 11 is an amplifier; 12 is a frequency multiplication element; 13 is a second acoustic filter; 14 is a third acoustic filter; 20 is DDS; 30 is a frequency mixer; 40 is a phase-locked loop module; 50 is a low-pass filter; and 60 is a first acoustic filter. DETAILED DESCRIPTION
[0033] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of this application. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0034] In the description of this utility model, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0035] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0036] Figure 1 Schematic diagram of the signal generating device provided in the embodiments of this utility model Figure 1 ;like Figure 1 As shown: This application provides a signal generating apparatus, including:
[0037] The frequency upsampling module 10 is used to output a first signal and a second signal with a frequency higher than 100MHz based on the received 100MHz reference clock signal.
[0038] The DDS20 (Direct Digital Frequency Synthesizer) is used to output a third signal with a frequency lower than that of the first signal, based on the first signal.
[0039] Mixer 30 is used to output a fourth signal based on the third signal and the second signal, the frequency of the fourth signal being equal to the difference between the second signal and the third signal.
[0040] Phase-locked loop module 40 is used to output measurement and control signals based on the fourth signal.
[0041] The frequency of the measurement and control signal is an integer multiple of the frequency of the fourth signal.
[0042] The signal generating device of the present application takes a 100MHz clock signal as a reference signal, preliminarily increases the signal frequency through a frequency up-conversion module 10, outputs a first signal and a second signal with higher frequency, generates a fourth signal by combining a DDS 20 and a frequency mixer 30, takes the fourth signal as an input signal of a phase-locked loop module 40, increases the signal frequency again through the phase-locked loop module 40, and outputs a required measurement and control signal; the present application increases the frequency in steps, so that the measurement and control signal is more stable; the combination of the DDS 20 and the frequency mixer 30 can accurately control the frequency of the fourth signal so that the frequency of the measurement and control signal is an integer multiple of the frequency of the fourth signal, thereby only using the integer mode of the phase-locked loop module 40, which has the effect of reducing spurs, thereby improving the quality of the final measurement and control signal.
[0043] The specific process of generating a measurement and control signal of about 12GHz by the signal generator of the present application based on a 100MHz reference clock signal is as follows: Figure 1
[0044] The 100MHz reference clock signal passes through the frequency up-conversion module 10 to obtain a 1GHz first signal and a 2.5GHz second signal, the 1GHz first signal passes through the DDS 20 to output a 99.8MHz third signal, and the 2.5GHz second signal and the 99.8MHz third signal pass through the frequency mixer 30 for mixing processing to obtain a 2400.2MHz fourth signal, and the 2400.2MHz fourth signal passes through the phase-locked loop module 40 to output a 12001MHz measurement and control signal.
[0045] Figure 2 The structure of the signal generating device provided by the present application is shown in Figure 2 ; as Figure 2 shown: in some embodiments of the present application, on the basis of the signal generating device in Figure 1 , the signal generating device further comprises a first Bessel filter 60 for filtering the received fourth signal and outputting to the phase-locked loop module 40. By setting the first Bessel filter 60, the fourth signal is filtered to reduce the spurious signal of the fourth signal, thereby reducing the spurious of the final measurement and control signal to improve the quality of the measurement and control signal. In the present embodiment, the number of first Bessel filters 60 is not specifically limited and can be one, two or more, connected in series between the output end of the frequency mixer 30 and the input end of the phase-locked loop module 40.
[0046] Continue as Figure 2 As shown in the figure: in some embodiments of the present embodiment, the signal generating device further comprises a low-pass filter 50 for receiving the third signal for filtering processing and outputting to the mixer 30. By setting the low-pass filter 50, the third signal is filtered and processed, and the spurious signal of the third signal is reduced, thereby reducing the spurious of the final measurement and control signal to improve the quality of the measurement and control signal. In the present embodiment, the number of low-pass filters 50 is not specifically limited, and can be 1, 2 or more, connected in series between the output end of the DDS 20 and the input end of the mixer 30.
[0047] Figure 3 The structure of the signal generating device provided by the present embodiment Figure 3 ; as Figure 1 shown: in some embodiments of the present embodiment, on the basis of Figure 3 , the frequency up-regulation module 10 comprises:
[0048] The amplifier 11 is used for receiving the 100MHz reference clock signal and performing power amplification processing on the reference clock signal.
[0049] The frequency multiplication element 12 is connected with the output end of the amplifier 11, used for receiving the signal after power amplification processing and performing frequency multiplication processing, outputting the first signal and the second signal with frequency higher than 100MHz.
[0050] The frequency up-regulation module 10 of the present embodiment improves the power level of the 100MHz reference clock signal by setting the amplifier 11, ensures that the signal can still maintain sufficient strength and clarity after the frequency multiplication process, helps to reduce the interference and noise in communication, and improves the stability and communication quality of the signal. By setting the frequency multiplication element 12, the frequency of the 100MHz reference clock signal is preliminarily increased to ensure the stability of the signal and improve the quality of the measurement and control signal.
[0051] In the present embodiment, the frequency multiplication element 12 comprises a comb spectrum generator or a frequency multiplier.
[0052] Continue as Figure 3As shown: In some embodiments of this example, the frequency upsampling module 10 further includes a second surface acoustic wave (SAW) filter 13, electrically connected between the frequency multiplier element 12 and the DDS 20, for receiving the first signal, filtering it, and then outputting it to the DDS 20. By setting the second SAW filter 13, the first signal is filtered, reducing spurious signals in the first signal, thereby reducing spurious signals in the final measurement and control signal and improving the quality of the measurement and control signal. In this embodiment, the number of second SAW filters 13 is not specifically limited; it can be one, two, or more, connected in series between the output terminal of the frequency multiplier element 12 and the input terminal of the DDS 20. Further, an amplifier can be provided between the frequency multiplier element 12 and the second SAW filter 13 as needed.
[0053] Continue as As shown: In some embodiments of this example, the frequency upscaling module 10 further includes a third surface acoustic wave (SAW) filter 14, electrically connected between the frequency multiplier element 12 and the mixer 30, for receiving the second signal, filtering it, and then outputting it to the mixer 30. By setting the third SAW filter 14, the second signal is filtered, reducing spurious signals in the second signal, thereby reducing spurious signals in the final measurement and control signal. In this embodiment, the number of third SAW filters 14 is not specifically limited; it can be one, two, or more, connected in series between the output terminal of the frequency multiplier element 12 and the input terminal of the mixer 30. Further, an amplifier can be provided between the frequency multiplier element 12 and the third SAW filter 14 as needed.
[0054] In some embodiments of this example, the DDS has a frequency control word of 48 bits or more. A DDS20 with a higher frequency control word can provide higher resolution, meaning it can generate signals that are closer to the ideal waveform, thereby reducing spurious components and improving signal purity. For example, the DDS has a 48-bit frequency control word, enabling a minimum frequency resolution of 4µHz.
[0055] Typically, the phase-locked loop module 40 includes a phase comparator, a loop filter, an oscillator, and a frequency divider. The phase comparator generates an error signal based on the phase difference between the received fourth signal and the feedback signal output by the frequency divider, and outputs it to the loop filter. The loop filter generates a control voltage signal based on the error signal and outputs it to the oscillator. The oscillator outputs a measurement and control signal for controlling the qubits to the quantum chip and the frequency divider based on the control voltage signal. The frequency divider performs frequency division processing on the measurement and control signal to obtain the feedback signal and outputs it to the phase comparator.
[0056] In some embodiments of the present embodiment, the loop filter in the phase-locked loop module 40 comprises a passive loop filter mainly composed of passive components such as resistors (R), capacitors (C), etc. Compared with an active loop filter, the passive loop filter is simpler and does not include an amplifier, thereby avoiding the noise that the amplifier may introduce, improving the accuracy and stability of the signal output by the phase-locked loop module 40, and improving the quality of the final measurement and control signal. In the present embodiment, when the phase-locked loop module 40 uses a passive loop filter, the oscillator in the phase-locked loop module 40 preferably uses a VCO with low tuning voltage.
[0057] In some embodiments of the present embodiment, the signal generating device further comprises a linear voltage regulator electrically connected between the electrical components in the phase-locked loop module 40 and the power supply, for providing a stable output voltage to the electrical components. By providing a linear voltage regulator, a stable output voltage is provided to the electrical components in the phase-locked loop module 40, thereby reducing the spurious signals caused by power supply fluctuations and improving the quality of the final measurement and control signal. The electrical components in the present embodiment include at least one of a phase comparator, a loop filter, an oscillator, and a frequency divider.
[0058] In order to further reduce the spurious signals caused by power supply fluctuations, in some embodiments of the present embodiment, a filter capacitor is electrically connected to the power supply pin of the electrical components. By providing a filter capacitor, high-frequency noise and fluctuations on the power supply line can be filtered out, reducing the spurious signals caused by power supply fluctuations and ensuring the stability of the power supply to improve the quality of the final measurement and control signal.
[0059] Based on the same application concept, the present embodiment further proposes a quantum computing measurement and control system comprising the above signal generating device, wherein the signal generating device is used to output a measurement and control signal to a quantum chip.
[0060] The quantum computing measurement and control system of the present application comprises the above signal generating device, and therefore has the same beneficial effects as the signal generating device, which will not be described here again.
[0061] Based on the same application concept, the present embodiment further proposes a quantum computer comprising the above quantum computing measurement and control system and a quantum chip, wherein the quantum chip operates a quantum computing task according to the measurement and control signal provided by the quantum computing measurement and control system.
[0062] The quantum computer of the present application comprises the above quantum computing measurement and control system, and therefore has the same beneficial effects as the quantum computing measurement and control system, which will not be described here again.
[0063] In the description of the specification, the description referring to the terms "some embodiments" or "an example" or the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the utility model. In the specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and integrate different embodiments or examples described in the specification.
[0064] The above are only preferred embodiments of the utility model, and do not have any limiting effect on the utility model. Any person skilled in the art can make any form of equivalent replacement or modification or the like change to the technical scheme and technical content disclosed by the utility model without departing from the scope of the technical scheme of the utility model, which still belongs to the protection scope of the utility model.
Claims
1. A signal generating device, characterized by The signal generation device comprises: a frequency up-modulation module, configured to output a first signal and a second signal with a frequency higher than 100 MHz based on a received 100 MHz reference clock signal; a DDS, configured to output a third signal with a frequency lower than the first signal based on the first signal; a frequency mixer, configured to output a fourth signal based on the third signal and the second signal, the frequency of the fourth signal being equal to the difference between the second signal and the third signal; a phase-locked loop module, configured to output a measurement and control signal based on the fourth signal; the frequency of the measurement and control signal is an integer multiple of the frequency of the fourth signal.
2. The signal generating device of claim 1, wherein The signal generation device further comprises a first acoustic surface filter, configured to filter the fourth signal and output the filtered fourth signal to the phase-locked loop module; and / or a low-pass filter, configured to filter the third signal and output the filtered third signal to the frequency mixer.
3. The signal generating device of claim 1, wherein The frequency up-modulation module comprises: an amplifier, configured to receive the 100 MHz reference clock signal and perform power amplification on the reference clock signal; a frequency multiplication element, connected to the output end of the amplifier, configured to receive the signal after power amplification and perform frequency multiplication to output the first signal and the second signal with a frequency higher than 100 MHz.
4. The signal generating device of claim 3, wherein The signal generation device further comprises: a second acoustic surface filter, electrically connected between the frequency multiplication element and the DDS, configured to receive the first signal, perform filtering, and output the filtered first signal to the DDS; and / or a third acoustic surface filter, electrically connected between the frequency multiplication element and the frequency mixer, configured to receive the second signal, perform filtering, and output the filtered second signal to the frequency mixer.
5. The signal generating device of claim 1, wherein The DDS has a frequency control word with a bit number greater than or equal to 48.
6. The signal generating device of claim 1, wherein The loop filter in the phase-locked loop module comprises a passive loop filter.
7. The signal generating device of claim 1, wherein The signal generation device further comprises a linear voltage regulator, electrically connected between an electrical device in the phase-locked loop module and a power supply, configured to provide a stable output voltage to the electrical device.
8. The signal generating device of claim 7, wherein, A filter capacitor is electrically connected to the power supply pin of the electrical device.
9. A quantum computing control system, comprising: The signal generation device comprises the signal generation device according to any one of claims 1-8, and is configured to output a measurement and control signal to a quantum chip.
10. A quantum computer, comprising: The quantum computing measurement and control system comprises the quantum computing measurement and control system according to claim 9 and a quantum chip, and the quantum chip is configured to perform a quantum computing task according to the measurement and control signal provided by the quantum computing measurement and control system.