Portable hard disk bridging encryption circuit and equipment based on quantum random number

Abstract

The utility model discloses a portable hard disk bridging encryption circuit and equipment based on quantum random numbers, and belongs to the technical field of hard disk bridging encryption. According to the portable hard disk bridging encryption circuit based on the quantum random number, data of an upper computer reaches the SoC storage security chip through the upper computer interface, the SoC storage security chip obtains a secret key through the quantum random number generator and encrypts the data, and finally the encrypted data is written into a hard disk through the hard disk interface. All the data written into the hard disk can be completely encrypted, so that all the data written into the hard disk are ciphertexts, and the encryption safety of the mobile hard disk is improved. Besides, the circuit is in pluggable connection with the upper computer through the upper computer interface and in pluggable connection with the mobile hard disk through the hard disk interface, all the interfaces are connected when encryption is needed, the mobile hard disk skips the circuit to be directly connected with the upper computer when encryption is not needed, and the flexibility of hard disk encryption design is improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to hard disk bridging encryption technical field especially, it relates to a portable hard disk bridging encryption circuit and equipment based on quantum random number. BACKGROUND

[0002] Data encryption is a kind of data into cipher text form, to protect its confidentiality and security technology.It plays an important role in computer science, communication and information security field.With the development of modern computer technology and the rise of mobile office network, it is necessary for the data protection in the process of data storage, use and transmission in mobile.The traditional mobile storage device generally does not have the function of protecting the stored data, and the hard disk device with encryption function is also realized by the soft encryption function of upper software encryption algorithm, which is useless for the data with high security level.The quantum random number has the unpredictability of physics, so it is theoretically impossible to copy and crack, and it is a very good choice for application and encryption technology;

[0003] The mobile hard disk storage device sold on the market now either has no data encryption function, or uses software encryption to encrypt data, or uses random algorithm to generate encryption key, which is easy to crack.On the other hand, the flexibility of the mobile hard disk encryption in the prior art is not enough, which mainly shows that: if the encryption device is used to encrypt on the computer side, the mobile hard disk cannot be encrypted after being replaced on the computer side;if the encryption device is installed in the mobile hard disk, the mobile hard disk can only be used after being encrypted, and if you want to use the mobile hard disk without encryption, you need to modify it again, and the risk of modifying the mobile hard disk which has become a commodity is also relatively large.

[0004] In summary, the security of the existing mobile hard disk encryption is insufficient, and the flexibility is lacking when designing the mobile hard disk encryption. UTILITY MODEL CONTENT

[0005] The utility model provides a kind of portable hard disk bridging encryption circuit and equipment based on quantum random number, the security of mobile hard disk encryption and the flexibility when hard disk encryption design can be improved.

[0006] To solve the above technical problems, the utility model discloses a kind of portable hard disk bridging encryption circuit based on quantum random number, the circuit includes SoC storage security chip, quantum random number generator, host computer interface, hard disk interface, wherein:

[0007] The first end of the host computer interface is used for communication connection with the host computer, and the second end of the host computer interface is electrically connected with the first end of the SoC storage security chip, so that the host computer and the SoC storage security chip communicate with each other.

[0008] The second end of the SoC storage security chip is electrically connected with the first end of the quantum random number generator, so that the quantum random number generator provides quantum random numbers for the SoC storage security chip.

[0009] The first end of the hard disk interface is electrically connected with the third end of the SoC storage security chip, and the second end of the hard disk interface is used for being in communication connection with a hard disk, so that the SoC storage security chip and the hard disk communicate with each other.

[0010] As an optional implementation, in the first aspect of the utility model, the circuit further includes a power supply module, wherein:

[0011] The input end of the power supply module is electrically connected with the power supply end of the host computer interface, so that the host computer interface supplies power for the power supply module;

[0012] The first power supply end of the power supply module is electrically connected with the fourth end of the SoC storage security chip, the second power supply end of the power supply module is electrically connected with the second end of the quantum random number generator, and the third power supply end of the power supply module is electrically connected with the third end of the hard disk interface, so that the power supply module supplies power for the SoC storage security chip, the quantum random number generator and the hard disk interface.

[0013] As an optional implementation, in the first aspect of the utility model, the host computer interface is a USB interface, and the SoC storage security chip is a T620 chip, wherein:

[0014] The first end of the USB interface is used for being in communication connection with a host computer, and the second end of the USB interface is electrically connected with the first end of the T620 chip, so that the host computer and the T620 chip communicate with each other;

[0015] The second end of the T620 chip is electrically connected with the first end of the quantum random number generator, so that the quantum random number generator provides quantum random numbers for the T620 chip;

[0016] The third end of the T620 chip is electrically connected with the first end of the hard disk interface, so that the T620 chip and the hard disk communicate with each other;

[0017] The fourth end of the T620 chip is electrically connected with the first power supply end of the power supply module, so that the power supply module supplies power for the T620 chip.

[0018] As an optional implementation, in the first aspect of the utility model, the USB interface is TYPE-C interface and / or micro-usb3.0 interface supporting USB3.0 protocol standard, the USB interface supports USB3.0 Gen1 protocol, maximum operating frequency 5Ghz, downward compatible USB2.0 protocol and USB1.1 protocol.

[0019] As an optional implementation, in the first aspect of the utility model, the hard disk interface is M.2-SATA interface and / or sata hard disk interface, and the protocol of the hard disk interface supports SATAIII.

[0020] As an optional implementation, in the first aspect of the utility model, the circuit further includes an indicator light, wherein:

[0021] The first end of the indicator light is electrically connected to the fifth end of the T620 chip, and the indicator light is used to display corresponding light information according to the electrical signal received from the fifth end of the T620 chip.

[0022] As an optional implementation, in the first aspect of the utility model, the power supply module includes a first voltage reduction module and a second voltage reduction module, wherein:

[0023] The input end of the first voltage reduction module is electrically connected to the power supply end of the USB interface to power the first voltage reduction module with the USB interface, and the first voltage reduction module is used to output the current received from the USB interface after voltage reduction;

[0024] The first power supply end of the first voltage reduction module is electrically connected to the input end of the second voltage reduction module to power the second voltage reduction module with the first voltage reduction module, and the second voltage reduction module is used to output the current received from the first voltage reduction module after voltage reduction;

[0025] The second power supply end of the first voltage reduction module is electrically connected to the second end of the quantum random number generator, the third power supply end of the first voltage reduction module is electrically connected to the third end of the hard disk interface, and the fourth power supply end of the first voltage reduction module is electrically connected to the second end of the indicator light to power the quantum random number generator, the hard disk interface and the indicator light with the first voltage reduction module;

[0026] The power supply end of the second voltage reduction module is electrically connected to the fourth end of the T620 chip to power the T620 chip with the second voltage reduction module.

[0027] As an optional implementation, in the first aspect of the utility model, the first end of the T620 chip is a USB signal port, the second end is an SPI1 signal port, the third end is a sata interface, and the fifth end is a GPIO interface.

[0028] The USB module is electrically connected with the USB signal port of the T620 chip, the quantum random number generator is electrically connected with the SPI1 signal port of the T620 chip, the hard disk interface is electrically connected with the sata interface of the T620 chip, and the indicator lamp is electrically connected with the GPIO interface of the T620 chip.

[0029] As an optional implementation, in the first aspect of the utility model, the circuit further includes a capacitor C1, and the hard disk interface and the sata interface of the T620 chip are electrically connected, including:

[0030] The hard disk interface is electrically connected with the sata interface of the T620 chip through a SATA signal line after the capacitor C1 is connected in series.

[0031] The second aspect of the utility model discloses a portable hard disk bridging encryption equipment based on quantum random number, the portable hard disk bridging encryption equipment based on quantum random number includes equipment ontology, still includes any one portable hard disk bridging encryption circuit based on quantum random number disclosed like the first aspect.

[0032] Implementing the utility model has the following beneficial effects:

[0033] This invention provides a portable hard drive bridging encryption circuit based on quantum random numbers. The circuit includes a SoC (System-on-a-Chip) storage security chip, a quantum random number generator, a host computer interface, and a hard drive interface. The first end of the host computer interface is used for communication with a host computer, and the second end of the host computer interface is electrically connected to the first end of the SoC storage security chip, enabling communication between the host computer and the SoC storage security chip. The second end of the SoC storage security chip is electrically connected to the first end of the quantum random number generator, allowing the quantum random number generator to provide quantum random numbers to the SoC storage security chip. The first end of the hard drive interface is electrically connected to the third end of the SoC storage security chip, and the second end of the hard drive interface is used for communication with the hard drive, enabling communication between the SoC storage security chip and the hard drive. Therefore, this portable hard drive bridging encryption circuit based on quantum random numbers allows data from the host computer to reach the SoC storage security chip through the host computer interface. The SoC storage security chip obtains a key through the quantum random number generator and encrypts the data. Finally, the encrypted data is written to the hard drive through the hard drive interface. This fully encrypts all data written to the hard drive, ensuring that all data written to the hard drive is ciphertext, thus improving the security of the portable hard drive encryption. In addition, the circuit in this utility model can be plugged into the host computer via the host computer interface and plugged into the external hard drive via the hard drive interface. When encryption is required, the interfaces are connected; when encryption is not required, the external hard drive can be bypassed and directly connected to the host computer, thus improving the flexibility of hard drive encryption design. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of a portable hard drive bridging encryption circuit based on quantum random numbers disclosed in this utility model;

[0036] Figure 2 This is a schematic diagram of the structure of the portable hard drive bridging encryption circuit with a power supply module disclosed in this utility model;

[0037] Figure 3 This is a schematic diagram of another portable hard drive bridging encryption circuit based on quantum random numbers disclosed in this utility model;

[0038] Figure 4 This is a schematic diagram of the structure of the portable hard drive bridging encryption circuit with indicator lights disclosed in this utility model;

[0039] Figure 5 is a structure schematic diagram of the portable hard disk bridging encryption circuit containing a voltage reduction module disclosed by the utility model;

[0040] Figure 6 is a structure schematic diagram of the portable hard disk bridging encryption equipment based on quantum random numbers disclosed by the utility model.

[0041] In the figure: 10 is a SoC storage security chip; 11 is a T620 chip; 20 is a quantum random number generator; 30 is an upper computer interface; 31 is a USB interface; 40 is a hard disk interface; 50 is a power supply module; 51 is a first voltage reduction module; 52 is a second voltage reduction module; 60 is an indicator light; C1 is a capacitor. DETAILED DESCRIPTION

[0042] In order to better understand and implement, the technical solutions in the embodiments of the utility model will be clearly and completely described below in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.

[0043] It should be noted that, unless otherwise explicitly specified and limited, the term "electrical connection" in the specification and claims of the utility model and the above-mentioned drawings should be understood broadly, for example, it can be fixed electrical connection, or detachable electrical connection, or integrally electrical connection; it can be mechanical electrical connection, or electrical electrical connection or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements or the interaction relationship between two elements. In addition, the terms "first", "second" and the like in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order, and the terms "include" and "have" and any variation thereof are intended to cover non-exclusive inclusion. For those skilled in the art, the specific meaning of the above-mentioned terms in the utility model can be understood according to the specific circumstances.

[0044] Embodiment one

[0045] Please refer to Figure 1 , Figure 1 is a structure schematic diagram of the portable hard disk bridging encryption circuit based on quantum random numbers disclosed by the utility model embodiments, which can be applied between the upper computer and the hard disk, especially can be applied to the mobile hard disk which needs to be encrypted, and the specific application of the utility model embodiments is not limited. For example Figure 1As shown, the circuit can include a SoC storage security chip 10, a quantum random number generator 20, a host computer interface 30, and a hard disk interface 40, wherein:

[0046] The first end of the host computer interface 30 is used in communication connection with a host computer, and the second end of the host computer interface 30 is electrically connected to the first end of the SoC storage security chip 10, so that the host computer and the SoC storage security chip 10 communicate with each other.

[0047] The second end of the SoC storage security chip 10 is electrically connected to the first end of the quantum random number generator 20, so that the quantum random number generator 20 provides quantum random numbers for the SoC storage security chip 10.

[0048] The first end of the hard disk interface 40 is electrically connected to the third end of the SoC storage security chip 10, and the second end of the hard disk interface 40 is used in communication connection with a hard disk, so that the SoC storage security chip 10 and the hard disk communicate with each other.

[0049] In the embodiment of the utility model, the host computer can be a computer, a mobile phone, a tablet computer or any device with a hard disk storage function. The SoC (System on Chip) storage security chip is a system-level chip that integrates storage and security functions. The SoC storage security chip 10 usually has multiple functions, such as supporting multiple high-speed interfaces and integrating multiple national encryption algorithms, to meet the needs of storage products in the information security field.

[0050] In the embodiment of the utility model, the quantum random number generator 20 is based on the principle of quantum amplification spontaneous emission, which can provide high-quality random number generation. The light chip structure contains a quantum entropy source, has a high-speed quantum random number generation rate, and the internal entropy source health detection core detects the original random signal output by the quantum entropy source in real time to ensure that the entropy source works normally. At the same time, the random number detection core detects the final output random number according to the relevant standard to ensure that it meets the relevant randomness requirements. The random number performance meets the requirements of the standards such as GM-T 0062-2018 "Detection Requirements for Random Numbers of Cryptographic Products", GB / T32915-2016 "Information Security Technology Binary Sequence Randomness Detection Method", YD / T 3907.3-2021 "Key Devices and Modules for Quantum Key Distribution (QKD) Based on BB84 Protocol Part 3: Quantum Random Number Generator 20 (QRNG)", "NIST 800-90A / B / C", and "Detection Requirements for Two Types of Quantum Random Number Generators (Revised Draft)". The SoC storage security chip 10 obtains the initialization key through the quantum random number generator 20. Optionally, the quantum random number generator 20 can use a domestic QRNG series quantum random number generator 20 module.

[0051] It can be seen that the portable hard disk bridging encryption circuit based on quantum random number in the embodiment of the utility model, the data of host computer reaches SoC storage security chip 10 through host computer interface 30, SoC storage security chip 10 obtains the key through quantum random number generator 20 and encrypts the data, finally, the encrypted data is written into the hard disk through hard disk interface 40, all the data written into the hard disk can be completely encrypted, so that all the data written into the hard disk is ciphertext, and the security of mobile hard disk encryption is improved. In addition, the circuit in the utility model is connected with host computer through host computer interface 30 and is connected with mobile hard disk through hard disk interface 40, when encryption is needed, the interfaces are connected, when encryption is not needed, the mobile hard disk is directly connected with host computer by skipping the circuit, and the flexibility of hard disk encryption design is improved.

[0052] In an alternative embodiment, as shown in Figure 2 The circuit can further include a power supply module 50, wherein:

[0053] The input end of the power supply module 50 is electrically connected with the power supply end of the host computer interface 30, so that the host computer interface 30 supplies power to the power supply module 50.

[0054] The first power supply end of the power supply module 50 is electrically connected with the fourth end of the SoC storage security chip 10, the second power supply end of the power supply module 50 is electrically connected with the second end of the quantum random number generator 20, and the third power supply end of the power supply module 50 is electrically connected with the third end of the hard disk interface 40, so that the power supply module 50 supplies power to the SoC storage security chip 10, the quantum random number generator 20 and the hard disk interface 40.

[0055] In the alternative embodiment, the power supply module 50 obtains electrical energy from the host computer interface 30 and supplies power to the SoC storage security chip 10, the quantum random number generator 20 and the hard disk interface 40 respectively.

[0056] In another alternative embodiment, as shown in Figure 3 The host computer interface 30 is a USB interface 31, and the SoC storage security chip 10 is a T620 chip 11, wherein:

[0057] The first end of the USB interface 31 is used for communication connection with the host computer, and the second end of the USB interface 31 is electrically connected with the first end of the T620 chip 11, so that the host computer and the T620 chip 11 communicate with each other.

[0058] The second end of the T620 chip 11 is electrically connected with the first end of the quantum random number generator 20, so that the quantum random number generator 20 provides quantum random numbers for the T620 chip 11.

[0059] The third end of the T620 chip 11 is electrically connected with the first end of the hard disk interface 40, so that the T620 chip 11 and the hard disk communicate with each other.

[0060] The fourth end of the T620 chip 11 is electrically connected with the first power supply end of the power supply module 50, so that the power supply module 50 supplies power for the T620 chip 11.

[0061] In this optional embodiment, the T620 chip 11 is a new generation of SoC storage security chip independently developed in China, which has the characteristics of rich functions, powerful performance, low power consumption, high security, and can be widely used in many safe storage products such as safe U disk, key U disk, encrypted mobile hard disk, etc. It can also be applied to USB3 to SATA3, USB to SPI, USB to UART interface field products. The chip integrates a high-performance 32-bit domestic RISC CPU, which can support USB3.0, SATA3.0, eMMC5.1 and other super-speed interfaces, and integrates various national encryption algorithms (such as SM2, SM3, SM4), which can meet the needs of information security field storage products; At the same time, the chip also supports international standard AES encryption algorithm and ECC algorithm, which can be applied to the global general safe storage market.

[0062] In yet another optional embodiment, the USB interface 31 is a TYPE-C interface and / or a micro-usb3.0 interface supporting the USB3.0 protocol standard, and the USB interface 31 supports the USB3.0 Gen1 protocol with a maximum working frequency of 5Ghz, and is downward compatible with the USB2.0 protocol and the USB1.1 protocol.

[0063] Further optionally, the hard disk interface 40 is an M.2-SATA interface and / or a sata hard disk interface 40, and the protocol of the hard disk interface 40 supports SATAIII.

[0064] In this optional embodiment, the design of the USB interface 31 and the hard disk interface 40 can ensure the widest applicability, and can also be compatible with old protocols.

[0065] In yet another optional embodiment, as shown in Figure 4 the circuit can further include an indicator light 60, wherein:

[0066] The first end of the indicator light 60 is electrically connected with the fifth end of the T620 chip 11, and the indicator light 60 is used to display corresponding light information according to the electrical signal received from the fifth end of the T620 chip 11.

[0067] In yet another optional embodiment, as shown in Figure 5 the circuit can further include an indicator light 60, wherein:

[0068] The power supply module 50 can include a first voltage reduction module 51 and a second voltage reduction module 52, wherein:

[0069] The input end of the first voltage reduction module 51 is electrically connected with the power supply end of the USB interface 31, so that the USB interface 31 supplies power for the first voltage reduction module 51, and the first voltage reduction module 51 is used for outputting the current received from the USB interface 31 after voltage reduction;

[0070] The first power supply end of the first voltage reduction module 51 is electrically connected with the input end of the second voltage reduction module 52, so that the first voltage reduction module 51 supplies power for the second voltage reduction module 52, and the second voltage reduction module 52 is used for outputting the current received from the first voltage reduction module 51 after voltage reduction;

[0071] The second power supply end of the first voltage reduction module 51 is electrically connected with the second end of the quantum random number generator 20, the third power supply end of the first voltage reduction module 51 is electrically connected with the third end of the hard disk interface 40, and the fourth power supply end of the first voltage reduction module 51 is electrically connected with the second end of the indicator lamp 60, so that the first voltage reduction module 51 supplies power for the quantum random number generator 20, the hard disk interface 40 and the indicator lamp 60;

[0072] The power supply end of the second voltage reduction module 52 is electrically connected with the fourth end of the T620 chip 11, so that the second voltage reduction module 52 supplies power for the T620 chip 11.

[0073] In the optional embodiment, two voltage reduction modules are designed in the power supply module 50, and since the T620 chip 11 is the most core device, it is necessary to ensure the stability and safety of its power supply, and therefore a second voltage reduction module 52 is separately arranged for it. Optionally, the power taking part of the power supply module 50 is connected to the VBUS pin of the USB interface 31, the output part first passes through the first DC-DC voltage reduction chip to reduce the 5V voltage to 3.3V, and supplies the quantum random number generator 20, the hard disk interface 40 and the indicator lamp 60; and then passes through the second DC-DC voltage reduction chip to reduce the 3.3V voltage to 1.0V, and supplies the T620 core voltage.

[0074] In still another optional embodiment, the first end of the T620 chip 11 is a USB signal port, the second end is an SPI1 signal port, the third end is a sata interface, and the fifth end is a GPIO interface; wherein:

[0075] The USB module is electrically connected with the USB signal port of the T620 chip 11, the quantum random number generator 20 is electrically connected with the SPI1 signal port of the T620 chip 11, the hard disk interface 40 is electrically connected with the sata interface of the T620 chip 11, and the indicator lamp 60 is electrically connected with the GPIO interface of the T620 chip 11.

[0076] In yet another optional embodiment, the circuit can further include a capacitor C1, and the hard disk interface 40 is electrically connected with the sata interface of the T620 chip 11, which can include:

[0077] The hard disk interface 40 is electrically connected with the sata interface of the T620 chip 11 through the SATA signal line after the capacitor C1 is connected in series.

[0078] In the optional embodiment, the main role of the capacitor C1 is to perform AC coupling (AC coupling) and provide DC isolation. In high-speed signal transmission, in order to avoid the mutual influence of DC levels, the optional embodiment uses an AC coupling capacitor C1 on the SATA signal line, which allows AC signals to pass through while blocking DC signals, thereby achieving electrical isolation between different devices.

[0079] The principle of the portable hard disk bridging encryption circuit based on quantum random numbers in the embodiment of the utility model is as follows:

[0080] The portable hard disk bridging encryption circuit based on quantum random numbers in the embodiment of the utility model has a quantum random number generator 20 built-in, adopts a special encryption SoC chip, can simultaneously realize USB data communication and real-time data encryption and decryption, and all data files passing through the module are encrypted. The circuit has a type C interface and a micro USB3.0 interface for upward connection with a computer; has an M.2-SATA interface and a SATA interface for downward connection with a hard disk, supports a plurality of types of hard disks with a SATA data interface, supports the SATAIII protocol, and is downward compatible with the SATAII and SATAI protocols; the circuit supports symmetric encryption algorithms and asymmetric encryption algorithms, including SM2, SM3, SM4, AES and a plurality of standard encryption and decryption algorithms, wherein the secret key in the circuit is generated by the quantum random number generator 20; the circuit contains an initial encryption key, the secret key transmission is twice encrypted; the communication can be a standard USB3.0 GEN1, and is downward compatible with USB2.0 and 1.1.

[0081] It should be noted that the above principle description is for an optional portable hard disk bridging encryption circuit based on quantum random numbers, and should not be considered as a limitation on the portable hard disk bridging encryption circuit based on quantum random numbers in the utility model.

[0082] Embodiment Two

[0083] Please refer to Figure 6 , Figure 6The utility model embodiment discloses a kind of portable hard disk bridging encryption equipment based on quantum random number, and its structure schematic diagram, the portable hard disk bridging encryption equipment based on quantum random number includes device ontology, in addition still include as any one portable hard disk bridging encryption circuit based on quantum random number in embodiment one. And the portable hard disk bridging encryption equipment based on quantum random number includes but is not limited to portable hard disk bridging encryption circuit based on quantum random number. It needs to be explained, for the detailed description of portable hard disk bridging encryption circuit based on quantum random number, please refer to the specific description of relevant content in embodiment one, this embodiment will not be repeated.

[0084] It can be seen that the implementation Figure 6 The portable hard disk bridging encryption equipment based on quantum random number described, the data of host computer reaches SoC storage security chip 10 through host computer interface 30, SoC storage security chip 10 obtains key through quantum random number generator 20 and encrypts data, and finally write encrypted data into hard disk through hard disk interface 40, can completely encrypt all data written into hard disk, so that all data written into hard disk are cipher text, improve the security of mobile hard disk encryption. In addition, the circuit in the utility model is connected with host computer through host computer interface 30 and can be plugged, and is connected with mobile hard disk through hard disk interface 40 and can be plugged, when encryption is needed, each interface is connected, when encryption is not needed, mobile hard disk is directly connected with host computer by skipping the circuit, improve the flexibility when hard disk encryption design.

[0085] The portable hard disk bridging encryption circuit and equipment based on quantum random number disclosed in the utility model embodiment are introduced in detail above, the principle and implementation mode of the utility model are described in this paper, but the above preferred embodiment is not used to limit the utility model, the above embodiment is only used to help understand the method and core idea of the utility model;Meanwhile, for the general skilled in the art, according to the idea of the utility model, there will be changes in specific implementation mode and application range without departing from the spirit and scope of the utility model, so the protection scope of the utility model is the range defined by claim.

Claims

1. A portable hard drive bridging encryption circuit based on quantum random numbers, characterized in that, The circuit includes a SoC storage security chip, a quantum random number generator, a host computer interface, and a hard disk interface, wherein: The first end of the host computer interface is used for communication connection with the host computer, and the second end of the host computer interface is electrically connected to the first end of the SoC storage security chip, so that the host computer and the SoC storage security chip can communicate with each other; The second terminal of the SoC storage security chip is electrically connected to the first terminal of the quantum random number generator, so that the quantum random number generator provides quantum random numbers for the SoC storage security chip. The first end of the hard disk interface is electrically connected to the third end of the SoC storage security chip, and the second end of the hard disk interface is used for communication connection with the hard disk so that the SoC storage security chip and the hard disk can communicate with each other.

2. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 1, characterized in that, The circuit also includes a power supply module, wherein: The input terminal of the power supply module is electrically connected to the power supply terminal of the host computer interface, so that the host computer interface supplies power to the power supply module; The first power supply terminal of the power supply module is electrically connected to the fourth terminal of the SoC storage security chip, the second power supply terminal of the power supply module is electrically connected to the second terminal of the quantum random number generator, and the third power supply terminal of the power supply module is electrically connected to the third terminal of the hard disk interface, so that the power supply module supplies power to the SoC storage security chip, the quantum random number generator, and the hard disk interface.

3. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 2, characterized in that, The host computer interface is a USB interface, and the SoC storage security chip is a T620 chip, wherein: The first end of the USB interface is used for communication connection with the host computer, and the second end of the USB interface is electrically connected to the first end of the T620 chip, so that the host computer and the T620 chip can communicate with each other; The second end of the T620 chip is electrically connected to the first end of the quantum random number generator, so that the quantum random number generator provides quantum random numbers for the T620 chip; The third terminal of the T620 chip is electrically connected to the first terminal of the hard disk interface, so that the T620 chip and the hard disk can communicate with each other. The fourth terminal of the T620 chip is electrically connected to the first power supply terminal of the power supply module, so that the power supply module supplies power to the T620 chip.

4. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 3, characterized in that, The USB interface is a TYPE-C interface and / or a micro-USB 3.0 interface that supports the USB 3.0 protocol standard. The USB interface supports the USB 3.0 Gen1 protocol, has a maximum operating frequency of 5GHz, and is backward compatible with the USB 2.0 and USB 1.1 protocols.

5. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 3, characterized in that, The hard drive interface is an M.2-SATA interface and / or a SATA hard drive interface, and the protocol of the hard drive interface supports SATAIII.

6. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 3, characterized in that, The circuit also includes indicator lights, wherein: The first end of the indicator light is electrically connected to the fifth end of the T620 chip, and the indicator light is used to display corresponding light information according to the electrical signal received from the fifth end of the T620 chip.

7. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 6, characterized in that, The power supply module includes a first step-down module and a second step-down module, wherein: The input terminal of the first step-down module is electrically connected to the power supply terminal of the USB interface, so that the USB interface supplies power to the first step-down module. The first step-down module is used to step down the current received from the USB interface and output it. The first power supply terminal of the first step-down module is electrically connected to the input terminal of the second step-down module, so that the first step-down module supplies power to the second step-down module, and the second step-down module is used to step down the current received from the first step-down module and output it. The second power supply terminal of the first step-down module is electrically connected to the second terminal of the quantum random number generator, the third power supply terminal of the first step-down module is electrically connected to the third terminal of the hard disk interface, and the fourth power supply terminal of the first step-down module is electrically connected to the second terminal of the indicator light, so that the first step-down module supplies power to the quantum random number generator, the hard disk interface and the indicator light; The power supply terminal of the second step-down module is electrically connected to the fourth terminal of the T620 chip, so that the second step-down module supplies power to the T620 chip.

8. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 7, characterized in that, The T620 chip has a USB signal port at its first end, an SPI1 signal port at its second end, a SATA interface at its third end, and a GPIO interface at its fifth end; wherein: The USB module is electrically connected to the USB signal port of the T620 chip, the quantum random number generator is electrically connected to the SPI1 signal port of the T620 chip, the hard disk interface is electrically connected to the SATA interface of the T620 chip, and the indicator light is electrically connected to the GPIO interface of the T620 chip.

9. The portable hard drive bridging encryption circuit based on quantum random numbers according to claim 8, characterized in that, The circuit also includes a capacitor (C1), and the hard disk interface is electrically connected to the SATA interface of the T620 chip, including: The hard drive interface is electrically connected to the SATA interface of the T620 chip via a SATA signal line connected in series with the capacitor (C1).

10. A portable hard drive bridging encryption device based on quantum random numbers, comprising a device body, characterized in that, The portable hard drive bridging encryption device based on quantum random numbers further includes the portable hard drive bridging encryption circuit based on quantum random numbers as described in any one of claims 1-9.

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