Isolation communication circuit

Abstract

The utility model belongs to the field of battery management, and particularly relates to an isolation communication circuit. A switching circuit, a first power supply end, a first enabling end and a first output end are arranged in a first communication circuit, the first power supply end is connected with an external first input power supply, and the first enabling end is connected with a signal output end of the first communication circuit; the voltage conversion circuit is provided with a first input end, a second output end and a first grounding end, the first input end is connected with the first output end, the second output end is connected with the load circuit, the first grounding end is connected with the first reference ground, and the voltage conversion circuit outputs an isolated power supply through the second output end according to the first reference ground. The first reference ground is arranged at the grounding end of the BMS power supply end and the load circuit, so that when the switching circuit is not opened, the grounding end of the power supply is isolated from the grounding end of the load, the voltage conversion circuit is arranged to stabilize the voltage of the circuit to the power utilization voltage suitable for the load, and the circuit achieves BMS power supply isolation which is simple in structure and low in cost.

Description

TECHNICAL FIELD

[0001] The present technology belongs to the field of battery management, and particularly relates to an isolated communication circuit. BACKGROUND

[0002] With the development of lithium battery power supply systems, more and more battery projects require that the communication line with the charger or load master can be isolated, so as to avoid the threat of some high voltage or backflow to the system safety.

[0003] In the existing technology, there are many ways for the lithium battery power supply system to adopt isolation, such as optocoupler, digital isolation IC, etc. However, the communication rate will be reduced by using the optocoupler for isolation, which cannot meet the demand of high-speed communication at present. And the full-circuit isolation through digital IC is not suitable for mass production due to the high cost of digital IC. CONTENT OF THE UTILITY MODEL

[0004] In order to solve the above problems, the utility model provides an isolated communication circuit, which is isolated and prevented from high-voltage backflow through a switch isolation circuit, and the voltage conversion circuit stabilizes the power supply voltage of the power supply to the voltage range required by the load, so as to avoid the use of high-cost circuit components such as optocoupler and digital IC, and reduce the cost.

[0005] The utility model aims to realize the following technical solutions:

[0006] An isolated communication circuit applied to a first communication circuit, comprising:

[0007] A switch isolation circuit provided with a first power supply end, a first enable end and a first output end, the first power supply end is connected with an external first input power supply, the first enable end is connected with a signal output end of the first communication circuit;

[0008] A voltage conversion circuit provided with a first input end, a second output end and a first ground end, the first input end is connected with the first output end, the second output end is connected with a load circuit, and the first ground end is connected with a first reference ground, and the voltage conversion circuit outputs an isolated power supply through the second output end according to the first reference ground.

[0009] The switch isolation circuit comprises a switch circuit and an isolation circuit. The switch circuit is provided with a first power supply end, a first enable end and a first output end. The first power supply end is connected with a first input power supply outside. The first enable end is connected with a signal output end of the first communication circuit. The voltage conversion circuit is provided with a first input end, a second output end and a first ground end. The first input end is connected with the first output end. The second output end is connected with a load circuit. The first ground end is connected with the first reference ground. The voltage conversion circuit outputs an isolated power supply through the second output end according to the first reference ground. The load circuit is provided with the first reference ground. When the switch circuit is not turned on, the ground end of the power supply and the ground end of the load are isolated. The voltage conversion circuit is provided to stabilize the voltage of the circuit to a suitable voltage for the load. The circuit realizes the BMS power supply isolation with simple structure and low cost.

[0010] In some embodiments, the switch isolation circuit comprises a switch circuit, an isolation circuit, a switch circuit, a second input end, a third output end, a third input end, a fourth output end, a second input end connected with the first enable end, a third output end connected with the second input end, a third output end connected with the first output end, and a fourth output end connected with the first output end.

[0011] The switch isolation circuit realizes the on-off of the circuit through the switch circuit. The switch circuit can cut off the power supply and cut off the connection between the ground end and the first reference ground. At the same time, the isolation circuit is provided to prevent the reverse flow of additional current into the BMS end and cause damage to the BMS.

[0012] In some embodiments, the switch circuit comprises a first resistor, a second resistor, a third resistor, a first MOS tube and a second MOS tube. The first MOS tube is an N-channel MOS tube. The second MOS tube is a P-channel MOS tube.

[0013] One end of the first resistor is connected with the first enable end. The other end of the first resistor is connected with one end of the second resistor and the gate of the first MOS tube. The source of the first MOS tube is connected with the gate of the second MOS tube and one end of the third resistor. The other end of the third resistor is connected with the source of the second MOS tube and the first power supply end. The drain of the second MOS tube is connected with the third output end and the second input end. The other end of the second resistor and the drain of the first MOS tube are connected with the ground end.

[0014] The switch circuit realizes the on-off through the MOS tube. The gate of the first MOS tube is controlled through the first enable end, and the on-off of the second MOS tube is further controlled, so that the power supply end of the second MOS tube is turned on or off, and the on-off of the entire switch circuit is controlled through the first enable end.

[0015] In some embodiments, the isolation circuit includes a first diode, the first diode is provided with an anode end and a cathode end; the anode end is connected to the third input end and the third output end; the cathode end is connected to the first output end and the fourth output end.

[0016] By setting the diode, the characteristics of the diode unidirectional flow are utilized, and reverse current is prevented from flowing into the BMS battery end by simple circuit devices.

[0017] In some embodiments, the voltage conversion circuit includes a buck chip, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor; the buck chip is provided with a first voltage input end, a first voltage output end, and a buck ground end;

[0018] The first voltage input end is connected to the first output end, one end of the first capacitor, and the first end of the second capacitor; the first voltage output end, the second output end, one end of the third capacitor, and one end of the fourth capacitor are connected; the buck ground end, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are connected to the first reference ground.

[0019] By setting the anti-reverse diode of the buck chip, the direction of the current flow is prevented, and isolation and backflow are achieved by a simple structure.

[0020] In some embodiments, the power supply circuit and the load circuit are further included, the load circuit is provided with a load input end, the power supply circuit is provided with a first power supply output end and a second power supply output end, the first power supply output end is connected to the first power supply end, and the second power supply output end is connected to the first enable end;

[0021] The load input end is connected to the second output end, so as to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

[0022] The power supply circuit and the load circuit are arranged at both ends of the switch isolation circuit and the voltage conversion circuit, so as to perform electrical isolation.

[0023] In some embodiments, the second communication circuit is further included, the second communication circuit is arranged between the power supply circuit and the load circuit; the power supply circuit is provided with a first signal output end and a first signal input end; the load circuit is provided with a second signal output end and a second signal input end; the second communication circuit is provided with a communication isolation chip, a fifth capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; the communication isolation chip is provided with a first isolation power supply end, a second isolation power supply end, a third signal input end, a third signal output end, a fourth signal input end, a fourth signal output end, a first isolation ground end, and a second isolation ground end;

[0024] The first isolation power supply end is connected with the first enable end, one end of the fourth resistor and one end of the fifth capacitor; the second isolation power supply end is connected with the fourth output end and the first output end; one end of the fifth resistor is connected with the first signal input end; the other end of the fifth resistor is connected with the third signal output end; one end of the sixth resistor is connected with the first signal output end; the other end of the sixth resistor is connected with the third signal input end; one end of the seventh resistor is connected with the second signal output end; the other end of the seventh resistor is connected with the fourth signal input end; one end of the eighth resistor is connected with the second signal input end; the other end of the eighth resistor is connected with the fourth signal output end; the first isolation ground end is grounded, and the second isolation ground end is connected with the first reference ground end.

[0025] The second communication circuit is a signal isolation circuit, signals on the power supply end and the load end are isolated by a communication isolation chip, the isolation capability of the overall circuit is further improved, and the voltage conversion circuit can output an isolation voltage for the communication isolation chip.

[0026] In some embodiments, the power supply circuit includes a battery power supply circuit, an analog front-end circuit and a first control circuit; the battery power supply circuit includes a battery pack, a third MOS tube, a fourth MOS tube and a fuse; a positive electrode of the battery pack is connected with one end of the fuse; the other end of the fuse is connected with a source electrode of the third MOS tube; a drain electrode of the third MOS tube is connected with a drain electrode of the fourth MOS tube; a source electrode of the fourth MOS tube is connected with a negative electrode of the battery pack; wherein the third MOS tube and the fourth MOS tube are N-channel MOS tubes.

[0027] The power supply circuit supplies power through the battery pack, and the analog front-end circuit is arranged to monitor the running state of the battery pack voltage and current and perform signal processing; meanwhile, the first control circuit is arranged to perform power supply control, such as first enable end control, and signal transmission and reception.

[0028] In some embodiments, the analog front-end circuit includes an analog front-end chip; the analog front-end chip includes a plurality of second voltage input ends, a first control end, a second control end, a first serial data end and a first serial clock end; the first control circuit includes a first control chip, a ninth resistor, a tenth resistor and a plurality of eleventh resistors; the first control chip is provided with a second serial data end, a second serial clock end, a third voltage input end and a third ground end, and the first enable end, the first signal output end and the first signal input end are arranged on the first control chip; the battery pack is provided with a second voltage output end between two batteries;

[0029] The second voltage output end is connected with one end of the eleventh resistor, and the other end of the eleventh resistor is connected with the second voltage input end; the first control end is connected with the gate of the third MOS tube, and the second control end is connected with the gate of the fourth MOS tube; one end of the ninth resistor is connected with the first serial data end, and the other end of the ninth resistor is connected with the second serial data end; one end of the tenth resistor is connected with the first serial clock end, and the other end of the tenth resistor is connected with the second serial clock end; the third voltage input end is connected between one end of the fuse and the drain of the third MOS tube; and the third ground end is grounded.

[0030] The analog front-end chip is connected between two batteries, and controls the on-off of the power supply circuit through the control end, prevents load damage caused by power supply abnormalities or short circuit and the like, and prevents battery pack damage caused by current backflow, and further improves the circuit isolation capability.

[0031] In some embodiments, the load circuit comprises a second control circuit; the second control circuit is provided with a second control chip, the second control chip is provided with a fourth ground end, a fourth voltage input end, and the second signal output end and the second signal input end are arranged on the second control chip; the fourth ground end is connected with the first reference ground, and the fourth voltage input end is connected between one end of the fuse and the drain of the third MOS tube.

[0032] The load circuit is provided with the second control chip, the second control chip is powered by the BMS power supply system, so that the second control chip can be driven or control other load circuits, and the second control chip can further isolate other load circuits, and when power supply abnormalities or load abnormalities occur, the circuit connection can be cut off in time through the second control chip.

[0033] The beneficial effects of the isolation communication circuit are

[0034] In the first communication circuit, the switch circuit is arranged, the first power supply end, the first enable end and the first output end are arranged, the first power supply end is connected with the first input power supply outside, the first enable end is connected with the signal output end of the first communication circuit; and the voltage conversion circuit is arranged, the first input end, the second output end and the first ground end are arranged, the first input end is connected with the first output end, the second output end is connected with the load circuit, the first ground end is connected with the first reference ground, and the voltage conversion circuit outputs the isolation power supply through the second output end according to the first reference ground. The first reference ground is arranged on the BMS power supply end ground end, so that when the switch circuit is not opened, the ground end of the power supply and the ground end of the load are isolated, and the voltage conversion circuit is arranged to stabilize the voltage of the circuit to the power voltage suitable for the load. The circuit realizes the BMS power supply isolation with simple structure and low cost. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1A framework diagram of an isolated communication circuit of the utility model;

[0036] Figure 2 A circuit main body of an isolated communication circuit of the utility model;

[0037] Figure 3 A switch isolation circuit of an isolated communication circuit of the utility model;

[0038] Figure 4 A voltage conversion circuit of an isolated communication circuit of the utility model;

[0039] Figure 5 A second communication circuit of an isolated communication circuit of the utility model.

[0040] Reference signs:

[0041] R1, first resistance; R2, second resistance; R3, third resistance; R4, fourth resistance; R5, fifth resistance; R6, sixth resistance; R7, seventh resistance; R8, eighth resistance; R9, ninth resistance; R10, tenth resistance; R11, eleventh resistance;

[0042] C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor;

[0043] D1, first diode;

[0044] Q1, first MOS tube; Q2, second MOS tube; Q3, third MOS tube; Q4, fourth MOS tube;

[0045] U1, voltage reduction chip; U2, communication isolation chip; U3, analog front-end chip; U4, first control chip; U5, second control chip;

[0046] POWER_1, first power terminal; U4_5, first enable terminal; GND, first ground terminal; P-, first reference ground; U1_1, first voltage input terminal; U1_2, first voltage output terminal; U1_3, step-down ground terminal; U2_1, first isolated power terminal; U2_2, second isolated power terminal; U2_3, third signal input terminal; U2_4, third signal output terminal; U2_5, fourth signal input terminal; U2_6, fourth signal output terminal; U2_7, first isolated ground terminal; U2_8, second isolated ground terminal; U3_1, second voltage input terminal; U3_2, first control terminal; U3_3, second control terminal; U3_4, first serial data terminal; U3_5, first serial clock terminal; U4_1, second serial data terminal; U4_2, second serial clock terminal; U4_3, third voltage input terminal; U4_4, third ground terminal; U4_7, first signal output terminal; U4_8, first signal input terminal;

[0047] U5_1, fourth ground terminal; U5_2, fourth voltage input terminal; U5_3, second signal output terminal; U5_4, first signal input terminal;

[0048] F1, fuse. DETAILED DESCRIPTION

[0049] It should be noted that the embodiments and technical features in the utility model can be combined with each other without conflict, and the detailed description in the specific embodiment should be understood as the explanation and description of the purpose of the utility model, and should not be regarded as improper limitation of the utility model.

[0050] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the specific technical scheme of the utility model will be further described in combination with the drawings in the embodiments of the utility model. The following embodiments are used to illustrate the utility model, but not to limit the scope of the utility model.

[0051] In the embodiments of the utility model, the terms "first" and "second" are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first" and "second" can explicitly or implicitly include one or more features. In the description of the embodiments of the utility model, unless otherwise specified, the meaning of "multiple" is two or more.

[0052] In addition, in the embodiments of the utility model, the orientation terms such as "up", "down", "left" and "right" are defined relative to the orientation of the components shown in the drawings, and it should be understood that these directional terms are relative concepts, which are used for relative description and clarification, and they can change accordingly according to the change of the orientation of the components placed in the drawings.

[0053] In the embodiments of the present application, unless otherwise clearly specified and limited, the term "connection" should be interpreted in a broad sense, for example, "connection" can be fixed connection, can also be detachable connection, or integrated; can be directly connected, or indirectly connected through an intermediate medium.

[0054] In the embodiments of the present application, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion. Without more limitations, the element defined by the sentence "including a" does not exclude the presence of other same elements in the process, method, article or device including the element.

[0055] In the embodiments of the present application, the words such as "exemplary" or "for example" are used to represent as an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the words such as "exemplary" or "for example" are intended to present the related in a specific manner.

[0056] Embodiment 1:

[0057] As shown in the Figures 1-5 The utility model provides a kind of isolation communication circuit, applied in first communication circuit, comprising:

[0058] Switch isolation circuit is provided with first power end POWER_1, first enable end U4_5 and first output end, first power end POWER_1 is connected with the first input power of outside, first enable end U4_5 is connected with the signal output end of first communication circuit;

[0059] Voltage conversion circuit is provided with first input end, second output end and first ground terminal GND, first input end is connected with first output end, second output end is connected with load circuit, first ground terminal GND is connected with first reference ground P- and voltage conversion circuit is connected with first reference ground P- and voltage conversion circuit according to first reference ground P- and is exported isolation power supply through second output end.

[0060] Specifically, a switch isolation circuit and a voltage conversion circuit are arranged between the first communication circuit, the switch isolation circuit is used to realize the on-off of the circuit, and the on-off mode is preferably a combination switch circuit of MOS tubes. Alternatively, the on-off of the circuit can be realized by controlling the base of a triode or by controlling the gate of a MOS tube or the base of a triode.

[0061] The first communication circuit is provided with a switch circuit, a first power supply end POWER_1, a first enable end U4_5, and a first output end. The first power supply end POWER_1 is connected with an external first input power supply. The first enable end U4_5 is connected with a signal output end of the first communication circuit. The voltage conversion circuit is provided with a first input end, a second output end, and a first ground end GND. The first input end is connected with the first output end. The second output end is connected with a load circuit. The first ground end GND is connected with the first reference ground P-. The voltage conversion circuit outputs an isolated power supply through the second output end according to the first reference ground P-. The load circuit is provided with the first reference ground P-. When the switch circuit is not turned on, the ground end of the power supply and the ground end of the load circuit are isolated. The voltage conversion circuit is used to stabilize the voltage of the circuit to a voltage suitable for the load. The circuit has a simple structure and low cost.

[0062] In some embodiments, the switch isolation circuit includes a switch circuit and an isolation circuit. The switch circuit is provided with a second input end and a third output end. The isolation circuit includes a third input end and a fourth output end. The second input end is connected with the first enable end U4_5. The third output end is connected with the second input end. The third output end is connected with the first output end. The fourth output end is connected with the first output end.

[0063] Specifically, the switch isolation circuit includes a switch circuit and an isolation circuit; the switch circuit is used for switching the switch isolation circuit, and the isolation circuit is used for isolating the reverse current and isolating the voltage of the power input end and the load circuit. The switch circuit can be a combination switch circuit whose on-off mode is preferably a MOS tube. Alternatively, the switch circuit can be a combination of a transistor, the base of which is controlled to realize the on-off of the circuit, or a combination of a MOS tube and a transistor, the gate of the MOS tube or the base of the transistor being controlled to realize the on-off of the circuit. An isolation element or circuit is arranged in front of the switch circuit to realize the isolation of the circuit and prevent the reverse current from damaging the circuit at the BMS end. The isolation circuit adopts a unidirectional flow device or a controllable unidirectional flow device, such as an optical coupling chip, a diode, a thyristor, and a field effect tube.

[0064] The switch isolation circuit realizes the on-off of the circuit through the switch circuit, can cut off the power supply, and can cut off the connection between the ground end and the first reference ground P-. Meanwhile, the isolation circuit is arranged to prevent the reverse current from flowing into the BMS end and damaging the BMS.

[0065] In some embodiments, the switch circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first MOS tube Q1, and a second MOS tube Q2; the first MOS tube Q1 is an N-channel MOS tube, and the second MOS tube Q2 is a P-channel MOS tube.

[0066] One end of the first resistor R1 is connected to a first enable end U4_5, and the other end of the first resistor R1 is connected to one end of the second resistor R2 and the gate of the first MOS tube Q1. The source of the first MOS tube Q1 is connected to the gate of the second MOS tube Q2 and one end of the third resistor R3. The other end of the third resistor R3 is connected to the source of the second MOS tube Q2 and a first power supply end POWER_1. The drain of the second MOS tube Q2 is connected to a third output end and a second input end. The other end of the second resistor R2 and the drain of the first MOS tube Q1 are connected to a ground end.

[0067] Preferably, the double MOS tubes are used to control the switch, improve the control efficiency, have strong stability, and have low power consumption and low load on the circuit. The first MOS tube Q1 is controlled through the first enable end U4_5 to make the first MOS tube Q1 conduct, and the gate of the second MOS tube Q2 reaches the conduction condition to make the first power supply end POWER_1 conduct through the second MOS tube Q2. In a common setting, the first power supply end POWER_1 is set to 5V, the first resistor R1 can adopt a model of 1KΩ±5%, the second resistor R2 can adopt a model of 51KΩ±1%, the third resistor R3 can adopt a model of 100KΩ±1%, the first MOS tube Q1 can adopt a model of T2N7002BK, and the second MOS tube Q2 can adopt a related signal of BSS84SOT-23.

[0068] The switch circuit controls the on-off of the MOS tube, controls the gate of the first MOS tube Q1 through the first enable end U4_5, and further controls the on-off of the second MOS tube Q2, and enables the second MOS tube Q2 to control the on-off of the entire switch circuit through the first enable end U4_5.

[0069] In some embodiments, the isolation circuit includes a first diode D1, the first diode D1 is provided with an anode end and a cathode end; the anode end is connected to the third input end and the third output end; the cathode end is connected to the first output end and the fourth output end.

[0070] Preferably, the first diode D1 adopts a model of 1SS355-TP.

[0071] By setting the diode, the characteristics of the one-way flow of the diode are utilized, and the reverse current flowing into the BMS battery end is prevented by simple circuit devices.

[0072] In some embodiments, the voltage conversion circuit includes a buck chip U1, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4; the buck chip U1 is provided with a first voltage input end U1_1, a first voltage output end U1_2, and a buck ground end U1_3;

[0073] The first voltage input end U1_1 is connected to the first output end, one end of the first capacitor C1, and the first end of the second capacitor C2; the first voltage output end U1_2, the second output end, one end of the third capacitor C3, and one end of the fourth capacitor C4 are connected; the buck ground end U1_3, the other end of the first capacitor C1, the other end of the second capacitor C2, the other end of the third capacitor C3, and the other end of the fourth capacitor C4 are connected to the first reference ground P-.

[0074] Specifically, the buck chip U1 can adopt a related chip of SGM2203, which can convert 5V input into 3V3 output, at the same time, the first capacitor C1 can adopt a related model capacitor of 4.7μF, the second capacitor C2 can adopt a related model capacitor of 0.1μF, the third capacitor C3 can adopt a related model capacitor of 4.7μF, and the fourth capacitor C4 can adopt a related model capacitor of 0.1μF.

[0075] The reverse diode is set by the buck chip U1 to prevent the direction of the current from flowing in, and isolation and backflow are achieved by a simple structure.

[0076] Embodiment 2:

[0077] Referring to Figure 2 Based on embodiment 1, this embodiment optimizes and explains the circuit mentioned in embodiment 1.

[0078] In some embodiments, the power supply circuit and the load circuit are further provided, the load circuit is provided with a load input end, and the power supply circuit is provided with a first power supply output end and a second power supply output end, the first power supply output end is connected with the first power supply end POWER_1, and the second power supply output end is connected with the first enable end U4_5.

[0079] The load input end is connected with the second output end to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

[0080] Specifically, the power supply circuit is a BMS power supply circuit, the BMS power supply battery pack is used for power supply, 5V power supply of the first power supply end POWER_1 is output through the first power supply output end, and the gate of the first MOS tube Q1 is output through the second power supply output end to realize on-off of the switch isolation circuit.

[0081] The power supply circuit and the load circuit are arranged at both ends of the switch isolation circuit and the voltage conversion circuit to realize electrical isolation.

[0082] In some embodiments, the second communication circuit is further provided between the power supply circuit and the load circuit, the power supply circuit is provided with a first signal output end U4_7 and a first signal input end U5_4U4_8, the load circuit is provided with a second signal output end U5_3 and a second signal input end, and the second communication circuit is provided with a communication isolation chip U2, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8.

[0083] The first isolation power supply end U2_1 is connected with the first enable end U4_5, one end of the fourth resistor R4 and one end of the fifth capacitor C5, the second isolation power supply end U2_2 is connected with the fourth output end and the first output end, one end of the fifth resistor R5 is connected with the first signal input end U5_4U4_8, the other end of the fifth resistor R5 is connected with the third signal output end, one end of the sixth resistor R6 is connected with the first signal output end U4_7, the other end of the sixth resistor R6 is connected with the third signal input end U2_3, one end of the seventh resistor R7 is connected with the second signal output end U5_3, the other end of the seventh resistor R7 is connected with the fourth signal input end U2_5, one end of the eighth resistor R8 is connected with the second signal input end, the other end of the eighth resistor R8 is connected with the fourth signal output end U2_6, the first isolation ground end U2_7 is grounded, and the second isolation ground end U2_8 is connected with the first reference ground P-.

[0084] Specifically, the second communication circuit is arranged between the power supply circuit and the load circuit, and a communication transceiver is usually arranged on the power supply circuit and the load circuit. The second communication circuit is used to isolate the communication transceivers between the power supply circuit and the load circuit, and prevent mutual interference of signals between the power supply circuit and the load circuit. The communication isolation chip U2 can be a related digital isolation chip of the π122u31 type. The chip can provide one end for the power supply circuit input, which includes the power supply circuit input, i.e., the first isolation power supply end U2_1, the power supply circuit transceiver, i.e., the third signal input end U2_3 and the third signal output end U2_4, and the power supply circuit ground, i.e., the first isolation ground end U2_7. At the same time, the other end is provided for the load circuit voltage input end, i.e., the second isolation power supply end U2_2 after the voltage conversion circuit input, and the signal transceiver in the load circuit, i.e., the fourth signal input end U2_5 and the fourth signal output end U2_6, and the second isolation ground end U2_8 of the first reference ground P-. The fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 can all be set to 100Ω±5%. The fifth capacitor C5 can be set to 0.1μF.

[0085] The second communication circuit is a signal isolation circuit. The communication isolation chip U2 is used to isolate the signal reception and signal transmission on both sides of the power supply end and the load end, further improving the isolation capability of the overall circuit. The voltage conversion circuit can also output an isolation voltage for the communication isolation chip U2.

[0086] Embodiment 3:

[0087] Please refer to Figure 2 Based on Embodiment 1 and Embodiment 2, this embodiment further describes the power supply circuit and the load circuit mentioned in the above embodiments.

[0088] In some embodiments, the power supply circuit includes a battery power supply circuit, an analog front-end circuit, and a first control circuit. The battery power supply circuit includes a battery pack, a third MOS tube Q3, a fourth MOS tube Q4, and a fuse F1. The positive electrode of the battery pack is connected to one end of the fuse F1. The other end of the fuse F1 is connected to the source electrode of the third MOS tube Q3. The drain electrode of the third MOS tube Q3 is connected to the drain electrode of the fourth MOS tube Q4. The source electrode of the fourth MOS tube Q4 is connected to the negative electrode of the battery pack. The third MOS tube Q3 and the fourth MOS tube Q4 are both N-channel MOS tubes.

[0089] Specifically, the power supply circuit includes a battery power supply circuit, i.e., a BMS battery pack and related circuits, an analog front-end circuit, i.e., a circuit for detecting the operating state of the battery pack, and a first control circuit, which is a circuit for controlling and transceiving feedback from the load circuit, and can also control and turn on / off the circuit to prevent affecting the subsequent output when the voltage of the battery pack in the circuit has a problem. The model of the third MOS tube Q3 and the fourth MOS tube Q4 can be the same as that of the first MOS tube Q1 and / or the second MOS tube Q2.

[0090] The power supply circuit is powered by the battery pack, and the analog front-end circuit is arranged to monitor the operating state of the battery pack, such as voltage and current, and to process signals; at the same time, the first control circuit is arranged to control power supply, such as the first enable end U4_5, and to transceive signals.

[0091] In some embodiments, the analog front-end circuit includes an analog front-end chip U3; the analog front-end chip U3 includes a plurality of second voltage input ends U3_1, a first control end U3_2, a second control end U3_3, a first serial data end U3_4, and a first serial clock end U3_5; the first control circuit includes a first control chip U4, a ninth resistor R9, a tenth resistor R10, and a plurality of eleventh resistors R11; the first control chip U4 is provided with a second serial data end U4_1, a second serial clock end U4_2, a third voltage input end U4_3, and a third ground end U4_4, and the first enable end U4_5, the first signal output end U4_7, and the first signal input end U5_4U4_8 are all arranged on the first control chip U4; the battery pack is provided with a second voltage output end between each two batteries;

[0092] The second voltage output end is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the second voltage input end U3_1; the first control end U3_2 is connected to the gate of the third MOS tube Q3, and the second control end U3_3 is connected to the gate of the fourth MOS tube Q4; one end of the ninth resistor R9 is connected to the first serial data end U3_4, and the other end of the ninth resistor R9 is connected to the second serial data end U4_1; one end of the tenth resistor R10 is connected to the first serial clock end U3_5, and the other end of the tenth resistor R10 is connected to the second serial clock end U4_2; the third voltage input end U4_3 is connected between one end of the fuse F1 and the drain of the third MOS tube Q3; the third ground end U4_4 is grounded.

[0093] Specifically, the analog front-end circuit includes an analog front-end chip U3, which can be an MS99x0T series, including MS9920T\MS9930T, etc.; or an ADI LTC6813 series chip, etc.; or an ADS1278SHFQ series chip, or a crystal micro SDM911X series, etc. The first control end U3_2 and the second control end U3_3 control the gate of the third MOS tube Q3 and the fourth MOS tube Q4 respectively, so as to ensure that the entire power supply circuit can be turned on and off in time. The ninth resistor R9 and the tenth resistor R10 can be determined according to the selection of the first control chip U4, or a conventional serial data connection voltage dividing protection resistor is selected. The eleventh resistor R11 is selected according to the voltage dividing resistor required by the battery of the selected BMS battery pack. The first control chip U4 is an MCU, which can be an 8-bit, 16-bit or 32-bit MCU chip, and a related signal chip such as ADI\TI\ST\NXP is selected according to the demand, wherein the first control chip U4 can be directly powered by the battery power supply circuit.

[0094] The analog front-end chip U3 is connected between two batteries, and controls the on-off of the power supply circuit through the control end, prevents load damage caused by power supply abnormalities or short circuit problems, and prevents battery pack damage caused by current backflow, and further improves the circuit isolation capability.

[0095] In some embodiments, the load circuit includes a second control circuit; the second control circuit is provided with a second control chip U5, the second control chip U5 is provided with a fourth ground end U5_1, a fourth voltage input end U5_2, and a second signal output end U5_3 and a second signal input end are arranged on the second control chip U5; the fourth ground end U5_1 is connected to the first reference ground P-, and the fourth voltage input end U5_2 is connected between one end of the fuse F1 and the drain of the third MOS tube Q3.

[0096] Specifically, the second control chip U5 is also an MCU, which can be selected according to the specific design of the circuit or the design according to the load, and the selection can be consistent with the first control chip U4 or select a suitable chip in the above range for circuit design.

[0097] The load circuit is provided with the second control chip U5, which is powered by the BMS power supply system, so that the second control chip U5 can be driven or control other load circuits, and the second control chip U5 can further isolate other load circuits. When power supply abnormalities or load abnormalities occur, the circuit connection can be cut off in time through the second control chip U5.

[0098] The utility model embodiment serial number only for description, not represent the pros and cons of the embodiment. The above is only the preferred embodiment of the utility model, and does not limit the patent range of the utility model, and any equivalent device or equivalent process transformation using the utility model specification and attached drawing contents, or directly or indirectly used in other related technical fields, are also included in the patent protection range of the utility model.

Claims

1. An isolated communication circuit, characterized in that, Applied in the first communication circuit, including: A switch isolation circuit is provided with a first power supply terminal, a first enable terminal and a first output terminal. The first power supply terminal is connected to an external first input power supply, and the first enable terminal is connected to the signal output terminal of the first communication circuit. The voltage conversion circuit has a first input terminal, a second output terminal, and a first ground terminal. The first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, and the first ground terminal is connected to a first reference ground. The voltage conversion circuit outputs an isolated power supply through the second output terminal according to the first reference ground.

2. The isolated communication circuit according to claim 1, characterized in that, The switch isolation circuit includes a switch circuit and an isolation circuit. The switch circuit has a second input terminal and a third output terminal. The isolation circuit has a third input terminal and a fourth output terminal. The second input terminal is connected to the first enable terminal, the third output terminal is connected to the second input terminal, the third output terminal is connected to the first output terminal, and the fourth output terminal is connected to the first output terminal.

3. The isolated communication circuit according to claim 2, characterized in that, The switching circuit includes a first resistor, a second resistor, a third resistor, a first MOSFET, and a second MOSFET; the first MOSFET is an N-channel MOSFET, and the second MOSFET is a P-channel MOSFET. One end of the first resistor is connected to the first enable terminal, and the other end of the first resistor is connected to one end of the second resistor and the gate of the first MOS transistor. The source of the first MOSFET is connected to the gate of the second MOSFET and one end of the third resistor; the other end of the third resistor is connected to the source of the second MOSFET and the first power supply terminal; the drain of the second MOSFET is connected to the third output terminal and the second input terminal; the other end of the second resistor, the drain of the first MOSFET, and the ground terminal are connected.

4. The isolated communication circuit according to claim 2, characterized in that, The isolation circuit includes a first diode, which has an anode and a cathode. The anode is connected to the third input terminal and the third output terminal. The cathode is connected to the first output terminal and the fourth output terminal.

5. The isolated communication circuit according to claim 2, characterized in that, The voltage conversion circuit includes a step-down chip, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor; the step-down chip is provided with a first voltage input terminal, a first voltage output terminal, and a step-down ground terminal; The first voltage input terminal is connected to the first output terminal, one end of the first capacitor, and the first end of the second capacitor; the first voltage output terminal, the second output terminal, one end of the third capacitor, and one end of the fourth capacitor are connected. The step-down ground terminal, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are connected to the first reference ground.

6. The isolated communication circuit according to claim 2, characterized in that, It also includes a power supply circuit and a load circuit. The load circuit is provided with a load input terminal, and the power supply circuit is provided with a first power supply output terminal and a second power supply output terminal. The first power supply output terminal is connected to the first power supply terminal, and the second power supply output terminal is connected to the first enable terminal. The load input terminal is connected to the second output terminal to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

7. The isolated communication circuit according to claim 6, characterized in that, It also includes a second communication circuit, which is disposed between the power supply circuit and the load circuit; the power supply circuit is provided with a first signal output terminal and a first signal input terminal; the load circuit is provided with a second signal output terminal and a second signal input terminal; the second communication circuit is provided with a communication isolation chip, a fifth capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; the communication isolation chip is provided with a first isolation power supply terminal, a second isolation power supply terminal, a third signal input terminal, a third signal output terminal, a fourth signal input terminal, a fourth signal output terminal, a first isolation ground terminal, and a second isolation ground terminal; The first isolated power supply terminal is connected to the first enable terminal, one end of the fourth resistor, and one end of the fifth capacitor; the second isolated power supply terminal is connected to the fourth output terminal and the first output terminal; one end of the fifth resistor is connected to the first signal input terminal; the other end of the fifth resistor is connected to the third signal output terminal; one end of the sixth resistor is connected to the first signal output terminal; the other end of the sixth resistor is connected to the third signal input terminal; one end of the seventh resistor is connected to the second signal output terminal; the other end of the seventh resistor is connected to the fourth signal input terminal; one end of the eighth resistor is connected to the second signal input terminal; the other end of the eighth resistor is connected to the fourth signal output terminal; the first isolated ground terminal is grounded, and the second isolated ground terminal is connected to the first reference ground terminal.

8. The isolated communication circuit according to claim 7, characterized in that, The power supply circuit includes a battery power supply circuit, an analog front-end circuit, and a first control circuit; the battery power supply circuit includes a battery pack, a third MOSFET, a fourth MOSFET, and a fuse; the positive terminal of the battery pack is connected to one end of the fuse; the other end of the fuse is connected to the source of the third MOSFET; the drain of the third MOSFET is connected to the drain of the fourth MOSFET; the source of the fourth MOSFET is connected to the cathode of the battery pack; wherein, the third MOSFET and the fourth MOSFET are both N-channel MOSFETs.

9. The isolated communication circuit according to claim 8, characterized in that, The analog front-end circuit includes an analog front-end chip; the analog front-end chip includes several second voltage input terminals, a first control terminal, a second control terminal, a first serial data terminal, and a first serial clock terminal; the first control circuit includes a first control chip, a ninth resistor, a tenth resistor, and several eleventh resistors; the first control chip is provided with a second serial data terminal, a second serial clock terminal, a third voltage input terminal, and a third ground terminal, and the first enable terminal, the first signal output terminal, and the first signal input terminal are all provided on the first control chip; the battery pack has a second voltage output terminal between each pair of batteries; The second voltage output terminal is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the second voltage input terminal; the first control terminal is connected to the gate of the third MOS transistor, and the second control terminal is connected to the gate of the fourth MOS transistor; one end of the ninth resistor is connected to the first serial data terminal, and the other end of the ninth resistor is connected to the second serial data terminal. One end of the tenth resistor is connected to the first serial clock terminal, and the other end of the tenth resistor is connected to the second serial clock terminal; The third voltage input terminal is connected between one end of the fuse and the drain of the third MOSFET; the third ground terminal is grounded.

10. The isolated communication circuit according to claim 9, characterized in that, The load circuit includes a second control circuit; the second control circuit is provided with a second control chip, the second control chip is provided with a fourth ground terminal and a fourth voltage input terminal, and the second signal output terminal and the second signal input terminal are both provided on the second control chip; the fourth ground terminal is connected to the first reference ground, and the fourth voltage input terminal is connected between one end of the fuse and the drain of the third MOS transistor.

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