Voltage-sharing circuit for DC-DC converter

Abstract

The utility model discloses a voltage-sharing circuit for a DC-DC converter. The voltage-sharing circuit comprises a main power circuit, a sampling drive circuit and a microcontroller. The main power circuit comprises a first power circuit and a second power circuit; the sampling driving circuit comprises a first sampling driving circuit and a second sampling driving circuit; the first end of the first power circuit is connected with the output end of the first DC-DC converter, and the second end of the first power circuit is connected with the first end of the first sampling driving circuit; the first end of the second power circuit is connected with the output end of the second DC-DC converter, the second end of the second power circuit is connected with the first end of the second sampling drive circuit, and the second end of the first sampling drive circuit and the second end of the second sampling drive circuit are connected with the microcontroller. According to the invention, input series connection and output parallel connection of commercially available stabilized power supply modules can be rapidly combined, and the problem that corresponding products cannot be found due to the fact that the DC-DC converter requirement is improved after the input voltage is increased is reduced.

Description

Technical Field

[0001] This utility model relates to the field of voltage conversion technology, specifically to a voltage equalization circuit for a DC-DC converter. Background Technology

[0002] With the increasing demand for high-efficiency and high-reliability power supplies in modern electronic devices, DC-DC converters are playing an increasingly important role in power management systems. Especially in long-distance signal transmission and high-voltage power supply applications, traditional low-voltage power supply designs often cannot meet the requirements for transmission efficiency and signal integrity. Therefore, increasing the supply voltage becomes an effective solution to reduce transmission losses in the wires.

[0003] In related technologies, with the increase in power supply voltage, the selection of DC-DC converters becomes more difficult in scenarios that require the use of DC-DC converters. Previously conventional models cannot meet the application scenarios of high voltage, and at the same time, the cost of high voltage DC-DC converters is several times higher than that of conventional models, and it is even impossible to find products that meet the requirements. Utility Model Content

[0004] Therefore, this utility model provides a voltage equalization circuit for a DC-DC converter to solve the problem that conventional DC-DC converters cannot meet the requirements of high-voltage application scenarios.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A voltage equalization circuit for a DC-DC converter includes a main power circuit, a sampling drive circuit, and a microcontroller;

[0007] The main power circuit includes a first power circuit and a second power circuit.

[0008] The sampling drive circuit includes a first sampling drive circuit and a second sampling drive circuit.

[0009] The first terminal of the first power circuit is connected to the output terminal of the first DC-DC converter, the second terminal of the first power circuit is connected to the first terminal of the first sampling drive circuit, and the second terminal of the first sampling drive circuit is connected to the microcontroller.

[0010] The first terminal of the second power circuit is connected to the output terminal of the second DC-DC converter, and the second terminal of the second power circuit is connected to the first terminal of the second sampling drive circuit; the second terminal of the second sampling drive circuit is connected to the microcontroller.

[0011] Optionally, the first power circuit includes a first field-effect transistor Q1, a second field-effect transistor Q2, a first inductor L1, a first capacitor C1, and a first 194 resistor R194;

[0012] The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1HG via the fifteenth resistor R15, and the other path is connected to one end of the thirteenth resistor R13. The second terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to the positive terminal of the DC-DC converter, the second path is connected to one end of the third capacitor C3, the third path is connected to one end of the seventh capacitor C7, and the fourth path is connected to one end of the second inductor L2. The third terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to one end of the first inductor L1, the second path is connected to the other end of the thirteenth resistor R13, the third path is connected to PWM1HS, and the fourth path is connected to the second terminal of the second field-effect transistor Q2.

[0013] The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1LG via the sixteenth resistor R16, and the other path is connected to one end of the twelfth resistor R12; the third terminal of the first field-effect transistor Q1 is connected to the negative terminal of the DC-DC converter.

[0014] The other end of the first inductor L1 is divided into two paths: one path is connected to the negative terminal of the DC-DC converter via the first capacitor C1, and the other path is connected to the negative terminal of the DC-DC converter via the first 194 resistor R194.

[0015] The other end of the second inductor L2 is connected to the positive terminal of the high-voltage power supply HV, and the other ends of the third capacitor C3 and the seventh capacitor C7 are both grounded.

[0016] Optionally, the first power circuit further includes a first resistor R1, a second resistor R2 and a third resistor R3, and a fourth capacitor C4;

[0017] One end of the first resistor R1 is connected to the positive terminal of the DC-DC converter, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to one end of the third resistor R3, the other end of the third resistor R3 is connected to the negative terminal of the DC-DC converter, and the connection end of the second resistor R2 and the third resistor R3 is the output terminal of the first sampling signal ADC1.

[0018] One end of the fourth capacitor C4 is connected to the positive terminal of the DC-DC converter, and the other end of the fourth capacitor C4 is connected to the negative terminal of the DC-DC converter.

[0019] Optionally, the first power circuit further includes a first diode D1, a second diode D2, and a third diode D3;

[0020] The cathode of the first diode D1 is connected to the anode of the DC-DC converter, the anode of the first diode D1 is connected to the cathode of the second diode D2, the anode of the second diode D2 is connected to the cathode of the third diode D3, and the anode of the third diode D3 is connected to the cathode of the DC-DC converter.

[0021] Optionally, the first sampling driving circuit includes a third chip U3, and the third chip U3 includes a TLP350 chip;

[0022] Pins 1 and 4 of the third chip U3 are both left floating; pin 2 of the third chip U3 is connected to the 3.3V voltage output terminal via the seventh resistor R7; pin 3 of the third chip U3 is connected to the microcontroller; pin 5 of the third chip U3 is grounded; pin 6 of the third chip U3 is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the first power circuit; pin 7 of the third chip U3 is connected to pin 6 of the third chip U3; and pin 8 of the third chip U3 is connected to the 15V power output terminal.

[0023] Optionally, the first sampling driving circuit further includes a fourth chip U4;

[0024] The first pin of the fourth chip U4 is divided into four paths: the first path is connected to the power output terminal, the second path is connected to one end of the fourteenth resistor R14, the third path is connected to the negative terminal of the seventh diode D7, and the fourth path is connected to one end of the twelfth capacitor C12; the second pin of the fourth chip U4 is connected to the first power circuit; the third pin of the fourth chip U4 is connected to the fourth pin of the fourth chip U4; the fourth pin of the fourth chip U4 is divided into three paths: one path is connected to the positive terminal of the seventh diode D7, another path is connected to the other end of the twelfth capacitor C12, and the third path is connected to the negative terminal of the first DC-DC converter; the fifth pin of the fourth chip U4 is grounded; the sixth and seventh pins of the fourth chip U4 are respectively connected to the microcontroller; the eighth pin of the fourth chip U4 is connected to the 3.3V voltage output terminal.

[0025] The other end of the fourteenth resistor R14 is connected to the 12V voltage output terminal.

[0026] Optionally, the first sampling driving circuit further includes a fifth chip U5 and a seventh chip U7; the fifth chip U5 is a JSM2101STR chip, and the seventh chip U7 is an ADUM1200AR chip;

[0027] Pin 1 of the fifth chip U5 is connected to the 12V voltage output terminal; pin 2 of the fifth chip U5 is connected to pin 7 of the seventh chip U7; pin 3 of the fifth chip U5 is connected to pin 6 of the seventh chip U7; pin 4 of the fifth chip U5 is connected to pin 5 of the seventh chip U7; pins 5, 6, and 7 of the fifth chip U5 are respectively connected to the first power circuit; pin 6 of the fifth chip U5 is also connected to one end of the thirteenth capacitor C13; pin 8 of the fifth chip U5 is divided into two paths, one path is connected to the other end of the thirteenth capacitor C13, and the other path is connected to the negative terminal of the sixth diode D6, the positive terminal of the sixth diode D6 is connected to the 12V voltage output terminal;

[0028] The first pin of the seventh chip U7 is connected to the 3.3V voltage output terminal; the second and third pins of the seventh chip U7 are respectively connected to the microcontroller; the fourth pin of the seventh chip U7 is grounded; and the eighth pin of the seventh chip U7 is connected to the 5V voltage output terminal.

[0029] Optionally, the microcontroller includes a first chip U1, which is an F280025PTQR microcontroller.

[0030] Optionally, the voltage equalization circuit further includes a reset circuit, which includes a capacitor C374 (374th capacitor) and a resistor R193 (193rd resistor).

[0031] One end of the third 174 capacitor C374 is connected to the third pin of the first chip U1, and the other end of the third 174 capacitor C374 is grounded.

[0032] One end of the first 193 resistor R193 is connected to the 3.3V voltage output terminal, and the other end of the first 193 resistor R193 is connected to the third pin of the first chip U1.

[0033] Optionally, the voltage equalization circuit further includes a clock circuit, which includes a first crystal oscillator X1, an eighty-first capacitor C81, and an eighty-second capacitor C82.

[0034] One end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 33 of the first chip U1, and the other path is connected to one end of the eighty-second capacitor C82. The other end of the eighty-second capacitor C82 is grounded.

[0035] The other end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 34 of the first chip U1, and the other path is connected to one end of the eighty-first capacitor C81. The other end of the eighty-first capacitor C81 is grounded.

[0036] This utility model has at least the following beneficial effects:

[0037] This utility model provides a voltage equalization circuit for a DC-DC converter, including a main power circuit, a sampling drive circuit, and a microcontroller. The main power circuit includes a first power circuit and a second power circuit. The sampling drive circuit includes a first sampling drive circuit and a second sampling drive circuit. A first terminal of the first power circuit is connected to the output terminal of a first DC-DC converter, a second terminal of the first power circuit is connected to the first terminal of the first sampling drive circuit, and a second terminal of the first sampling drive circuit is connected to the microcontroller. A first terminal of the second power circuit is connected to the output terminal of a second DC-DC converter, a second terminal of the second power circuit is connected to the first terminal of the second sampling drive circuit, and a second terminal of the second sampling drive circuit is connected to the microcontroller. This application enables the rapid combination of input series and output parallel connections of commercially available voltage regulator modules, reducing the problem of not being able to find corresponding products due to increased input voltage raising the requirements of DC-DC converters, reducing economic costs, and maintaining product consistency. Attached Figure Description

[0038] To more clearly illustrate the prior art and the present invention, the accompanying drawings used in the description of the prior art and the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are merely exemplary, and those skilled in the art can derive other drawings from the provided drawings without any creative effort.

[0039] The structures, proportions, sizes, etc. illustrated in this specification are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the conditions under which this utility model can be implemented. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and purposes that this utility model can produce, should still fall within the scope of the technical content disclosed in this utility model.

[0040] Figure 1 A circuit block diagram of a voltage equalization circuit for a DC-DC converter provided in this embodiment of the present invention;

[0041] Figure 2 A circuit schematic diagram of a main power circuit provided for an embodiment of this utility model;

[0042] Figure 3 A circuit schematic diagram of a sampling drive circuit provided for an embodiment of this utility model;

[0043] Figure 4A circuit diagram of a microcontroller provided for an embodiment of this utility model. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0045] In the description of this utility model, unless otherwise stated, "a plurality of" means two or more. The terms "first," "second," "third," "fourth," etc. (if present), in the specification, claims, and accompanying drawings of this utility model are intended to distinguish the objects they refer to. For solutions with a sequential flow, this terminology need not be interpreted as describing a specific order or sequence; for solutions with device structures, this terminology does not distinguish between matters of importance or positional relationships.

[0046] Furthermore, the terms “comprising,” “having,” and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are expressly listed, but may also include other steps or units that are not expressly listed but are inherent to these processes, methods, products, or devices, or steps or units added based on further optimizations of the inventive concept.

[0047] like Figure 1 As shown, a voltage equalization circuit for a DC-DC converter includes a main power circuit, a sampling drive circuit, and a microcontroller.

[0048] The main power circuit includes a first power circuit and a second power circuit.

[0049] The sampling drive circuit includes a first sampling drive circuit and a second sampling drive circuit.

[0050] The first terminal of the first power circuit is connected to the output terminal of the first DC-DC converter, the second terminal of the first power circuit is connected to the first terminal of the first sampling drive circuit, and the second terminal of the first sampling drive circuit is connected to the microcontroller.

[0051] The first terminal of the second power circuit is connected to the output terminal of the second DC-DC converter, and the second terminal of the second power circuit is connected to the first terminal of the second sampling drive circuit; the second terminal of the second sampling drive circuit is connected to the microcontroller.

[0052] In one embodiment, the first power circuit includes a first field-effect transistor Q1, a second field-effect transistor Q2, a first inductor L1, a first capacitor C1, and a first 194 resistor R194.

[0053] The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1HG via the fifteenth resistor R15, and the other path is connected to one end of the thirteenth resistor R13. The second terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to the positive terminal of the DC-DC converter, the second path is connected to one end of the third capacitor C3, the third path is connected to one end of the seventh capacitor C7, and the fourth path is connected to one end of the second inductor L2. The third terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to one end of the first inductor L1, the second path is connected to the other end of the thirteenth resistor R13, the third path is connected to PWM1HS, and the fourth path is connected to the second terminal of the second field-effect transistor Q2.

[0054] The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1LG via the sixteenth resistor R16, and the other path is connected to one end of the twelfth resistor R12; the third terminal of the first field-effect transistor Q1 is connected to the negative terminal of the DC-DC converter.

[0055] The other end of the first inductor L1 is divided into two paths: one path is connected to the negative terminal of the DC-DC converter via the first capacitor C1, and the other path is connected to the negative terminal of the DC-DC converter via the first 194 resistor R194.

[0056] The other end of the second inductor L2 is connected to the positive terminal of the high-voltage power supply HV, and the other ends of the third capacitor C3 and the seventh capacitor C7 are both grounded.

[0057] In one embodiment, the first power circuit further includes a first resistor R1, a second resistor R2 and a third resistor R3, and a fourth capacitor C4;

[0058] One end of the first resistor R1 is connected to the positive terminal of the DC-DC converter, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to one end of the third resistor R3, the other end of the third resistor R3 is connected to the negative terminal of the DC-DC converter, and the connection end of the second resistor R2 and the third resistor R3 is the output terminal of the first sampling signal ADC1.

[0059] One end of the fourth capacitor C4 is connected to the positive terminal of the DC-DC converter, and the other end of the fourth capacitor C4 is connected to the negative terminal of the DC-DC converter.

[0060] In one embodiment, the first power circuit further includes a first diode D1, a second diode D2, and a third diode D3;

[0061] The cathode of the first diode D1 is connected to the anode of the DC-DC converter, the anode of the first diode D1 is connected to the cathode of the second diode D2, the anode of the second diode D2 is connected to the cathode of the third diode D3, and the anode of the third diode D3 is connected to the cathode of the DC-DC converter.

[0062] In one embodiment, the first sampling driving circuit includes a third chip U3, and the third chip U3 includes a TLP350 chip;

[0063] Pins 1 and 4 of the third chip U3 are both left floating; pin 2 of the third chip U3 is connected to the 3.3V voltage output terminal via the seventh resistor R7; pin 3 of the third chip U3 is connected to the microcontroller; pin 5 of the third chip U3 is grounded; pin 6 of the third chip U3 is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the first power circuit; pin 7 of the third chip U3 is connected to pin 6 of the third chip U3; and pin 8 of the third chip U3 is connected to the 15V power output terminal.

[0064] In one embodiment, the first sampling driving circuit further includes a fourth chip U4;

[0065] The first pin of the fourth chip U4 is divided into four paths: the first path is connected to the power output terminal, the second path is connected to one end of the fourteenth resistor R14, the third path is connected to the negative terminal of the seventh diode D7, and the fourth path is connected to one end of the twelfth capacitor C12; the second pin of the fourth chip U4 is connected to the first power circuit; the third pin of the fourth chip U4 is connected to the fourth pin of the fourth chip U4; the fourth pin of the fourth chip U4 is divided into three paths: one path is connected to the positive terminal of the seventh diode D7, another path is connected to the other end of the twelfth capacitor C12, and the third path is connected to the negative terminal of the first DC-DC converter; the fifth pin of the fourth chip U4 is grounded; the sixth and seventh pins of the fourth chip U4 are respectively connected to the microcontroller; the eighth pin of the fourth chip U4 is connected to the 3.3V voltage output terminal.

[0066] The other end of the fourteenth resistor R14 is connected to the 12V voltage output terminal.

[0067] In one embodiment, the first sampling driving circuit further includes a fifth chip U5 and a seventh chip U7; the fifth chip U5 is a JSM2101STR chip, and the seventh chip U7 is an ADUM1200AR chip;

[0068] Pin 1 of the fifth chip U5 is connected to the 12V voltage output terminal; pin 2 of the fifth chip U5 is connected to pin 7 of the seventh chip U7; pin 3 of the fifth chip U5 is connected to pin 6 of the seventh chip U7; pin 4 of the fifth chip U5 is connected to pin 5 of the seventh chip U7; pins 5, 6, and 7 of the fifth chip U5 are respectively connected to the first power circuit; pin 6 of the fifth chip U5 is also connected to one end of the thirteenth capacitor C13; pin 8 of the fifth chip U5 is divided into two paths, one path is connected to the other end of the thirteenth capacitor C13, and the other path is connected to the negative terminal of the sixth diode D6, the positive terminal of the sixth diode D6 is connected to the 12V voltage output terminal;

[0069] The first pin of the seventh chip U7 is connected to the 3.3V voltage output terminal; the second and third pins of the seventh chip U7 are respectively connected to the microcontroller; the fourth pin of the seventh chip U7 is grounded; and the eighth pin of the seventh chip U7 is connected to the 5V voltage output terminal.

[0070] In one embodiment, the microcontroller includes a first chip U1, which is an F280025PTQR microcontroller.

[0071] In one embodiment, the voltage equalization circuit further includes a reset circuit, which includes a capacitor C374 (374th capacitor) and a resistor R193 (193rd resistor).

[0072] One end of the third 174 capacitor C374 is connected to the third pin of the first chip U1, and the other end of the third 174 capacitor C374 is grounded.

[0073] One end of the first 193 resistor R193 is connected to the 3.3V voltage output terminal, and the other end of the first 193 resistor R193 is connected to the third pin of the first chip U1.

[0074] In one embodiment, the voltage equalization circuit further includes a clock circuit, which includes a first crystal oscillator X1, an eighty-first capacitor C81, and an eighty-second capacitor C82.

[0075] One end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 33 of the first chip U1, and the other path is connected to one end of the eighty-second capacitor C82. The other end of the eighty-second capacitor C82 is grounded.

[0076] The other end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 34 of the first chip U1, and the other path is connected to one end of the eighty-first capacitor C81. The other end of the eighty-first capacitor C81 is grounded.

[0077] This embodiment can quickly combine commercially available voltage regulator modules by connecting them in series at the input and in parallel at the output. This reduces the problem of not being able to find a corresponding product due to the increased requirements of DC-DC converters after the input voltage increases, thereby reducing economic costs and maintaining product consistency.

[0078] In one embodiment, such as Figures 2-4 As shown, the overall circuit consists of three parts: the main power circuit, the microprocessor minimum system part, and the sampling drive circuit.

[0079] The main circuit includes an active voltage equalization circuit consisting of MOSFETs Q1 and Q2, inductor L1, capacitor C1, resistors R194, R15, R13, R16, and R12. Pin 2 of Q1 is connected to the positive terminal of the DC-DC converter, and pin 3 is connected to inductor L1 and pin 2 of Q2. Pin 3 of Q2 is connected to the negative terminal of the DC-DC converter. When the voltage across the converter (VOUT1+, VOUT1-) is higher than that of another converter, MOSFET Q1 turns on, MOSFET Q2 turns off, and L1 is charged, causing the overall current to increase and thus the voltage divider to decrease. Conversely, when the voltage across the converter (VOUT1+, VOUT1-) is lower, MOSFET Q2 turns on and Q1 turns off, and the inductor discharges, causing the overall current to decrease and thus the voltage divider to increase. Pin 2 of inductor L1 is connected to capacitor C1, and the other end of C1 is connected to the negative terminal of the DC-DC converter. Resistor R194 is connected in parallel with C1. A sampling circuit consisting of resistors R1, R2, and R3 passes the voltage signal ADC1, and capacitor C4 is connected in parallel across the DC-DC converter to handle the voltage. TVS Zener diodes D1, D2, and D3 are connected in series across the DC-DC converter to absorb voltage spikes. Q5 and R9 form a soft-start circuit.

[0080] The processor chip uses a high-performance microcontroller from Texas Instruments. The data processing circuit is responsible for the logic processing and closed-loop operations. It includes a high-performance processor U1 from Texas Instruments, and the reset circuit includes capacitor C374 and pull-up resistor R193. The clock circuit includes a crystal oscillator X1 and matching capacitors C82 and C81, as well as power supply decoupling capacitors C8, C9, C11, and C10.

[0081] The sampling drive circuit consists of three parts: U3, R7, and R8, which together form the drive circuit for the soft-start MOSFET Q5. U83 is an isolation power supply that powers U4, U5, and U7. The driver circuit for Q1 and Q2 is composed of the digital isolation chip U7, the half-bridge driver U5, and the peripheral circuits D6 and C13. U14 is an isolation amplifier that converts the voltage signal ADC1 into isolated differential signals ADCCH1P and ADCCH1N, which are then input to the microcontroller.

[0082] This embodiment uses a microcontroller to incorporate power and sampling circuits. Existing DC-DC converters are connected in series to increase the overall system's input voltage. Each DC-DC converter provides an input voltage equalization circuit. The reference voltage of the equalization circuit is the average value of the total input voltage, Vin / N. The operating state of the equalization circuit is adjusted in real time based on feedback from the detection circuit to ensure that the input voltage of a single module exceeds the rated voltage of the DC-DC converter, operating within a safe operating range.

[0083] The embodiments described above merely illustrate specific implementations of this utility model, and while the descriptions are detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these modifications and improvements all fall within the protection scope of this utility model.

Claims

1. A voltage equalization circuit for a DC-DC converter, characterized in that, Includes main power circuit, sampling drive circuit and microcontroller; The main power circuit includes a first power circuit and a second power circuit. The sampling drive circuit includes a first sampling drive circuit and a second sampling drive circuit. The first terminal of the first power circuit is connected to the output terminal of the first DC-DC converter, the second terminal of the first power circuit is connected to the first terminal of the first sampling drive circuit, and the second terminal of the first sampling drive circuit is connected to the microcontroller. The first terminal of the second power circuit is connected to the output terminal of the second DC-DC converter, and the second terminal of the second power circuit is connected to the first terminal of the second sampling drive circuit; the second terminal of the second sampling drive circuit is connected to the microcontroller.

2. The voltage equalization circuit for a DC-DC converter according to claim 1, characterized in that, The first power circuit includes a first field-effect transistor Q1, a second field-effect transistor Q2, a first inductor L1, a first capacitor C1, and a first 194 resistor R194; The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1HG via the fifteenth resistor R15, and the other path is connected to one end of the thirteenth resistor R13. The second terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to the positive terminal of the DC-DC converter, the second path is connected to one end of the third capacitor C3, the third path is connected to one end of the seventh capacitor C7, and the fourth path is connected to one end of the second inductor L2. The third terminal of the first field-effect transistor Q1 is divided into four paths: the first path is connected to one end of the first inductor L1, the second path is connected to the other end of the thirteenth resistor R13, the third path is connected to PWM1HS, and the fourth path is connected to the second terminal of the second field-effect transistor Q2. The first terminal of the first field-effect transistor Q1 is divided into two paths: one path is connected to PWM1LG via the sixteenth resistor R16, and the other path is connected to one end of the twelfth resistor R12; the third terminal of the first field-effect transistor Q1 is connected to the negative terminal of the DC-DC converter. The other end of the first inductor L1 is divided into two paths: one path is connected to the negative terminal of the DC-DC converter via the first capacitor C1, and the other path is connected to the negative terminal of the DC-DC converter via the first 194 resistor R194. The other end of the second inductor L2 is connected to the positive terminal of the high-voltage power supply HV, and the other ends of the third capacitor C3 and the seventh capacitor C7 are both grounded.

3. The voltage equalization circuit for a DC-DC converter according to claim 2, characterized in that, The first power circuit also includes a first resistor R1, a second resistor R2 and a third resistor R3, and a fourth capacitor C4; One end of the first resistor R1 is connected to the positive terminal of the DC-DC converter, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to one end of the third resistor R3, the other end of the third resistor R3 is connected to the negative terminal of the DC-DC converter, and the connection end of the second resistor R2 and the third resistor R3 is the output terminal of the first sampling signal ADC1. One end of the fourth capacitor C4 is connected to the positive terminal of the DC-DC converter, and the other end of the fourth capacitor C4 is connected to the negative terminal of the DC-DC converter.

4. The voltage equalization circuit for a DC-DC converter according to claim 2, characterized in that, The first power circuit also includes a first diode D1, a second diode D2, and a third diode D3; The cathode of the first diode D1 is connected to the anode of the DC-DC converter, the anode of the first diode D1 is connected to the cathode of the second diode D2, the anode of the second diode D2 is connected to the cathode of the third diode D3, and the anode of the third diode D3 is connected to the cathode of the DC-DC converter.

5. The voltage equalization circuit for a DC-DC converter according to claim 1, characterized in that, The first sampling driving circuit includes a third chip U3, and the third chip U3 includes a TLP350 chip; Pins 1 and 4 of the third chip U3 are both left floating; pin 2 of the third chip U3 is connected to the 3.3V voltage output terminal via the seventh resistor R7; pin 3 of the third chip U3 is connected to the microcontroller; pin 5 of the third chip U3 is grounded; pin 6 of the third chip U3 is connected to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected to the first power circuit; pin 7 of the third chip U3 is connected to pin 6 of the third chip U3; and pin 8 of the third chip U3 is connected to the 15V power output terminal.

6. The voltage equalization circuit for a DC-DC converter according to claim 1, characterized in that, The first sampling driving circuit also includes a fourth chip U4; The first pin of the fourth chip U4 is divided into four paths: the first path is connected to the power output terminal, the second path is connected to one end of the fourteenth resistor R14, the third path is connected to the negative terminal of the seventh diode D7, and the fourth path is connected to one end of the twelfth capacitor C12; the second pin of the fourth chip U4 is connected to the first power circuit; the third pin of the fourth chip U4 is connected to the fourth pin of the fourth chip U4; the fourth pin of the fourth chip U4 is divided into three paths: one path is connected to the positive terminal of the seventh diode D7, another path is connected to the other end of the twelfth capacitor C12, and the third path is connected to the negative terminal of the first DC-DC converter; the fifth pin of the fourth chip U4 is grounded; the sixth and seventh pins of the fourth chip U4 are respectively connected to the microcontroller; the eighth pin of the fourth chip U4 is connected to the 3.3V voltage output terminal. The other end of the fourteenth resistor R14 is connected to the 12V voltage output terminal.

7. The voltage equalization circuit for a DC-DC converter according to claim 1, characterized in that, The first sampling driving circuit also includes a fifth chip U5 and a seventh chip U7; the fifth chip U5 is a JSM2101STR chip, and the seventh chip U7 is an ADUM1200AR chip; Pin 1 of the fifth chip U5 is connected to the 12V voltage output terminal; pin 2 of the fifth chip U5 is connected to pin 7 of the seventh chip U7; pin 3 of the fifth chip U5 is connected to pin 6 of the seventh chip U7; pin 4 of the fifth chip U5 is connected to pin 5 of the seventh chip U7; pins 5, 6, and 7 of the fifth chip U5 are respectively connected to the first power circuit; pin 6 of the fifth chip U5 is also connected to one end of the thirteenth capacitor C13; pin 8 of the fifth chip U5 is divided into two paths, one path is connected to the other end of the thirteenth capacitor C13, and the other path is connected to the negative terminal of the sixth diode D6, the positive terminal of the sixth diode D6 is connected to the 12V voltage output terminal; The first pin of the seventh chip U7 is connected to the 3.3V voltage output terminal; the second and third pins of the seventh chip U7 are respectively connected to the microcontroller; the fourth pin of the seventh chip U7 is grounded; and the eighth pin of the seventh chip U7 is connected to the 5V voltage output terminal.

8. The voltage equalization circuit for a DC-DC converter according to claim 1, characterized in that, The microcontroller includes a first chip U1, which is an F280025PTQR microcontroller.

9. A voltage equalization circuit for a DC-DC converter according to claim 8, characterized in that, The voltage equalization circuit also includes a reset circuit, which includes a capacitor C374 (374th capacitor) and a resistor R193 (193rd resistor). One end of the third 174 capacitor C374 is connected to the third pin of the first chip U1, and the other end of the third 174 capacitor C374 is grounded. One end of the first 193 resistor R193 is connected to the 3.3V voltage output terminal, and the other end of the first 193 resistor R193 is connected to the third pin of the first chip U1.

10. A voltage equalization circuit for a DC-DC converter according to claim 8, characterized in that, The voltage equalization circuit also includes a clock circuit, which includes a first crystal oscillator X1, an eighty-first capacitor C81, and an eighty-second capacitor C82. One end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 33 of the first chip U1, and the other path is connected to one end of the eighty-second capacitor C82. The other end of the eighty-second capacitor C82 is grounded. The other end of the first crystal oscillator X1 is divided into two paths. One path is connected to pin 34 of the first chip U1, and the other path is connected to one end of the eighty-first capacitor C81. The other end of the eighty-first capacitor C81 is grounded.

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