Solar cell

Abstract

The utility model discloses a solar cell, which comprises a single silicon wafer, a plurality of main grids and a plurality of fine grids are arranged on two sides of the single silicon wafer, the fine grids and the main grids are distributed at an included angle of 45 degrees, and meanwhile, the fine grids and the edge of the single silicon wafer form an included angle of 45 degrees. The direction of the fine grid can be consistent with the direction of the tower footing of the pyramid after the surface of the silicon wafer is textured, so that the transmission direction of current is parallel to the tower footing of the pyramid, and an electron transmission path tends to be flat, thereby reducing the resistance, reducing the series resistance and improving the cell efficiency.

Description

Technical Field

[0001] This utility model relates to the field of solar cell technology, specifically a solar cell. Background Technology

[0002] Solar cells are classified into crystalline silicon and amorphous silicon types. Crystalline silicon cells can be further divided into monocrystalline and polycrystalline cells; the efficiency of monocrystalline silicon cells differs from that of polycrystalline silicon cells. The fabrication of monocrystalline silicon textured surfaces utilizes the anisotropic etching of silicon to form millions of tetrahedral pyramids (also known as pyramid structures) per square centimeter of silicon surface. Due to multiple reflections and refractions of incident light at the surface, light absorption is increased, thereby improving the short-circuit current and conversion efficiency of the cell. The silicon wafer is the carrier of the solar cell, and its quality directly determines the conversion efficiency of the solar cell; therefore, it is necessary to inspect the incoming silicon wafers.

[0003] In industry-standard solar cells, the grid structure design on the front side is typically such that the fine grid and the main grid are perpendicular to each other, and parallel to two sides of the silicon wafer (e.g., ...). Figure 1 Since the surface of a silicon wafer is basically all <100> Due to the crystal orientation, after texturing, the base of the pyramid on the positive surface forms a 45° angle with the edge of the silicon wafer. Once the silver gate lines are printed on the silicon wafer and form good contact, the ideal topographic structure of the contact surface between the silver gate lines and the silicon wafer is similar to (e.g., ...). Figure 2 The shape drawn creates a raised curved mark at the base of the tower. When the solar cell is working normally, due to the skin effect of current transmission inside the metal grid lines, the current will be transmitted along the raised curve on the surface of the silver grid lines, mainly concentrated in the path marked by the red line, and the transmission path is tortuous.

[0004] The silicon wafers used in solar cells based on the aforementioned existing technologies have a tortuous current transmission path, which increases resistance and affects the cell's power generation efficiency. Utility Model Content

[0005] The purpose of this invention is to provide a solar cell that solves the problem in the prior art where the current transmission path is tortuous, increasing resistance and affecting the power generation efficiency of the cell.

[0006] To achieve the above objectives, this utility model provides the following technical solution: a solar cell, comprising a single silicon wafer, wherein multiple main grids and multiple fine grids are provided on both sides of the single silicon wafer, and the fine grids are distributed at a 45° angle to the main grids, and at the same time, the fine grids are at a 45° angle to the edge of the single silicon wafer. The fine grids between two adjacent main grid lines can be parallel or symmetrically arranged, so that the direction of the fine grids is consistent with the base direction of the pyramid after texturing the silicon wafer surface. In this way, the current transmission direction is parallel to the base of the pyramid, the electron transmission path tends to be flat, thereby reducing resistance, reducing series resistance, and improving cell efficiency.

[0007] Compared with the prior art, the beneficial effects of this utility model are:

[0008] 1. This utility model features multiple main grids and multiple fine grids on both sides of a single silicon wafer, with the fine grids distributed at a 45° angle to the main grids and also at a 45° angle to the edge of the single silicon wafer. The direction of the fine grids is also at a 45° angle to the edge of the silicon wafer. This allows the orientation of the fine grids to be consistent with the base direction of the pyramid formed by texturing the silicon wafer surface. In this way, the direction of current transmission is parallel to the base of the pyramid, and the electron transmission path tends to be flat, thereby reducing resistance, lowering series resistance, and improving battery efficiency. Attached Figure Description

[0009] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0010] Figure 1 This is a schematic diagram of the distribution structure of the fine gate and the main gate in the prior art;

[0011] Figure 2 This is a schematic diagram showing the appearance of the contact surface between the silver gate line and the silicon wafer and the main current path in the prior art.

[0012] Figure 3 This is a schematic diagram of the distribution of fine grids and main grids in this utility model (the fine grids between two adjacent main grid lines are parallel).

[0013] Figure 4 This is a schematic diagram showing the appearance of the contact surface between the silver grid line and the silicon wafer and the main current path of the present invention.

[0014] Figure 5 This is a schematic diagram of the structure of the fine grid and main grid distribution of this utility model (the fine grid orientation between two adjacent main grid lines is symmetrical).

[0015] In the diagram: 1, single silicon wafer; 101, fine gate; 102, main gate. Detailed Implementation

[0016] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0017] Please see Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5In this embodiment of the present invention, a solar cell includes a single silicon wafer 1. Multiple main grids 102 and multiple fine grids 101 are provided on both sides of the single silicon wafer 1. The fine grids 101 are distributed at a 45° angle to the main grids 102, and also at a 45° angle to the edge of the single silicon wafer 1. The fine grids 101 between two adjacent main grid lines can be parallel or symmetrically arranged, so that the direction of the fine grids 101 is consistent with the base direction of the pyramid after texturing the silicon wafer surface. This makes the current transmission direction parallel to the base of the pyramid, and the electron transmission path tends to be flat, thereby reducing resistance, lowering series resistance, and improving cell efficiency.

[0018] The working principle and usage process of this utility model are as follows: In use, multiple main grids 102 and multiple fine grids 101 are provided on both sides of the single silicon wafer 1, and the fine grids 101 are distributed at a 45° angle with the main grids 102. At the same time, the fine grids 101 are also at a 45° angle with the edge of the single silicon wafer 1. This allows the direction of the fine grids 101 to be consistent with the base direction of the pyramid after texturing the surface of the silicon wafer. In this way, the direction of current transmission is parallel to the base of the pyramid, the electron transmission path tends to be flat, thereby reducing resistance, reducing series resistance, and improving battery efficiency.

[0019] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A solar cell comprising a single silicon wafer (1), characterized in that: The single silicon wafer (1) has multiple main gates (102) and multiple fine gates (101) on both sides, and the fine gates (101) are distributed at a 45° angle to the main gates (102), while the fine gates (101) are at a 45° angle to the edge of the single silicon wafer (1).

2. A solar cell according to claim 1, characterized in that: The fine gates (101) between two adjacent main gates (102) are parallel or symmetrical.

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