Display device

Abstract

The utility model relates to a display device. The display device may include a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emission region corresponding to boundaries between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light emitting elements disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively, on the substrate; a light conversion layer disposed on the display element layer and including a bank disposed in the non-emission area; and a color filter layer disposed on the light conversion layer and including a first color filter, a second color filter, and a third color filter. Only one of the first color filter, the second color filter, and the third color filter may be disposed in the non-emission region.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0002876, filed on January 8, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] Various embodiments relate to a display device and a method of manufacturing a display device. BACKGROUND

[0004] Due to characteristics such as light weight and thinness, flat panel display devices are used as substitutes for cathode ray tube display devices. Representative examples of such flat panel display devices include liquid crystal display devices and organic light emitting display devices.

[0005] A display device can include a light emitting element that generates light, a color conversion component that converts a wavelength of light generated from the light emitting element, and a color filter layer disposed on the color conversion component. The color filter layer can include a color filter that selectively transmits light of different colors. SUMMARY

[0006] Various embodiments relate to a display device that adjusts a reflection color through a design change.

[0007] Various embodiments relate to a method of manufacturing a display device.

[0008] However, embodiments are not limited to the embodiments set forth herein. The above and other embodiments will become more apparent to one of ordinary skill in the art to which the disclosure pertains by referencing the detailed description of the disclosure given below.

[0009] An embodiment can provide a display device including a substrate including a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, and a non-emission area corresponding to a boundary between the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area; a display element layer including a light emitting element disposed in the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area, respectively, on the substrate; a light conversion layer disposed on the display element layer, and including a bank disposed in the non-emission area; and a color filter layer disposed on the light conversion layer, and including a first color filter, a second color filter, and a third color filter. Only one of the first color filter, the second color filter, and the third color filter can be disposed in the non-emission area.

[0010] In an embodiment, the light conversion layer can further include a first layer disposed in the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area, and a second layer covering the first layer. The bank can be disposed in the non-emission area on the second layer.

[0011] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter can contact the second layer.

[0012] In an embodiment, the light conversion layer can further include: a low-refraction layer disposed on the second layer; and a third layer covering the low-refraction layer.

[0013] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter can contact the third layer.

[0014] In an embodiment, the first layer can be formed by a photolithography process.

[0015] In an embodiment, the first color filter, the second color filter, and the third color filter can be formed by a photolithography process.

[0016] An embodiment can provide a display device including: a substrate including first, second, and third sub-pixel areas and a non-emission area corresponding to a boundary between the first, second, and third sub-pixel areas; a display element layer including light emitting elements disposed in the first, second, and third sub-pixel areas on the substrate, respectively; a light conversion layer disposed on the display element layer and including a bank disposed in the non-emission area; and a color filter layer disposed on the light conversion layer and including first, second, and third color filters. Only two of the first, second, and third color filters can be disposed in the non-emission area.

[0017] In an embodiment, the first color filter and the second color filter can be disposed in the non-emission area. The first color filter can be disposed on the second color filter in the non-emission area.

[0018] In an embodiment, the light conversion layer can further include: a first layer disposed in the first, second, and third sub-pixel areas; and a second layer covering the first layer. The bank can be disposed on the second layer in the non-emission area.

[0019] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter can contact the second layer.

[0020] In an embodiment, the light conversion layer can further include: a low-refraction layer disposed on the second layer; and a third layer covering the low-refraction layer.

[0021] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter can contact the third layer.

[0022] In an embodiment, the first layer can be formed by a photolithography process.

[0023] In an embodiment, the first color filter, the second color filter, and the third color filter can be formed by a photolithography process.

[0024] An embodiment can provide a method of manufacturing a display device, the method including: providing a substrate including a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, and a non-emission area corresponding to a boundary between the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area; forming a display element layer on the substrate, the display element layer including light emitting elements respectively disposed in the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area on the substrate; forming a light conversion layer on the display element layer, the light conversion layer including a bank disposed in the non-emission area; and forming a color filter layer on the light conversion layer, the color filter layer including a first color filter, a second color filter, and a third color filter. Forming the color filter layer can include forming one of the first color filter, the second color filter, and the third color filter in the non-emission area on the bank.

[0025] In an embodiment, forming the light conversion layer can include: forming a first layer in the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area; and forming a second layer covering the first layer. The bank can be formed on the second layer in the non-emission area.

[0026] In an embodiment, forming the light conversion layer can include: forming a low-refraction layer on the second layer; and forming a third layer covering the low-refraction layer. At least one of the first color filter, the second color filter, and the third color filter can contact the third layer.

[0027] In an embodiment, the first layer can be formed by a photolithography process.

[0028] In an embodiment, the first color filter, the second color filter, and the third color filter can be formed by a photolithography process. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 is a schematic plan view illustrating a display device according to an embodiment.

[0030] Figures 2 to 4 is a schematic plan view illustrating an embodiment of a pixel of Figure 1

[0031] Figure 5 is a schematic cross-sectional view illustrating a display panel of Figure 1

[0032] Figure 6 is a schematic view of an equivalent circuit of an embodiment of a sub-pixel included in a pixel of Figures 2 to 4

[0033] ​​​Figure 7 is a schematic cross-sectional view illustrating an embodiment of a light-emitting element of Figure 6

[0034] Figure 8 is a cross-sectional view illustrating another embodiment of a light-emitting element of Figure 6

[0035] Figure 9 is a schematic cross-sectional view illustrating an embodiment of a pixel of a light-emitting element including Figure 7 or Figure 8

[0036] Figure 10 is a schematic cross-sectional view illustrating a light-conversion layer and a color filter layer of a display device according to an embodiment. Figure 9

[0037] Figure 11 is a schematic cross-sectional view illustrating a thickness of a bank of Figure 10 according to a transmittance of a second color filter.

[0038] Figure 12 and Figure 13 is a schematic cross-sectional view illustrating a light-conversion layer and a color filter layer of a display device according to an embodiment.

[0039] Figure 14 is a schematic cross-sectional view illustrating a light-conversion layer and a color filter layer of a display device according to an embodiment.

[0040] Figures 15 to 17 is a schematic cross-sectional view illustrating a light-conversion layer and a color filter layer of a display device according to an embodiment.

[0041] Figure 18 is a flowchart illustrating a method of manufacturing a display device according to an embodiment.

[0042] Figures 19 to 23 is a schematic view illustrating step S300 of Figure 18

[0043] Figure 24 and Figure 25 is a schematic view illustrating step S400 of Figure 18 DETAILED DESCRIPTION

[0044] ​​​​​​In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various embodiments or examples of the present invention. As used herein, "embodiment" and "example" are interchangeable words that are meant to be non-limiting examples of the devices or methods disclosed herein. However, it will be apparent to one skilled in the art that various embodiments can be practiced without these specific details. In some instances, certain terminology is used herein for the purpose of reference only. For example, the specific shape, configuration, and features of an embodiment can be used in another embodiment or implemented in another way.

[0045] Unless otherwise indicated, embodiments shown should be understood to provide features of the present invention. Thus, features, components, modules, layers, films, panels, regions, and / or aspects of various embodiments (hereinafter referred to as "elements"), unless otherwise specified, can be combined, separated, interchanged, and / or rearranged, without departing from the scope of the present invention.

[0046] The use of cross-hatching and / or shading in the drawings is generally used to illustrate the boundaries, or edges, of elements. Thus, unless specified, the presence or absence of cross-hatching and / or shading does not indicate or imply any preference or requirement for particular material, material properties, dimensions, ratios, commonality of elements between illustrations, and / or any other characteristic, attribute, property, etc. of the elements. In addition, in the drawings, the size and relative sizes of elements can be exaggerated for clarity and / or descriptive purposes. When embodiments can be practiced differently, a particular sequence of processes can be performed other than as described. For example, two consecutively described processes can be executed substantially concurrently, or in the reverse order of the described processes. Additionally, like reference numerals denote like elements.

[0047] When an element or layer is referred to as being "on," "connected to," or "attached to" another element or layer, it can be directly on, directly connected to, or directly attached to the other element or layer, or an intervening element or layer may be present. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly attached to" another element or layer, an intervening element or layer is not present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without an intervening element. Furthermore, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to the three axes of a Cartesian coordinate system such as the X, Y, and Z axes, and can be interpreted in a broader sense. For example, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of A and B" can be understood to mean only A, only B, or any combination of A and B. Furthermore, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0048] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.

[0049] For descriptive purposes, spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side” (e.g., as in “sidewall”) may be used herein to describe the relationship of one element to another(s) as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, spatial relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features will consequently be oriented “above” other elements or features. Thus, the term “below” can encompass both above and below orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and therefore, the spatial relative descriptive terms used herein should be interpreted accordingly.

[0050] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, to the extent that the terms "including," "includes," "having," "has," "a" or "an," or the like are used in the detailed description and / or claims, such terms are meant to be inclusive in a manner that the terms "comprising," "comprises," "containing," "contains," "characterized by," "characterized by," "characterized by," and / or the like are meant to be inclusive. Also, as used herein, the term "substantially" and other similar terms are used as synonyms for "approximately" or "around," and are intended to be construed as leaving a reasonable amount of latitude to the skilled person in the art, in view of the inherent inaccuracy of measurements, calculations, and / or provision values.

[0051] Various embodiments are described herein with reference to cross-sectional and / or exploded illustrations of schematic views of implementations and / or intermediate structures. It will be understood that such figures are presented by way of example of the use of such schematic in the description of various embodiments, and are not meant to be limiting. As such, specific structural and / or functional details set forth in the description are not necessarily meant to be construed as limiting, but for the purposes of illustration. Embodiments disclosed herein should be understood to address and meet the requirements of connected devices, and the like, and are not necessarily meant to be limited to any specific manufacturing process.

[0052] As is conventional in the art, some embodiments are described and shown in the drawings with reference to functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuitry, such as logic circuitry, discrete components, microprocessors, hardwired circuitry, memory elements, wiring connections, and the like, which can be formed using semiconductor-based manufacturing processes or other manufacturing techniques. In the case of blocks, units, and / or modules that are implemented by microprocessors or other similar hardware, the blocks, units, and / or modules can be programmed by software (e.g., microcode) and controlled by firmware and / or software to perform various functions discussed herein, and can be driven selectively by firmware and / or software. It is also contemplated that each block, unit, and / or module can be implemented by dedicated hardware, or can be implemented as a combination of dedicated hardware to perform some functions, and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions. Furthermore, each block, unit, and / or module of some embodiments can be physically separated into two or more interacting and discrete blocks, units, and / or modules without departing from the scope of the present inventive subject matter. Moreover, blocks, units, and / or modules of some embodiments can be physically combined into more complex blocks, units, and / or modules without departing from the scope of the present inventive subject matter.

[0053] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0054] Figure 1 is a schematic plan view illustrating a display device DD according to an embodiment.

[0055] With reference to Figure 1 The display panel DP (or the display device DD) according to the embodiment can be provided in various forms, for example, in the form of a rectangular plate having two pairs of parallel sides, but the embodiment is not limited thereto. In the case where the display panel DP is provided in the form of a rectangular plate, one of the two pairs of sides can be provided longer than the other pair of sides.

[0056] At least a portion of the display panel DP can have flexibility, and the display panel DP can be folded at the portion having flexibility, but the embodiment is not limited thereto.

[0057] The display panel DP can display an image. A self-emissive display panel such as an organic light emitting display (OLED) panel including an organic light emitting diode as a light emitting element, an ultra-small light emitting diode (LED) (micro LED or nano LED) display panel including an ultra-small light emitting diode as a light emitting element, and a quantum dot organic light emitting display (QD OLED) panel including a quantum dot and an organic light emitting diode can be used as the display panel DP. For example, a non-emissive display panel such as a liquid crystal display (LCD) panel, an electrophoretic display (EPD) panel, or an electro wetting display (EWD) panel can be used as the display panel DP. In the case where the non-emissive display panel is used as the display panel DP, the display device DD can include a backlight unit providing light to the display panel DP.

[0058] The display panel DP can include a substrate SUB and a pixel PXL provided (or disposed) on the substrate SUB.

[0059] The substrate SUB can include a transparent insulating material that transmits light. The substrate SUB can be a rigid substrate or a flexible substrate. For example, the rigid substrate can be one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystallized glass substrate.

[0060] The flexible substrate can be a film substrate including a polymeric organic material or a plastic substrate. For example, the flexible substrate can include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0061] The display device DD can have various shapes. For example, the display device DD can be provided in the form of a rectangular plate, but embodiments are not limited thereto. For example, the display device DD can have a shape such as a circular shape or an elliptical shape. Also, the display device DD can have angled corners and / or curved corners. For ease of explanation, Figure 1 It is illustrated that the display device DD has a rectangular plate shape. For example, in Figure 1 the extension direction (e.g., the horizontal direction) of the short side of the display device DD is designated as a first direction DR1, and the extension direction (e.g., the vertical direction) of the long side of the display device DD is designated as a second direction DR2.

[0062] The substrate SUB (or the display device DD) can include a display area DA in which an image is displayed, and a peripheral area PA (or a non-display area) formed in an area other than the display area DA. The substrate SUB can include the display area DA including a plurality of pixel areas in which respective pixels PXL are disposed, and the peripheral area PA disposed around a periphery (or adjacent to the display area DA) of the display area DA.

[0063] The peripheral area PA can be disposed adjacent to the display area DA. The peripheral area PA can be provided (or disposed) on at least one side of the display area DA. For example, the peripheral area PA can surround a periphery (or an edge portion) of the display area DA. In embodiments, the peripheral area PA can be a bezel area of the display device DD.

[0064] The pixels PXL can be disposed in the display area DA on the substrate SUB. The peripheral area PA can be disposed around the display area DA. A structure for protecting components included in the pixels PXL disposed in the display area DA can be provided in the peripheral area PA, but embodiments are not limited thereto. For example, in the peripheral area PA, there can be a wire component connected to the respective pixels PXL and a driver connected to the wire component. The driver can drive the pixels PXL.

[0065] Each of the pixels PXL can include sub-pixels SPX1, SPX2, and SPX3. For example, the pixel PXL can include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be arranged in order in the first direction DR1. However, embodiments are not limited to the foregoing description, and the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be disposed in order in the second direction DR2 intersecting the first direction DR1.

[0066] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can emit light of different colors. For example, the first sub-pixel SPX1 can be a red sub-pixel that emits red light, the second sub-pixel SPX2 can be a green sub-pixel that emits green light, and the third sub-pixel SPX3 can be a blue sub-pixel that emits blue light. However, the color, type, and / or number of sub-pixels forming the pixel PXL are not limited thereto. For example, the color of light emitted from each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be varied in various ways. Hereinafter, the term "pixel PXL" will be used to collectively designate the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3.

[0067] Figures 2 to 4 is a schematic plan view illustrating an embodiment of a pixel of Figure 1 .

[0068] Referring to Figures 1 to 4 , the pixel PXL can include sub-pixels SPX1, SPX2, and SPX3. Although Figures 2 to 4 each of the pixels PXL is illustrated as including the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, embodiments are not limited thereto.

[0069] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be connected to at least one of the data lines and at least one of the scan lines.

[0070] Referring to Figures 2 to 4 , each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can have a planar shape of a polygon such as a rectangular shape, a square shape, or a hexagonal shape.

[0071] Referring to Figure 2, each of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can have a rectangular planar shape having a short side extending in the first direction DR1 and a long side extending in the second direction DR2. However, the embodiments are not limited to the above-described example. In the embodiments, each of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can have a square or rhombic planar shape having sides of the same length in the first direction DR1 and the second direction DR2. In the embodiments, the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can be arranged in the first direction DR1. In the embodiments, the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can have the same surface area (or the same size), but the embodiments are not limited thereto. For example, the surface area (or the size) of at least one of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can be different from the other. In another example, any two of the surface area (or the size) of the first sub-pixel SPX1, the surface area (or the size) of the second sub-pixel SPX2, and the surface area (or the size) of the third sub-pixel SPX3 can be substantially the same as each other, and the remaining one can be different from the two. In another example, the surface area (or the size) of the first sub-pixel SPX1, the surface area (or the size) of the second sub-pixel SPX2, and the surface area (or the size) of the third sub-pixel SPX3 can be different from each other.

[0072] Referring to Figure 3 , the first sub-pixel SPX1 can be arranged in the first direction DR1 with one of the second sub-pixel SPX2 and the third sub-pixel SPX3, and can be arranged in the second direction DR2 with the remaining one of the second sub-pixel SPX2 and the third sub-pixel SPX3. For example, the first sub-pixel SPX1 can be arranged in parallel with the second sub-pixel SPX2 in the first direction DR1. The first sub-pixel SPX1 can be arranged in parallel with the third sub-pixel SPX3 in the second direction DR2. In the embodiments, the third sub-pixel SPX3 can be positioned in the second direction DR2 with respect to the first sub-pixel SPX1 and the second sub-pixel SPX2. In the embodiments, the surface area (or the size) of the first sub-pixel SPX1 and the second sub-pixel SPX2 can be substantially the same as each other. The surface area (or the size) of the third sub-pixel SPX3 can be different from the surface area of the first sub-pixel SPX1 and the second sub-pixel SPX2. For example, the surface area (or the size) of the third sub-pixel SPX3 can be greater than the surface area (or the size) of each of the first sub-pixel SPX1 and the second sub-pixel SPX2.

[0073] Referring to Figure 4Each of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can have a planar shape of a hexagon or a regular hexagon. In an embodiment, two adjacent sides of the six sides of each of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can face respective sides of the adjacent sub-pixels.

[0074] Referring to Figures 2 to 4 The first sub-pixel SPX1 can emit first light. The second sub-pixel SPX2 can emit second light. The third sub-pixel SPX3 can emit third light. The first light can be light in a red wavelength band. The second light can be light in a green wavelength band. The third light can be light in a blue wavelength band. The red wavelength band can be a wavelength band in a range from about 600 nm to about 750 nm. The green wavelength band can be a wavelength band in a range from about 480 nm to about 560 nm. The blue wavelength band can be a wavelength band in a range from about 370 nm to about 460 nm. However, embodiments are not limited thereto.

[0075] Each of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 can be a light-emitting element (e.g., a light-emitting diode (LED)) that emits light. Figure 7 and Figure 8 The light-emitting element can include an organic light-emitting element having an organic layer.

[0076] Figure 5 is a schematic cross-sectional view illustrating a display panel of Figure 1 .

[0077] Referring to Figure 5 The display panel DP can include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, a sealing layer TFE, a light conversion layer LCL, and a color filter layer CFL. In an embodiment, the substrate SUB, the pixel circuit layer PCL, the display element layer DPL, the sealing layer TFE, the light conversion layer LCL, and the color filter layer CFL can be sequentially stacked in the third direction DR3.

[0078] The pixel circuit layer PCL can be provided (or disposed) on the substrate SUB and include a transistor and a signal line connected to the transistor. For example, each transistor can have a shape in which a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode are sequentially stacked with an insulating layer interposed therebetween. The semiconductor pattern can include amorphous silicon, polysilicon, low-temperature polysilicon, and an organic semiconductor and / or an oxide semiconductor. Although the gate electrode, the source electrode, and the drain electrode each can include one of aluminum (Al), copper (Cu), titanium (Ti), and molybdenum (Mo), embodiments are not limited thereto. For example, the pixel circuit layer PCL can include at least one or more insulating layers.

[0079] The display element layer (DPL) can be disposed on the pixel circuit layer (PCL). The display element layer (DPL) may include light-emitting elements (e.g., Figure 7 or Figure 8 The light-emitting element (LD) can be, for example, an organic light-emitting diode, but the implementation is not limited thereto. In the implementation, the light-emitting element can be an inorganic light-emitting element comprising inorganic light-emitting materials, or a light-emitting element that emits light by changing (or converting) the wavelength of light using quantum dots.

[0080] The encapsulation layer TFE can be disposed on the display element layer DPL. The encapsulation layer TFE can be an encapsulation substrate or a multilayer encapsulation film. When the encapsulation layer TFE is in the form of an encapsulation film, it can include inorganic and / or organic layers. For example, the encapsulation layer TFE can have a structure formed by sequentially stacking inorganic, organic, and inorganic layers. The encapsulation layer TFE can prevent external air or water from penetrating the display element layer DPL or the pixel circuit layer PCL.

[0081] A light conversion layer (LCL) can be disposed on the encapsulation layer (TFE). The LCL converts light emitted from the display element layer (DPL) into light of a specific color and may include elements for enhancing light output efficiency. In an embodiment, the LCL may include a color conversion layer (e.g., Figure 9 Color conversion layer (CCL) and low refractive index layer (e.g., Figure 9 The low-refractive layer (LRL).

[0082] A color filter layer (CFL) can be disposed on the light conversion layer (LCL). The color filter layer (CFL) can selectively transmit light that has passed through the light conversion layer (LCL) (or the display element layer (DPL)). The color filter layer (CFL) may include a first color filter, a second color filter, and a third color filter (e.g., Figure 9 The first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0083] Figure 6 Is included Figures 2 to 4 A schematic diagram of the equivalent circuit for an implementation of sub-pixels within a pixel.

[0084] Figure 6 The sub-pixel SPX shown can be Figure 1 Any of the sub-pixels SPX1, SPX2, and SPX3 shown. Sub-pixels SPX1, SPX2, and SPX3 arranged in the display area DA of the display device DD can have substantially the same or similar configurations.

[0085] For ease of explanation, Figure 6A sub-pixel SPX positioned on an i-th pixel row (or i-th horizontal line) and a j-th pixel column (where each of i and j is a positive integer) is shown.

[0086] Referring to Figure 6 , the sub-pixel SPX can include an emission component EMU that generates light having luminance corresponding to a data signal. In addition, the sub-pixel SPX can further include a pixel circuit PXC that drives the emission component EMU.

[0087] The emission component EMU can include a light emitting element LD connected between a first power line PL1 and a second power line PL2, the first power line PL1 receiving a voltage from a first driving power source VDD (or first power source), and the second power line PL2 receiving a voltage from a second driving power source VSS (or second power source). For example, the emission component EMU can include a light emitting element LD including a first pixel electrode AE connected to the first driving power source VDD via the pixel circuit PXC and the first power line PL1, and a second pixel electrode CE connected to the second driving power source VSS via the second power line PL2. The first pixel electrode AE can be an anode, and the second pixel electrode CE can be a cathode. The first driving power source VDD and the second driving power source VSS can have different potentials. For example, a potential difference between the first driving power source VDD and the second driving power source VSS can be set to a value equal to or greater than a threshold voltage of the light emitting element LD during an emission period of the sub-pixel SPX.

[0088] In a case where the sub-pixel SPX is disposed on the i-th pixel row and the j-th pixel column in the display area DA, the pixel circuit PXC of the sub-pixel SPX can be electrically connected to the i-th scan line Si and the j-th data line Dj. In addition, the pixel circuit PXC can be electrically connected to the i-th control line CLi and the j-th sensing line SENj.

[0089] The pixel circuit PXC can include a first transistor T1, a second transistor T2, and a third transistor T3, and a storage capacitor Cst.

[0090] The first transistor T1 can be electrically connected between the first driving power source VDD and the light emitting element LD as a driving transistor to control a driving current to be applied to the light emitting element LD. For example, a first terminal of the first transistor T1 can be electrically connected to the first driving power source VDD through the first power line PL1. A second terminal of the first transistor T1 can be electrically connected to the second node N2. A gate electrode of the first transistor T1 can be electrically connected to the first node N1. In response to a voltage applied to the first node N1, the first transistor T1 can control the driving current to be applied to the light emitting element LD from the first driving power source VDD through the second node N2. In an embodiment, the first terminal of the first transistor T1 can be a drain electrode, and the second terminal of the first transistor T1 can be a source electrode. However, embodiments are not limited thereto. In an embodiment, the first terminal can be a source electrode, and the second terminal can be a drain electrode.

[0091] The second transistor T2 can be electrically connected between the data line Dj (e.g., the jth data line) and the first node N1, and can serve as a switching transistor to select and activate the sub-pixel SPX in response to a scan signal. A first terminal of the second transistor T2 can be electrically connected to the data line Dj. A second terminal of the second transistor T2 can be electrically connected to the first node N1 (or the gate electrode of the first transistor T1). A gate electrode of the second transistor T2 can be electrically connected to the scan line Si (or the ith scan line). The first terminal and the second terminal of the second transistor T2 can be different terminals. For example, in the case where the first terminal is a drain electrode, the second terminal can be a source electrode.

[0092] In the case where the scan signal having a gate-on voltage (e.g., a high-level voltage) is provided from the scan line Si, the second transistor T2 can be turned on to electrically connect the data line Dj to the first node N1. The first node N1 can be a point at which the second terminal of the second transistor T2 and the gate electrode of the first transistor T1 are connected to each other. The second transistor T2 can transmit the data signal to the gate electrode of the first transistor T1.

[0093] The third transistor T3 can acquire (or obtain) a sensing signal through the sensing line SENj (e.g., the jth sensing line) by electrically connecting the first transistor T1 to the sensing line SENj, and detect (or measure) a characteristic (such as a threshold voltage of the first transistor T1) of the sub-pixel SPX using the sensing signal. Information about the characteristic of each sub-pixel SPX can be used to convert image data, thereby compensating for a characteristic deviation between the sub-pixels SPX. A second terminal of the third transistor T3 can be electrically connected to the second terminal of the first transistor T1. A first terminal of the third transistor T3 can be electrically connected to the sensing line SENj. A gate electrode of the third transistor T3 can be electrically connected to the control line CLi (e.g., the ith control line). The first terminal can be a drain electrode, and the second terminal can be a source electrode.

[0094] The third transistor T3 can be an initialization transistor for initializing the second node N2, and can be turned on when a sensing control signal is provided to it from the control line CLI, thereby applying the voltage of the initialization power supply to the second node N2. Therefore, the storage capacitor Cst electrically connected to the second node N2 can be initialized.

[0095] The storage capacitor Cst may include a lower electrode LE (or a first storage electrode) and an upper electrode UE (or a second storage electrode). The lower electrode LE may be electrically connected to a first node N1. The upper electrode UE may be electrically connected to a second node N2. The storage capacitor Cst may be charged with a data voltage corresponding to the data signal to be supplied to the first node N1 during a frame period. Therefore, the storage capacitor Cst may store a voltage corresponding to the difference between the voltage of the gate electrode of the first transistor T1 and the voltage of the second node N2.

[0096] although Figure 6 The illustration shows an implementation where all of the first transistor T1, the second transistor T2, and the third transistor T3 are N-type transistors, but the implementation is not limited to this. For example, at least one of the first transistor T1, the second transistor T2, and the third transistor T3 can be changed (or modified) to a P-type transistor. The structure of the pixel circuit PXC can be changed (or modified) in various ways.

[0097] In the following embodiments, for ease of explanation, the horizontal direction (or X-axis direction or horizontal direction) in the plan view will be represented by the first direction DR1, the vertical direction (or Y-axis direction or vertical direction) in the plan view will be represented by the second direction DR2, and the vertical direction in the sectional view will be represented by the third direction DR3.

[0098] Figure 7 It is shown Figure 6 A schematic cross-sectional view of an embodiment of a light-emitting element (LD). Figure 8 It is shown Figure 6 A schematic cross-sectional view of another embodiment of the light-emitting element LD.

[0099] refer to Figure 7 The light-emitting element LD may include a first pixel electrode AE, an organic emitting component EL, and a second pixel electrode CE, which are stacked sequentially.

[0100] In an implementation, the first pixel electrode AE ​​can be patterned to correspond to the first sub-pixel, the second sub-pixel, and the third sub-pixel (e.g., the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3).

[0101] In an embodiment, an organic emission component EL can be provided (or disposed) on the first pixel electrode AE. The organic emission component EL can have a multi-layer thin film structure including a light generating layer. The organic emission component EL can include a hole injection layer HIL, a hole transport layer HTL, an emission layer EML, an electron transport layer ETL, and an electron injection layer EIL, which are sequentially stacked.

[0102] The hole injection layer HIL can be an organic layer disposed between the first pixel electrode AE and the hole transport layer HTL to facilitate injection of holes from the first pixel electrode AE to the emission layer EML. The hole transport layer HTL can be disposed between the hole injection layer HIL and the emission layer EML to receive holes from the first pixel electrode AE and transport the holes to the emission layer EML.

[0103] The electron injection layer EIL can be disposed between the electron transport layer ETL and the second pixel electrode CE. The electron transport layer ETL can be disposed on the emission layer EML and can receive electrons from the second pixel electrode CE and transport the electrons to the emission layer EML.

[0104] The emission layer EML can be a region in which light is generated by recombination of electrons and holes provided from the first pixel electrode AE and the second pixel electrode CE. The emission layer EML can include an organic light emitting material, such as a high molecular organic material or a low molecular organic material, which emits light of a specific color. For example, the emission layer EML can be formed of an organic material that emits blue light. However, embodiments are not limited thereto. In an embodiment, the emission layer EML can be formed of an organic material that emits red light or green light, or can be formed of an inorganic material or a quantum dot.

[0105] In an embodiment, the second pixel electrode CE can be integrally disposed (or integrally formed) as one body. The second pixel electrode CE can be disposed on the organic emission component EL. The second pixel electrode CE can be integrated with the light emitting element LD.

[0106] Reference Figure 8 The light emitting element LD can include the first pixel electrode AE, the organic emission component EL, and the second pixel electrode CE.

[0107] The organic emission component EL can include a light generating layer. In an embodiment, the organic emission component EL can include a first organic emission component ELa, a charge generation layer CGL, and a second organic emission component ELb. The first pixel electrode AE, the first organic emission component ELa, the charge generation layer CGL, the second organic emission component ELb, and the second pixel electrode CE can be sequentially stacked.

[0108] The first organic emission component ELa can have a structure in which a hole injection layer HIL, a first hole transport layer HTLa, a first organic emission layer EMLa, and a first electron transport layer ETLa are sequentially stacked. The second organic emission component ELb can include a structure in which a second hole transport layer HTLb, a second organic emission layer EMLb, a second electron transport layer ETLb, and an electron injection layer EIL are sequentially stacked.

[0109] In an embodiment, a buffer layer can be disposed on the first organic emission layer EMLa and the second organic emission layer EMLb. The buffer layer can include an electron transport compound.

[0110] The charge generation layer CGL can provide charges to the first organic emission component ELa and the second organic emission component ELb. The charge generation layer CGL can include an n-type charge generation layer n-CGL that provides charges to the first organic emission component ELa and a p-type charge generation layer p-CGL that provides holes to the second organic emission component ELb. The n-type charge generation layer n-CGL can include a metal material as a dopant.

[0111] Although Figure 8 Two organic emission components ELa and ELb are shown to be stacked and disposed in the light emitting element LD, but embodiments are not limited thereto. For example, three, four, or more organic emission components can be stacked and disposed in the light emitting element LD.

[0112] Figure 9 is a schematic cross-sectional view showing an embodiment of a pixel of a light emitting element LD including Figure 7 or Figure 8 a light emitting element LD.

[0113] Referring to Figure 1 and Figure 9 , the display device DD can include a display area DA. The display area DA can include a first sub-pixel area SPA1, a second sub-pixel area SPA2, and a third sub-pixel area SPA3, and a non-emission area NEA. In an embodiment, the first sub-pixel area SPA1 can be an area of the first sub-pixel SPX1 from which light of a first color is emitted. The second sub-pixel area SPA2 can be an area of the second sub-pixel SPX2 from which light of a second color is emitted. The third sub-pixel area SPA3 can be an area of the third sub-pixel SPX3 from which light of a third color is emitted. In an embodiment, an emission area of the display area DA can correspond to the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3. The first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3, and the non-emission area NEA can be defined by the bank BNK of the light conversion layer LCL.

[0114] ReferringFigure 9 Although an embodiment in which the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 are adjacent to each other in a direction intersecting the third direction DR3 is shown, the embodiment is not limited thereto.

[0115] In an embodiment, the pixel PXL can include a pixel circuit layer PCL, a display element layer DPL, a sealing layer TFE, a light conversion layer LCL, and a color filter layer CFL, which are sequentially provided on the substrate SUB in the third direction DR3.

[0116] In the pixel circuit layer PCL, circuit elements (e.g., a first transistor T1, a second transistor T2, and a third transistor T3 of the display panel 100) and signal lines electrically connected to the circuit elements can be provided. The pixel circuit layer PCL can be provided on the substrate SUB. The pixel circuit layer PCL can include the first transistor T1, a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer PVX, and a via layer VIA. As an example, although one transistor T1 is shown, the sub-pixel SPX can include a plurality of transistors and at least one capacitor to drive the light emitting element LD. Figure 6

[0117] The buffer layer BFL can be provided on the substrate SUB. The buffer layer BFL can prevent impurities from diffusing from the outside. The buffer layer BFL can prevent impurities from diffusing into the first transistor T1 provided (or disposed) on the substrate SUB, and can enhance the planarity of the substrate SUB. The buffer layer BFL can be provided (or formed) in a single layer structure, or in a multi-layer structure. The buffer layer BFL can be an inorganic insulating layer including an inorganic material. The inorganic insulating layer can include at least one of, for example, silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and a metal oxide such as aluminum oxide (AlO x ). In a case where the buffer layer BFL is provided in a multi-layer structure, each layer can be formed of the same material or different materials. The buffer layer BFL can be omitted in some cases.

[0118] The first transistor T1 can include a semiconductor pattern SCP, a gate electrode GE, a first terminal TE1, and a second terminal TE2. The first terminal TE1 can be one of a source electrode and a drain electrode, and the second terminal TE2 can be the other of the source electrode and the drain electrode. For example, in a case where the first terminal TE1 is the drain electrode, the second terminal TE2 can be the source electrode.

[0119] ​A semiconductor pattern SCP can be provided and / or formed on the buffer layer BFL. The semiconductor pattern SCP can include a first region contacting the first terminal TE1, a second region contacting the second terminal TE2, and a channel region formed between the first region and the second region. The channel region can overlap the gate electrode GE of the first transistor T1. The semiconductor pattern SCP can be a semiconductor pattern formed of amorphous silicon, polysilicon, low-temperature polysilicon, an oxide semiconductor, an organic semiconductor, or the like. For example, the channel region can be an undoped semiconductor pattern, and can be an intrinsic semiconductor. Each of the first region and the second region can be a semiconductor pattern doped with an impurity. In an embodiment, the first terminal TE1 can be electrically connected to the light emitting element LD through the connection electrodes CNE1 and CNE2.

[0120] A gate insulating layer GI can be provided and / or formed on the semiconductor pattern SCP. The gate insulating layer GI can be an inorganic insulating layer including an inorganic material. The gate insulating layer GI can include one or more materials selected from among materials that are constituent materials of the buffer layer BFL. For example, the gate insulating layer GI and the buffer layer BFL can include the same material. For example, the gate insulating layer GI can be formed of an organic insulating layer including an organic material. Although the gate insulating layer GI can be provided in a single layer structure, the gate insulating layer GI can be provided in a multi-layer structure having at least two or more layers.

[0121] A gate electrode GE can be provided and / or formed on the gate insulating layer GI to correspond to (or overlap) the channel region of the semiconductor pattern SCP. The gate electrode GE can be provided on the gate insulating layer GI and overlap the channel region of the semiconductor pattern SCP. The gate electrode GE can have a single layer structure formed of one or a combination selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), neodymium (Nd), titanium (Ti), aluminum (Al), silver (Ag), and alloys thereof, such as aluminum neodymium (AlNd), or can have a double layer structure or a multi-layer structure formed of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag) to reduce line resistance.

[0122] An interlayer insulating layer ILD can be provided and / or formed on the gate electrode GE. The first connection electrode CNE1 can be provided on the interlayer insulating layer ILD. The first connection electrode CNE1 can be electrically connected to the first terminal TE1 through a contact hole passing through the gate insulating layer GI and the interlayer insulating layer ILD.

[0123] A passivation layer PVX can be provided and / or formed on the first connection electrode CNE1. The second connection electrode CNE2 can be provided on the passivation layer PVX. The second connection electrode CNE2 can be electrically connected to the first connection electrode CNE1 through a contact hole passing through the passivation layer PVX.

[0124] The passivation layer PVX can be provided in a form of a structure including an inorganic insulating layer provided on the organic insulating layer, or a structure including an organic insulating layer provided on the inorganic insulating layer. The inorganic insulating layer can include at least one of, for example, silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), and a metal oxide such as aluminum oxide (AlO x ). The organic insulating layer can include at least one of, for example, polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0125] The via layer VIA can be provided and / or formed on the entire surface of the passivation layer PVX. The via layer VIA can be an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material.

[0126] The display element layer DPL can be provided on the via layer VIA. The display element layer DPL can include the light emitting element LD and the pixel definition layer PDL. The light emitting element LD and the pixel definition layer PDL can be provided and / or formed on the via layer VIA. The light emitting element LD can include a first light emitting element LD1 provided in the first sub-pixel area SPA1, a second light emitting element LD2 provided in the second sub-pixel area SPA2, and a third light emitting element LD3 provided in the third sub-pixel area SPA3.

[0127] Each of the light emitting elements LD can include a first pixel electrode AE, an organic emission component EL, and a second pixel electrode CE. The light emitting element LD can be electrically connected to the pixel circuit (e.g., the pixel circuit PXC) of the corresponding pixel PXL. Figure 6

[0128] The first pixel electrode AE can be provided and / or formed on the via layer VIA of the corresponding pixel PXL. The first pixel electrode AE can be an anode electrode of the light emitting element LD. The first pixel electrode AE can be electrically connected to the first terminal TE1 through the corresponding contact. In an embodiment, the first pixel electrode AE can include anode electrodes corresponding to the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3. The first pixel electrode AE can be patterned to correspond to (or overlap with) the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3.

[0129] ​The first pixel electrode AE can be formed of a conductive material (or substance). The conductive material can include an opaque metal. For example, the opaque metal can include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. However, the material of the first pixel electrode AE is not limited to the foregoing embodiments. In embodiments, the first pixel electrode AE can include a transparent conductive material (or substance). The transparent conductive material (or substance) can include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x） , indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO), and conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT). In the case where the first pixel electrode AE includes a transparent conductive material (or substance), a separate conductive layer made of an opaque metal can be provided to reflect light emitted from the organic emission component EL in the image display direction (or in the direction toward the encapsulation layer TFE) of the display device (e.g., Figure 1

[0130] The pixel definition layer PDL can define (or separate) an area in which the organic emission component EL is disposed. The pixel definition layer PDL can be an organic insulating layer made of an organic material. In embodiments, the pixel definition layer PDL can include or be coated with a light-absorbing material, such that the pixel definition layer PDL can absorb light introduced from the outside. For example, the pixel definition layer PDL can include a carbon-based black pigment. Embodiments are not limited thereto.

[0131] The pixel definition layer PDL can be partially opened to include an opening through which an area of the first pixel electrode AE is exposed. The pixel definition layer PDL can protrude in the third direction DR3 from the via layer VIA along the periphery of the sub-pixel area SPA. The pixel definition layer PDL can be disposed on the via layer VIA to define an area on the first pixel electrode AE in which the organic emission component EL is disposed and accommodated. The organic emission component EL can be disposed on the first pixel electrode AE exposed through the opening of the pixel definition layer PDL.

[0132] The organic emission component EL can have a multi-layer thin film structure including a light generating layer that generates light. The organic emission component EL can emit one of red light, green light, and blue light, but embodiments are not limited thereto. For example, the organic emission component EL can include a white emission layer that emits white light. The internal design of the organic emission component EL can also vary depending on the selected color of light to be generated.

[0133] ​The second pixel electrode CE can be provided on the organic emission component EL and the pixel definition layer PDL. The second pixel electrode CE can be provided in the form of a plate in the entire area of the display area DA.

[0134] The second pixel electrode CE can be a thin metal layer having a thickness sufficient for light emitted from the organic emission component EL to be transmitted therefrom. The second pixel electrode CE can be made of a metal material or a transparent conductive material, and can have a relatively small thickness. The second pixel electrode CE can include at least one of various transparent conductive materials including indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc tin oxide, and gallium tin oxide, and can be substantially transparent or translucent to provide satisfactory transmittance. Accordingly, light emitted from the organic emission component EL positioned under the second pixel electrode CE can be emitted in a direction toward the upper surface of the encapsulation layer TFE through the second pixel electrode CE.

[0135] The encapsulation layer TFE can be provided and / or formed on the entire surface of the second pixel electrode CE. The encapsulation layer TFE can include a first encapsulation layer EN1, a second encapsulation layer EN2, and a third encapsulation layer EN3 sequentially positioned on the second pixel electrode CE. The first encapsulation layer EN1 and the third encapsulation layer EN3 can be inorganic layers including an inorganic material. The second encapsulation layer EN2 can be an organic layer including an organic material. The first encapsulation layer EN1 and the third encapsulation layer EN3 can protect the sub-pixel SPX from water and oxygen. The second encapsulation layer EN2 can protect the sub-pixel SPX from foreign substances such as dust particles.

[0136] The light conversion layer LCL can be provided on the encapsulation layer TFE. In an embodiment, the light conversion layer LCL can be provided on the third encapsulation layer EN3 of the encapsulation layer TFE. The light conversion layer LCL can include a bank BNK, a first cap layer CAP1 (or a second layer of the light conversion layer LCL), a color conversion layer CCL (or a first layer of the light conversion layer LCL), a low-refraction layer LRL, and a second cap layer CAP2 (or a third layer of the light conversion layer LCL).

[0137] The color conversion layer CCL can be disposed in a region overlapping the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3. The color conversion layer CCL can include first, second, and third color conversion layers CCL1, CCL2, and CCL3 corresponding (or overlapping) to the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3, respectively. The first color conversion layer CCL1 can be disposed in the first sub-pixel area SPA1. The second color conversion layer CCL2 can be disposed in the second sub-pixel area SPA2. The third color conversion layer CCL3 can be disposed in the third sub-pixel area SPA3.

[0138] The color conversion layer CCL can include color conversion particles, wavelength conversion particles, or quantum dot particles QD. For example, the color conversion particles can convert light of a first color (or light in a first wavelength band) incident thereon from the light emitting element LD into light of a second color (or light of a specific color, or light in a second wavelength band), and emit the converted light. For example, the color conversion layer CCL can be formed by a photolithography process. The method of forming the color conversion layer according to the embodiments is not limited thereto.

[0139] In an embodiment, the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3 can include first, second, and third light emitting elements LD1, LD2, and LD3 that emit light of the same color. For example, the first, second, and third light emitting elements LD1, LD2, and LD3 can emit light of a third color (or blue light). The first, second, and third color conversion layers CCL1, CCL2, and CCL3 including color conversion particles are disposed in the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3, respectively, so that a full-color image can be displayed.

[0140] The first color conversion layer CCL1 can include first color conversion particles for converting light of a third color emitted from the first light emitting element LD1 into light of a first color (or red light). For example, the first color conversion layer CCL1 can include first quantum dot particles QD dispersed in a matrix material such as a base resin. The first quantum dot particles QD of the first color conversion layer CCL1 can absorb blue light and transform the wavelength of the blue light according to an energy transition to emit red light.

[0141] The second color conversion layer CCL2 may include second color conversion particles for converting light of a third color emitted from the second light-emitting element LD2 into light of a second color (or green light). For example, the second color conversion layer CCL2 may include second quantum dot particles QD dispersed in a matrix material such as a base resin. The second quantum dot particles QD of the second color conversion layer CCL2 can absorb blue light and change the wavelength of the blue light to emit green light according to energy transitions.

[0142] The third color conversion layer CCL3 can be configured to effectively use the third color light (or blue light) emitted from the third light-emitting element LD3. For example, if the third light-emitting element LD3 is a blue light-emitting element that emits blue light and the third sub-pixel region SPA3 is a blue sub-pixel region, the third color conversion layer CCL3 can include at least one type of scatterer SCT to effectively use the light emitted from the third light-emitting element LD3.

[0143] The first capping layer CAP1 can cover the color conversion layer CCL. For example, the first capping layer CAP1 can be disposed on the entire surface of the color conversion layer CCL. The first capping layer CAP1 can prevent water or foreign matter from penetrating into the color conversion layer CCL. The first capping layer CAP1 can include inorganic materials.

[0144] In this implementation, a low-refractive-index layer (LRL) may be disposed on the first capping layer CAP1. The LRL can control the path of light emitted from below from the color conversion layer CCL (or display element layer DPL). For example, the LRL can change the path of light incident upon it to a direction perpendicular to the planarization layer OC. The LRL may comprise polymer materials and silicon oxide-based materials.

[0145] In this embodiment, the second capping layer CAP2 may cover the low-refractive-index layer LRL. For example, the second capping layer CAP2 may be disposed on the low-refractive-index layer LRL. The second capping layer CAP2 can prevent water or foreign matter from penetrating into the low-refractive-index layer LRL. The second capping layer CAP2 may include inorganic materials.

[0146] The dam BNK can be set on the second capping layer CAP2. The dam BNK can be set in the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 (or...). Figure 1 The boundary between the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, or within the boundary between the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. For example, BNK can define the boundary between color conversion layers CCL.

[0147] The bank BNK can define the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3, and a non-emission area NEA. The first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3 can be areas corresponding to (or overlapping with) areas between parts of the bank BNK. The non-emission area NEA can be an area corresponding to (or overlapping with) the bank BNK.

[0148] In an embodiment, the non-emission area NEA can refer to an area in which the bank BNK is disposed. In a plan view, the bank BNK can enclose (or surround) the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3.

[0149] The bank BNK can include an organic material such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments are not limited thereto. The bank BNK can include various inorganic materials including silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0150] The bank BNK can include at least one light-shielding material and / or a reflective material. Accordingly, light leakage between adjacent sub-pixels SPX can be prevented or blocked by the bank BNK. For example, the bank BNK can include a black pigment, but embodiments are not limited thereto.

[0151] The banks BNK can be used to define boundaries between the color conversion layers CCL. In addition, the banks BNK can be used to define the areas (e.g., the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3) from which light of the respective colors is emitted. In cases where the areas (e.g., the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3) from which light of the respective colors is emitted are defined by the color filters CF, the color filters CF in the non-emission areas NEA can be used only for light-shielding purposes. However, because the banks BNK are used to define the areas (e.g., the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3) from which light of the various colors is emitted, the design freedom of the color filters CF in the non-emission areas NEA can be relatively enhanced. For example, one or two layers of color filters CF can be used in the non-emission areas NEA.

[0152] Reference will be made to the drawings to explain Figure 10 A detailed description of the color filter layer CFL is provided.

[0153] Figure 10 is a schematic cross-sectional view showing Figure 9 the light conversion layer LCL and the color filter layer CFL.

[0154] Reference will be made to the drawings to explain Figure 10 The color filter layer CFL can be disposed on the light conversion layer LCL. In embodiments, the color filter layer CFL can be disposed on the second cap layer CAP2 in the sub-pixel areas SPA. The color filter layer CFL can be disposed on the banks BNK in the non-emission areas NEA. The color filter layer CFL can include the color filters CF and the planarization layer OC. The color filters CF can include first, second, and third color filters CF1, CF2, and CF3 corresponding to the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3, respectively. The color filters CF can contact the second cap layer CAP2 in the sub-pixel areas SPA and can be disposed on the second cap layer CAP2. In exemplary embodiments, at least one of the first, second, and third color filters CF1, CF2, and CF3 can contact the second cap layer CAP2. For example, the first, second, and third color filters CF1, CF2, and CF3 can be formed by a photolithography process.

[0155] In embodiments, the first, second, and third color filters CF1, CF2, and CF3 can be red, green, and blue color filters, respectively, although embodiments are not limited thereto.

[0156] In an embodiment, the first color filter CF1 can be disposed on the second cap layer CAP2 to correspond to (or overlap) the first sub-pixel area SPA1, and can selectively transmit light emitted from the first light emitting element LD1 and the first color conversion layer CCL1. In an embodiment, the first color filter CF1 can overlap the first color conversion layer CCL1 in the third direction DR3. The first color filter CF1 can include a color filter material for selectively passing first color light (or red light) therethrough. For example, in the case where the first sub-pixel area SPA1 is a red sub-pixel area, the first color filter CF1 can include a red color filter material.

[0157] In an embodiment, the second color filter CF2 can be disposed on the second cap layer CAP2 to correspond to (or overlap) the second sub-pixel area SPA2, and can selectively transmit light emitted from the second light emitting element LD2 and the second color conversion layer CCL2. In an embodiment, the second color filter CF2 can overlap the second color conversion layer CCL2 in the third direction DR3. The second color filter CF2 can include a color filter material for selectively passing second color light (or green light) therethrough. For example, in the case where the second sub-pixel area SPA2 is a green sub-pixel area, the second color filter CF2 can include a green color filter material.

[0158] In an embodiment, the third color filter CF3 can be disposed on the second cap layer CAP2 to correspond to (or overlap) the third sub-pixel area SPA3, and can selectively transmit light emitted from the third light emitting element LD3 and the third color conversion layer CCL3. In an embodiment, the third color filter CF3 can overlap the third color conversion layer CCL3 in the third direction DR3. The third color filter CF3 can include a color filter material for selectively passing third color light (or blue light) therethrough. For example, in the case where the third sub-pixel area SPA3 is a blue sub-pixel area, the third color filter CF3 can include a blue color filter material.

[0159] In an embodiment, the planarization layer OC can be disposed on the first color filter CF1, the second color filter CF2, and the third color filter CF3. The planarization layer OC can cover the first color filter CF1, the second color filter CF2, and the third color filter CF3. The planarization layer OC is not limited as long as it is made of a material having excellent planarization characteristics and light transmittance, but the planarization layer OC can include an organic material or an inorganic material.

[0160] In an embodiment, the second color filter CF2 can be disposed in the non-emission area NEA. For example, the second color filter CF2 can be disposed on the bank BNK in the non-emission area NEA. For example, the transmittance of the second color filter CF2 can be lower than the transmittance of the first color filter CF1 or the transmittance of the third color filter CF3.

[0161] For convenience of explanation, it is assumed that the second color is green. The human eye is more sensitive to green than to red or blue. Thus, in order to reduce the reflectance of the display panel DP (refer to Figure 1 ), it can be most effective to reduce the transmittance of the green color filter. For example, the transmittance of the second color filter CF2 can be reduced by changing the material of the second color filter CF2.

[0162] However, in the case where the transmittance of the green color filter is reduced, the color of the reflected light (e.g., the reflection color) due to the external light can appear close to magenta. Thus, the green color filter can be disposed in the non-emission area NEA to increase the proportion of green in the reflected light and adjust the reflection color. However, in the specification, the reason why the color appears close to magenta is not limited to the transmittance. For example, in the case where the reflection color appears close to magenta although the first color filter CF1, the second color filter CF2, and the third color filter CF3 have the same transmittance, the second color filter CF2 can be disposed in the non-emission area NEA.

[0163] Further, the thickness of the planarization layer OC can be reduced by disposing only the second color filter CF2 in the non-emission area NEA. Thus, the production cost of the display device DD (refer to Figure 1 ) can be reduced.

[0164] Figure 11 is a schematic cross-sectional view for describing the thickness BNK_D of the bank BNK of Figure 10 .

[0165] Referring to Figure 11 , the thickness BNK_D of the bank BNK can be determined according to the color of the reflected light. For example, as the thickness BNK_D of the bank BNK decreases, the amount of the reflected light can relatively decrease. Thus, the bank BNK can be formed to have a decreased thickness so that the increase in the proportion of the second color due to the second color filter CF2 in the non-emission area NEA can be slightly reduced.

[0166] Figure 12 and Figure 13 are schematic cross-sectional views showing the light conversion layer LCL and the color filter layer CFL of the display device DD according to an embodiment.

[0167] Because the color filter layer CFL according to an embodiment has the color filter CF in addition to the color filter CF disposed in the non-emission area NEA, the color filter layer CFL can be formed to have a thickness that isFigure 10 The color filter layers CFL have essentially the same configuration, so the same reference numerals and symbols are used to denote the same or similar components, and redundant descriptions are omitted for ease of description.

[0168] refer to Figure 12 and Figure 13 The color filter CF set in the non-emissive area (NEA) can be changed (or modified) according to the reflected color. For example, as Figure 12 As shown, when the reflected color appears close to cyan, the first color filter CF1 can be placed in the non-emissive region NEA. For example, as... Figure 13 As shown, when the reflected color appears close to yellow, the third color filter CF3 can be set in the non-emissive region NEA.

[0169] Figure 14 This is a schematic cross-sectional view showing the light conversion layer LCL and the color filter layer CFL of the display device DD according to an embodiment.

[0170] Because, apart from the absence of a low-refractive layer (LRL) (reference) Figure 10 ) and the second capping layer CAP2 (reference) Figure 10 In addition to the structure of the light conversion layer LCL according to the embodiment, it has the same structure as the light conversion layer LCL in the embodiment. Figure 10 The optical conversion layer (LCL) has essentially the same configuration, so the same reference numerals and symbols are used to denote the same or similar components, and redundant descriptions are omitted for ease of description.

[0171] refer to Figure 14 The embankment BNK can be disposed on the first capping layer CAP1, and the color filter CF can be disposed on the first capping layer CAP1 in the sub-pixel region SPA. For example, the color filter CF can contact the first capping layer CAP1 in the sub-pixel region SPA and can be disposed on the first capping layer CAP1. In an exemplary embodiment, at least one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can contact the first capping layer CAP1.

[0172] Figures 15 to 17 This is a schematic cross-sectional view showing the light conversion layer LCL and the color filter layer CFL of the display device DD according to an embodiment.

[0173] Because, apart from the color filter CF disposed in the non-emission region NEA, the color filter layer CFL according to the embodiment has the same... Figure 10 The color filter layers CFL have essentially the same configuration, so the same reference numerals and symbols are used to denote the same or similar components, and redundant descriptions are omitted for ease of description.

[0174] refer to Figures 15 to 17The color filter CF provided in the non-emission area NEA can be changed (or modified) in accordance with the reflected color. For example, the color filter CF provided in the non-emission area NEA can be changed (or modified) in accordance with the color of the reflected light.

[0175] For example, as shown in Figure 15 In a case where the reflected color appears close to blue, the first color filter CF1 and the second color filter CF2 can be provided in the non-emission area NEA.

[0176] In an embodiment, although the first color filter CF1 is provided on the second color filter CF2 in the non-emission area NEA, the embodiment is not limited thereto. For example, the second color filter CF2 can be provided on the first color filter CF1.

[0177] For example, as shown in Figure 16 In a case where the reflected color appears close to red, the second color filter CF2 and the third color filter CF3 can be provided in the non-emission area NEA.

[0178] In an embodiment, although the third color filter CF3 is provided on the second color filter CF2 in the non-emission area NEA, the embodiment is not limited thereto. For example, the second color filter CF2 can be provided on the third color filter CF3.

[0179] For example, as shown in Figure 17 In a case where the reflected color appears close to green, the first color filter CF1 and the third color filter CF3 can be provided in the non-emission area NEA.

[0180] In an embodiment, although the third color filter CF3 is provided on the first color filter CF1 in the non-emission area NEA, the embodiment is not limited thereto. For example, the first color filter CF1 can be provided on the third color filter CF3.

[0181] Figure 18 is a flowchart showing a method of manufacturing the display device DD according to an embodiment.

[0182] Referring to Figures 19 to 23The method of manufacturing the display device DD can include a step S100 of providing a substrate SUB including first, second, and third sub-pixel areas SPA1, SPA2, and SPA3 and a non-emission area NEA corresponding to boundaries between the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3, a step S200 of forming, on the substrate SUB, a display element layer DPL including light emitting elements LD respectively disposed in the first, second, and third sub-pixel areas SPA1, SPA2, and SPA3, a step S300 of forming, on the display element layer DPL, a light conversion layer LCL, and a step S400 of forming, on the light conversion layer LCL, a color filter layer CFL including first, second, and third color filters CF1, CF2, and CF3.

[0183] Figure 18 is a schematic view illustrating Figure 19 the step S300.

[0184] Referring to Figure 20 , the color conversion layer CCL can be formed on a passivation layer TFE formed on the display element layer DPL. For example, the color conversion layer CCL can be formed by a photolithography process.

[0185] A first color conversion layer CCL1 can be provided in the first sub-pixel area SPA1. A second color conversion layer CCL2 can be provided in the second sub-pixel area SPA2. A third color conversion layer CCL3 can be provided in the third sub-pixel area SPA3.

[0186] Referring to Figure 21 , the first cap layer CAP1 can be formed to cover the color conversion layer CCL. For example, the first cap layer CAP1 can be provided on the entire surface of the color conversion layer CCL.

[0187] Referring to Figure 22 and Figure 10 , a low-refraction layer LRL can be formed on the first cap layer CAP1. A second cap layer CAP2 can be formed on the low-refraction layer LRL.

[0188] For example, the steps of forming the low-refraction layer LRL and the second cap layer CAP2 can be omitted. For example, a bank BNK (refer to Figure 23 ) can be formed on the first cap layer CAP1 in the non-emission area NEA (refer to Figure 10 ), and a color filter CF (refer to Figure 24 ) can be formed on the first cap layer CAP1 in the sub-pixel area SPA (refer to Figure 23 ).

[0189] Referring to Figure 10A bank BNK can be formed on the first cap layer CAP1 in a non-emission area NEA (refer to Figure 24 ). A second color filter CF2 (refer to Figure 24 ) can be formed on the bank BNK.

[0190] Figure 25 and Figure 18 are schematic diagrams showing a step S400 of Figure 24 .

[0191] Referring to Figure 25 and Figure 10 , a color filter CF can be formed on the second cap layer CAP2 in a sub-pixel area SPA (refer to Figure 10 ). A second color filter CF2 can be formed on the bank BNK in a non-emission area NEA (refer to ​ ). A planarization layer OC can be disposed on the color filter CF. In an exemplary embodiment, at least one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can contact the second cap layer CAP2.

[0192] In the display device according to the embodiment, the bank BNK for defining a boundary between the color conversion layers CCL can be used to define an area in which light of a corresponding color is emitted.

[0193] In the display device according to the embodiment, the bank BNK can be used to define an area in which light of a corresponding color is emitted, and thus design freedom of the color filter CF in the non-emission area NEA can be enhanced.

[0194] In the display device DD according to the embodiment, one or two layers of the color filter CF can be used in the non-emission area NEA, and thus a reflection color can be adjusted.

[0195] In the display device DD according to the embodiment, one or two layers of the color filter CF can be used in the non-emission area NEA, and thus a thickness of the planarization layer OC can be reduced. Accordingly, production costs of the display device can be reduced.

[0196] However, effects of the present disclosure are not limited to the above-mentioned effects, and various modifications are possible without departing from the spirit and scope of the present disclosure.

[0197] Although specific embodiments and examples have been described herein, this is merely for a more thorough and complete understanding of the present disclosure, and those skilled in the art will understand that the embodiments are not limited to the foregoing embodiments, and other modifications, additions, and substitutions are possible.

[0198] The present disclosure can be applied to display apparatuses and electronic apparatuses including the same. For example, the present disclosure can be applied to digital TVs, 3D TVs, cellular phones, smart phones, tablet computers, VR apparatuses, PCs, home appliances, laptop computers, PDAs, portable media players (PMPs), digital cameras, music players, portable game consoles, navigation apparatuses, etc.

[0199] In summarizing the detailed description, those skilled in the art will understand that many changes and modifications can be made to the embodiments without substantially departing from the principles and spirit of the present disclosure and the scope. Accordingly, the disclosed embodiments are used only in a generic and descriptive sense, not for purposes of limitation.

Claims

1. A display device, characterized by comprising: including: a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emission region corresponding to a boundary between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light emitting elements respectively provided in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region on the substrate; a light conversion layer provided on the display element layer; and a color filter layer provided on the light conversion layer and including a first color filter, a second color filter, and a third color filter, wherein only one of the first color filter, the second color filter, and the third color filter is provided in the non-emission region.

2. The display device according to claim 1, wherein the light conversion layer includes: a bank provided in the non-emission region; a first layer provided in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and a second layer covering the first layer, and the bank is provided in the non-emission region on the second layer. the light conversion layer further includes:

3. The display device according to claim 2, wherein a low-refraction layer provided on the second layer; and a third layer covering the low-refraction layer. at least one of the first color filter, the second color filter, and the third color filter contacts the third layer.

4. The display device according to claim 3, wherein including:

5. A display device, characterized by comprising: a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emission region corresponding to a boundary between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light emitting elements respectively provided in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region on the substrate; a light conversion layer provided on the display element layer; and a color filter layer provided on the light conversion layer and including a first color filter, a second color filter, and a third color filter, wherein only two of the first color filter, the second color filter, and the third color filter are provided in the non-emission region.

6. The display device according to claim 5, wherein the first color filter and the second color filter are provided in the non-emission region, and the first color filter is provided on the second color filter in the non-emission region.

7. The display device according to claim 6, wherein the light conversion layer includes: a bank provided in the non-emission region; a first layer provided in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and a second layer covering the first layer, the bank is provided in the non-emission region on the second layer. at least one of the first color filter, the second color filter, and the third color filter contacts the second layer. the light conversion layer further includes:

8. The display device according to claim 7, wherein a low-refraction layer provided on the second layer; and 9. The display device according to claim 7, wherein a third layer covering the low-refraction layer. at least one of the first color filter, the second color filter, and the third color filter contacts the third layer. ​ 10. The display device according to claim 9, wherein ​

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