Integrated chip testing device

Abstract

The utility model provides an integrated chip testing device which comprises an upper cover, a base and an integrated signal board, the upper cover and the base are detachably connected and form a closed containing space after being connected, the integrated signal board is arranged on the upper cover in a penetrating mode, signal transmission PINs and signal collection PINs are arranged on the integrated signal board, and the signal collection PINs are arranged in the containing space. The signal transmission PIN needle is arranged outside the upper cover; the base is provided with a plurality of split test grooves, the plurality of split test grooves are arranged corresponding to the signal acquisition PINs, and gas with certain pressure can be introduced into each split test groove; when the to-be-tested integrated chip board is placed in the accommodating space, a plurality of pressure sensing chips on the to-be-tested integrated chip board are respectively located in the corresponding split test grooves, and pins of the to-be-tested integrated chip board are arranged corresponding to the signal acquisition PINs. According to the device, the space utilization rate of the integrated chip board to be detected can be improved, meanwhile, the detection efficiency of the integrated chip board can be improved, and the chip detection process is simplified.

Description

Technical Field

[0001] The embodiments disclosed herein belong to the technical field of chip testing devices, and specifically relate to an integrated chip testing device. Background Technology

[0002] In related technologies, multiple pressure-sensing chips are integrated on an integrated chip board. These chips need to be separated from the integrated chip board and tested one by one. Testing each pressure-sensing chip individually results in very low chip testing efficiency. Furthermore, the small size of the chips makes testing each chip individually extremely difficult. Utility Model Content

[0003] The embodiments disclosed herein are intended to at least address one of the technical problems existing in the prior art, and to provide an integrated chip testing device.

[0004] Embodiments of this disclosure provide an integrated chip testing device, including: an upper cover, a base, and an integrated signal board. The upper cover and the base are detachably connected, forming a closed receiving space after the upper cover and the base are connected. The integrated signal board passes through the upper cover and is provided with signal transmission pins and signal acquisition pins. The signal acquisition pins are located within the receiving space, and the signal transmission pins are located outside the upper cover.

[0005] The base has multiple split test slots on the side facing the top cover. The multiple split test slots are set to correspond to the signal acquisition PIN pins. Gas can be introduced into each split test slot.

[0006] When the integrated circuit board under test is placed in the accommodating space, the multiple pressure-sensing chips on the integrated circuit board under test are respectively located in the corresponding split test slots, and the pins of the integrated circuit board under test are set to correspond to the signal acquisition pins.

[0007] In some embodiments of this disclosure, the base is provided with an air inlet pipe, which is connected to each of the separate test slots and is used to deliver gas.

[0008] In some embodiments of this disclosure, the base is provided with a gas delivery channel, which connects the air inlet pipe to each of the separate test slots.

[0009] In some embodiments of this disclosure, the gas delivery channel is located below the split test tank, and the gas delivery channel connects to the bottom of each of the split test tanks.

[0010] In some embodiments of this disclosure, the base is provided with a mounting groove. Along the height direction of the base, the mounting groove is located above the plurality of separate test slots, and the mounting groove is connected to each of the separate test slots. The mounting groove is used to place the integrated circuit board under test.

[0011] In some embodiments of this disclosure, the base is provided with at least one side groove, the side groove is located at the edge of the mounting groove and communicates with the mounting groove, and the depth of the side groove is greater than the depth of the mounting groove.

[0012] In some embodiments of this disclosure, the base is provided with four side grooves, which are distributed circumferentially along the mounting groove.

[0013] In some embodiments of this disclosure, the cross-section of the mounting groove is rectangular along the height direction of the base, and the four side grooves are respectively disposed on the four sides of the rectangular cross-section of the mounting groove.

[0014] In some embodiments of this disclosure, a sealing ring is provided on the side of the base facing the upper cover, the sealing ring is arranged around the mounting groove of the base, and the upper cover and the base are sealed together by the sealing ring.

[0015] In some embodiments of this disclosure, a fixing knob is connected to the side of the top cover facing away from the base.

[0016] The integrated chip testing apparatus of this disclosure introduces gas into each separate test slot, causing each pressure-sensitive chip on the integrated chip board under test to sense the pressure within the slot. The pressure-sensitive chip transmits the pressure signal through its corresponding pin to the signal acquisition pin of the integrated signal board. The signal is then sequentially transmitted through the signal acquisition pin, the integrated signal board, and the signal transmission pin to an external device for pressure data collection and recording. The pressure data is then used to determine whether the pressure-sensitive chip meets the testing requirements. This integrated chip testing apparatus can test the entire integrated chip board under test without cutting it, thus eliminating the need for pre-reserved cutting space and improving the layout and space utilization of the integrated chip board. Furthermore, by simultaneously acquiring the pressure signal of each pressure-sensitive chip through the integrated signal board, the testing efficiency of the integrated chip board can be improved, simplifying the chip testing process. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the assembly structure of the integrated chip testing device according to an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of the split structure of an integrated chip testing device;

[0019] Figure 3 This is a cross-sectional view of an integrated chip testing device;

[0020] Figure 4 This is a structural diagram of the top cover and integrated signal board;

[0021] Figure 5 This is a schematic diagram of the base structure;

[0022] Figure 6 This is a schematic diagram of the integrated chip board.

[0023] The labels in the attached diagram are as follows:

[0024] 10. Top cover; 11. Fixing knob;

[0025] 20. Base; 21. Split test slot; 22. Mounting slot; 23. Side slot; 24. Air inlet pipe; 25. Gas delivery channel; 26. Sealing ring;

[0026] 30. Integrated signal board; 31. Signal acquisition pin; 32. Signal transmission pin;

[0027] 40. Integrated chip board; 41. Ceramic substrate base; 42. Pressure-sensitive chip; 43. Gel; 44. Bonding wire; 45. Pin. Detailed Implementation

[0028] To enable those skilled in the art to better understand the technical solutions of this disclosure, the disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only for explaining this disclosure and are not intended to limit the disclosure. The described embodiments are some, but not all, of the embodiments of this disclosure. Based on the described embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this disclosure.

[0029] like Figures 1 to 6As shown, an embodiment of this disclosure provides an integrated chip testing device, including: an upper cover 10, a base 20, and an integrated signal board 30. The upper cover 10 and the base 20 are detachably connected, forming a closed receiving space after the upper cover 10 and the base 20 are connected. The integrated signal board 30 is disposed through the upper cover 10. The integrated signal board 30 is provided with signal transmission pins 32 and signal acquisition pins 31. The signal acquisition pins 31 are disposed in the receiving space, and the signal transmission pins 32 are disposed outside the upper cover 10. The base 20 is provided with a plurality of split test slots 21 on the side facing the upper cover 10. The plurality of split test slots 21 are set corresponding to the signal acquisition pins 31. Gas with a certain pressure can be introduced into each split test slot 21. When the integrated chip board 40 under test is placed in the receiving space, the plurality of pressure-sensing chips 42 on the integrated chip board 40 under test are respectively located in the corresponding split test slots 21. The pins 45 of the integrated chip board 40 under test are set corresponding to the signal acquisition pins 31.

[0030] When the integrated circuit board under test (ICD) 40 is placed in the accommodating space formed by the upper cover 10 and the base 20, the ICD 40 covers each of the separate test slots 21. Multiple pressure-sensitive chips 42 on one side of the ICD 40 are arranged in a one-to-one correspondence with multiple separate test slots 21 on the base 20, and each pressure-sensitive chip 42 is located in the corresponding separate test slot 21. Multiple pins 45 on the side of the ICD 40 facing away from the pressure-sensitive chips 42 are arranged in a one-to-one correspondence with multiple signal acquisition pins 31, and each pin 45 is electrically connected to the corresponding signal acquisition pin 31. In addition, each pin 45 is electrically connected to a corresponding pressure-sensitive chip 42.

[0031] The integrated chip testing apparatus of this embodiment introduces gas at a certain pressure into each split test slot 21, causing each pressure-sensitive chip 42 of the integrated chip board under test 40 to sense the pressure within the split test slot 21. The pressure-sensitive chip 42 transmits the pressure signal through its corresponding pin 45 to the signal acquisition pin 31 of the integrated signal board 30, and then sequentially transmits it through the signal acquisition pin 31, the integrated signal board 30, and the signal transmission pin 32 to an external device for collecting and recording pressure data. The pressure data is then used to determine whether the pressure-sensitive chip 42 meets the test requirements. This integrated chip testing apparatus can test the entire integrated chip board 40 under test without cutting it, thus eliminating the need to reserve space for cutting channels and improving the layout utilization of the integrated chip board 40, thereby increasing its space utilization. Simultaneously, by acquiring the pressure signal of each pressure-sensitive chip 42 through the integrated signal board 30, the detection efficiency of the integrated chip board 40 can be improved, simplifying the chip testing process.

[0032] It should be noted that the integrated chip board 40 in this embodiment includes a ceramic substrate base 41, such as... Figure 2 , Figure 6 As shown, a plurality of pressure-sensitive chips 42 are provided on one side of the ceramic substrate base 41. Each pressure-sensitive chip 42 is provided with gel 43 and bonding wire 44 around its periphery. A plurality of pins 45 are provided on the other side of the ceramic substrate base 41. The pins 45 and the pressure-sensitive chips 42 are located on opposite sides of the ceramic substrate base 41, and the number of pins 45 is the same as the number of pressure-sensitive chips 42. The pins 45 and the pressure-sensitive chips 42 are electrically connected in a one-to-one correspondence. When the integrated circuit board 40 under test is placed in the receiving space, the ceramic substrate base 41 covers each split test slot 21. The ceramic substrate base 41 and the split test slot 21 form a split test cavity, and each pressure-sensitive chip 42 and its surrounding gel 43 and bonding wire 44 are located in the corresponding split test cavity.

[0033] In some embodiments of this disclosure, such as Figure 3 , Figure 5 As shown, the base 20 is equipped with an air inlet pipe 24, which is connected to each separate test slot 21. The air inlet pipe 24 is used to deliver gas with a certain pressure. There can be multiple air inlet pipes 24, each corresponding to a separate test slot 21; or there can be only one air inlet pipe 24, which is connected to each separate test slot 21 through a channel within the base 20. The air inlet pipe 24 is connected to an external gas supply device, allowing the external gas supply device to provide gas to the separate test slot 21. In this embodiment, the external gas supply device provides nitrogen gas with a certain pressure to the separate test slot 21. The nitrogen gas will not react with the pressure-sensitive chip 42.

[0034] In some embodiments of this disclosure, the base 20 is provided with a gas delivery channel 25, which connects the air inlet pipe 24 to each separate test slot 21. The air inlet pipe 24 is connected to the gas delivery channel 25, and the gas delivery channel 25 is connected to each separate test slot 21. Gas with a certain pressure enters the air inlet pipe 24 and then enters the gas delivery channel 25, and is delivered to each separate test slot 21 through the gas delivery channel 25.

[0035] In some embodiments of this disclosure, the gas delivery channel 25 is located below the split test tank 21, and the gas delivery channel 25 connects to the bottom of each split test tank 21 to reduce the processing difficulty of the base 20.

[0036] In other embodiments of this disclosure, the gas delivery channel 25 may also be arranged around a plurality of split test slots 21, with the gas delivery channel 25 communicating with at least one split test slot 21 and adjacent split test slots 21 communicating with each other.

[0037] In some embodiments of this disclosure, the base 20 is provided with a mounting groove 22. Along the height direction of the base 20, the mounting groove 22 is located above a plurality of separate test slots 21, and the mounting groove 22 communicates with each separate test slot 21. The mounting groove 22 is used to place the integrated circuit board 40 to be tested. The size of the mounting groove 22 is the same as the size of the ceramic substrate base 41, or the size of the mounting groove 22 is slightly larger than the size of the ceramic substrate base 41, so that the ceramic substrate base 41 can be placed in the mounting groove 22. The mounting groove 22 can restrict the movement of the ceramic substrate base 41, ensuring that each pressure-sensitive chip 42 is located in the corresponding separate test slot 21, thereby improving the accuracy of the test.

[0038] In some embodiments of this disclosure, the base 20 is provided with at least one side groove 23, which is located at the edge of the mounting groove 22 and communicates with it. The depth of the side groove 23 is greater than the depth of the mounting groove 22. When the ceramic carrier base 41 is located in the mounting groove 22, the ceramic carrier base 41 can be clamped by inserting a tool into the side groove 23, making it easy to remove the ceramic carrier base 41 from the mounting groove 22.

[0039] In some embodiments of this disclosure, the base 20 is provided with four side grooves 23, which are distributed at intervals along the circumference of the mounting groove 22. The four side grooves 23 can improve the reliability of the clamping tool in clamping the ceramic carrier base 41 and prevent the ceramic carrier base 41 from falling out of the clamping tool.

[0040] In some embodiments of this disclosure, the cross-section of the mounting groove 22 along the height direction of the base 20 is rectangular, and the ceramic carrier plate base 41 is also rectangular. The four side grooves 23 are respectively provided on the four sides of the rectangular cross-section of the mounting groove 22, which can further improve the reliability of clamping.

[0041] In some embodiments of this disclosure, a sealing ring 26 is provided on the side of the base 20 facing the upper cover 10. The sealing ring 26 is arranged around the mounting groove 22 of the base 20, and the upper cover 10 and the base 20 are sealed together by the sealing ring 26. When the upper cover 10 and the base 20 are connected, the sealing ring 26 is pressed between the upper cover 10 and the base 20 to form a sealed receiving space. Furthermore, the sealing ring 26 is arranged around the mounting groove 22, so that the mounting groove 22 is sealed within the receiving space. When the upper cover 10 and the base 20 are sealed together, the ceramic substrate base 41 is not directly pressed, avoiding damage to the ceramic substrate base 41 by the pressing pressure. At the same time, there is no requirement for the thickness of the ceramic substrate base 41, and the whole board testing fixture eliminates the cutting process, reducing the risk of the cutting process in the packaging process and improving the stability of the tested product. In addition, the layout utilization rate of the ceramic substrate base 41 can be greatly improved. In this embodiment, the pressure-sensitive chip 42 of the ceramic substrate base 41 can be increased to 56 pieces, greatly improving the utilization rate.

[0042] In some embodiments of this disclosure, such as Figure 3 , Figure 4 As shown, a fixing knob 11 is connected to the side of the upper cover 10 facing away from the base 20. Specifically, the upper cover 10 and the base 20 can be connected by threads, and the upper cover 10 and the base 20 can be connected by rotating the fixing knob 11.

[0043] In this embodiment, the signal transmission pin 32 includes multiple input signal pins and multiple output signal pins, which can be arranged alternately.

[0044] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. An integrated chip testing device, characterized in that, include: The package includes a top cover, a base, and an integrated signal board. The top cover and the base are detachably connected, forming a closed receiving space after the top cover and the base are connected. The integrated signal board is inserted through the top cover and is provided with signal transmission pins and signal acquisition pins. The signal acquisition pins are located inside the receiving space, and the signal transmission pins are located outside the top cover. The base has multiple split test slots on the side facing the top cover. The multiple split test slots are set to correspond to the signal acquisition PIN pins. Gas can be introduced into each split test slot. When the integrated circuit board under test is placed in the accommodating space, the multiple pressure-sensing chips on the integrated circuit board under test are respectively located in the corresponding split test slots, and the pins of the integrated circuit board under test are set to correspond to the signal acquisition pins.

2. The integrated chip testing apparatus according to claim 1, characterized in that, The base is provided with an air inlet pipe, which is connected to each of the separate test slots and is used to transport gas.

3. The integrated chip testing apparatus according to claim 2, characterized in that, The base is provided with a gas delivery channel, which connects the air inlet pipe to each of the separate test slots.

4. The integrated chip testing apparatus according to claim 3, characterized in that, The gas delivery channel is located below the split test tank, and the gas delivery channel connects to the bottom of each of the split test tanks.

5. The integrated chip testing apparatus according to claim 1, characterized in that, The base is provided with a mounting slot. Along the height direction of the base, the mounting slot is located above the plurality of separate test slots and is connected to each of the separate test slots. The mounting slot is used to place the integrated chip board to be tested.

6. The integrated chip testing apparatus according to claim 5, characterized in that, The base is provided with at least one side groove, which is located at the edge of the mounting groove and communicates with the mounting groove. The depth of the side groove is greater than the depth of the mounting groove.

7. The integrated chip testing apparatus according to claim 6, characterized in that, The base is provided with four side grooves, which are distributed at intervals along the circumference of the mounting groove.

8. The integrated chip testing apparatus according to claim 7, characterized in that, Along the height direction of the base, the cross-section of the mounting groove is rectangular, and the four side grooves are respectively provided on the four sides of the rectangular cross-section of the mounting groove.

9. The integrated chip testing apparatus according to claim 1, characterized in that, The base has a sealing ring on the side facing the top cover. The sealing ring is arranged around the mounting groove of the base, and the top cover and the base are sealed together by the sealing ring.

10. The integrated chip testing apparatus according to claim 1, characterized in that, A fixing knob is connected to the side of the top cover facing away from the base.

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