OLED display panel, OLED display device and electronic equipment

Abstract

The utility model relates to an OLED display panel, an OLED display device and electronic equipment, and the OLED display panel comprises a pixel array, a gate line and a source line. The pixel array comprises a plurality of sub-pixel units, and each sub-pixel unit is connected to one gate line and one source line; every four sub-pixel units in each row of the pixel array are circularly arranged according to the sequence of the first sub-pixel unit, the second sub-pixel unit, the third sub-pixel unit and the fourth sub-pixel unit; the sub-pixel units in the same row are respectively connected to one of the two gate lines corresponding to the sub-pixel units in the same row, and the gate lines connected with the sub-pixel units in different rows are different; the sub-pixel units in each column are respectively connected to the corresponding source lines, and all the sub-pixel units connected with at least part of the source lines belong to two different columns; according to the OLED display panel, the height between the effective display area and the source electrode driving chip can be reduced, and the charging speed of the sub-pixel units is high.

Description

TECHNICAL FIELD

[0001] The utility model relates to display drive field especially relates to a kind of OLED display panel, OLED display device and electronic equipment. BACKGROUND

[0002] Organic light emitting diode (Organic Light-Emitting Diode, OLED) display panel has the advantages of light, energy saving, fast response speed, high contrast ratio, and therefore has broad application prospects. The existing OLED display panel reduces the number of source output channels by using multiplexer (Multiplexer, MUX), but MUX increases the height between the active display area (Active Area, AA) of OLED display panel and the source driving chip, and the on-resistance of MUX reduces the charging speed of sub-pixel unit in OLED display panel. SUMMARY

[0003] Therefore, the utility model wants to solve the technical problem, how to reduce the number of source output channels in OLED display panel while reducing the height between the AA area of OLED display panel and the source driving chip, and does not affect the charging speed of sub-pixel unit in OLED display panel.

[0004] In order to solve the above technical problems, according to an embodiment of the utility model, an OLED display panel is provided, comprising a pixel array, a gate line and a source line; the pixel array comprises a plurality of sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, every four sub-pixel units are arranged in a cycle according to the order of first sub-pixel unit, second sub-pixel unit, third sub-pixel unit and fourth sub-pixel unit; wherein each sub-pixel unit of the same row of the pixel array is connected to one of the two gate lines corresponding to the row of sub-pixel units, and the gate lines connected by sub-pixel units of different rows are different; each column of sub-pixel units of the pixel array is connected to the corresponding source line, and all sub-pixel units connected by at least part of the source lines belong to different two columns.

[0005] In a possible implementation, in the same row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; or, in the same row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; wherein the sub-pixel unit R is configured to display red light, the sub-pixel unit B is configured to display blue light, and the sub-pixel unit G is configured to display green light.

[0006] In a possible implementation, in the odd rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; in the even rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; or, in the odd rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; in the even rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; wherein the sub-pixel unit R is configured to display red light, the sub-pixel unit B is configured to display blue light, and the sub-pixel unit G is configured to display green light.

[0007] In a possible implementation, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; or, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; wherein the sub-pixel unit R is configured to display red light, the sub-pixel unit B is configured to display blue light, and the sub-pixel unit G is configured to display green light.

[0008] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to a first gate line corresponding to the row of sub-pixel units, and the second sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the row of sub-pixel units; the number of the source lines is half of the number of columns in the pixel array, and all the sub-pixel units connected to each source line belong to two adjacent columns of sub-pixel units respectively.

[0009] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the row of sub-pixel units; the number of the source lines is half of the number of columns in the pixel array, and all the sub-pixel units connected to each source line belong to two columns of sub-pixel units respectively with one column of sub-pixel units in between.

[0010] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the row of sub-pixel units; four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the sub-pixel units located in odd rows in the first column of sub-pixel units and the sub-pixel units located in even rows in the third column of sub-pixel units are connected to a first source line of the three source lines, the sub-pixel units located in even rows in the first column of sub-pixel units and the sub-pixel units located in odd rows in the third column of sub-pixel units are connected to a second source line of the three source lines, and the second column of sub-pixel units and the fourth column of sub-pixel units are connected to a third source line of the three source lines.

[0011] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the row of sub-pixel units; four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the first column of sub-pixel units is connected to a first source line of the three source lines, the second column of sub-pixel units and the fourth column of sub-pixel units are connected to a second source line of the three source lines, and the third column of sub-pixel units is connected to a third source line of the three source lines.

[0012] According to another embodiment of the present application, an OLED display device is provided, comprising the above OLED display panel, a gate drive circuit and a source drive circuit; wherein the gate drive circuit is connected with each gate line in the OLED display panel; the source drive circuit is connected with each source line in the OLED display panel; the gate drive circuit is used for outputting a gate drive signal to the gate line to control the corresponding row channel in the pixel array to open or close; the source drive circuit is used for outputting a source drive signal to the source line to provide a driving voltage for the sub-pixel unit in the pixel array; wherein one row channel corresponds to the sub-pixel unit connected to the same gate line in the pixel array.

[0013] According to another embodiment of the present application, an electronic device is provided, comprising the above OLED display device.

[0014] The OLED display panel of the present application reduces the number of source output channels by increasing the number of gate lines (i.e. increasing the number of row channels) and designing the connection mode of the sub-pixel unit in the AA area (i.e. the area formed by the pixel array), without the need to increase MUX in the panel to reduce the number of source output channels, which can reduce the height between the AA area in the OLED display panel and the source drive chip, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of the frame area of the OLED display panel; and since MUX is not needed, the OLED display panel of the present application is not affected by the on-resistance of MUX, and the charging speed of the sub-pixel unit in the pixel array is not reduced.

[0015] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0016] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present application and serve to explain the principles of the present application.

[0017] Figure 1 A schematic diagram showing an existing OLED display device.

[0018] Figure 2 A schematic diagram showing an OLED display panel according to an embodiment of the present application.

[0019] Figure 3 A schematic diagram showing an OLED display device according to an embodiment of the present application.

[0020] Figure 4A schematic view of an OLED display device according to an embodiment of the present application is shown.

[0021] Figure 5 A schematic view of an OLED display device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0022] Various exemplary embodiments, features and aspects of the present application will be described in detail, with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0023] In the description of the present application, it needs to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0024] In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0025] In the present application, unless otherwise specifically defined and limited, the terms "mounting", "connection", "connection", "fixing" and the like should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For ordinary skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0026] The term "and / or" in this paper is only a description of the association relationship between the associated objects, which means that there can be three kinds of relationships, for example, A and / or B, which can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. In addition, the term "at least one" in this paper means any one of the multiple or any combination of at least two of the multiple, for example, including at least one of A, B and C, which can mean including any one or more elements selected from the set consisting of A, B and C.

[0027] Figure 1 A schematic diagram of a conventional OLED display device is shown, wherein, Figure 1 Figure (a) shows a schematic diagram of the structure of an existing OLED display device. Figure 1 Figure (b) shows a schematic diagram of the driving timing of the OLED display device. Figure 1 As shown in (a), the OLED display device includes an OLED display panel, a gate driving circuit, and a source driving circuit. The OLED display panel includes an AA region and a MUX composed of PMOS transistors (i.e., PMOS1-1, PMOS1-2, PMOS2-1, PMOS2-1). The AA region is the area composed of a pixel array. Each row of sub-pixel units in the pixel array shares a gate line, and each gate line corresponds to a row channel. Every two columns of sub-pixel units share a source line, and each source line corresponds to a source output channel. The gate driving circuit outputs gate driving signals (i.e., G1 to G4) to control the row channels (i.e., ROW1 to ROW4) to turn on row by row. When G1 to G4 are low, the corresponding row channel is turned on. The source driving circuit is integrated into the source driving chip and is used to provide driving voltage to the sub-pixel units in the pixel array. When the source driving circuit provides driving voltage to the sub-pixel unit and the row channel corresponding to the sub-pixel unit is turned on, the sub-pixel unit is charged.

[0028] like Figure 1As shown in (b), when G1 changes from high level to low level, ROW1 is turned on, SW1 changes from high level to low level, PMOS1-1 and PMOS1-2 are turned on, source driving unit SOP1 charges sub-pixel unit R1, and source driving unit SOP2 charges sub-pixel unit B1; then SW1 changes from low level to high level, SW2 changes from high level to low level, PMOS2-1 and PMOS2-2 are turned on, SOP1 charges sub-pixel unit G11, and SOP2 charges sub-pixel unit G12; after that, G1 changes from low level to high level, G2 changes from high level to low level, ROW1 is turned off, ROW2 is turned on, SW1 changes from high level to low level, PMOS1-1 and PMOS1-2 are turned on, SOP1 charges sub-pixel unit B2, and SOP2 charges sub-pixel unit R2; then SW1 changes from low level to high level, SW2 changes from high level to low level, PMOS2-1 and PMOS2-2 are turned on, SOP1 charges sub-pixel unit G21, and SOP2 charges sub-pixel unit G22. In the above process, the sub-pixel units output by source output channel S1 are R1, G11, B2 and G21 in sequence (i.e., SOP1 charges R1, G11, B2 and G21 in sequence); the sub-pixel units output by source output channel S2 are B1, G12, R2 and G22 in sequence (i.e., SOP2 charges B1, G12, R2 and G22 in sequence).

[0029] In the conventional display device, one source output channel is used to charge one column of sub-pixel units, the number of source output channels is the same as the number of columns of the pixel array, Figure 1 The OLED display panel shown in the figure reduces the number of source output channels by half by using a 1-to-2 MUX, but the MUX increases the height (i.e., H in Figure 1 the OLED display panel) between the AA area of the OLED display panel and the source driving chip, so that the area of the frame area of the OLED display panel increases; and the on-resistance (i.e., the on-resistance of the PMOS transistor constituting the MUX) of the MUX will reduce the charging speed of the sub-pixel unit.

[0030] Therefore, the utility model provides an OLED display panel which can reduce the number of source output channels without using a MUX, reduce the height between the AA area and the source driving chip, and will not reduce the charging speed of the sub-pixel unit.

[0031] Figure 2 Fig. 1 shows a schematic diagram of an OLED display panel according to an embodiment of the utility model, Fig. 2 shows a schematic diagram of another OLED display panel according to an embodiment of the utility model, and Figure 2As shown, the LED display panel includes a pixel array, a gate line and a source line; the pixel array includes a plurality of sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, four sub-pixel units are arranged in a cycle in the order of a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit and a fourth sub-pixel unit.

[0032] In the same row of the pixel array, each sub-pixel unit is connected to one of the two gate lines corresponding to the sub-pixel unit in the row, and the gate lines connected by the sub-pixel units in different rows are different; each column of sub-pixel units in the pixel array is connected to a corresponding source line, and all sub-pixel units connected by at least part of the source lines belong to different two columns.

[0033] For example, in the source lines corresponding to the four adjacent columns of sub-pixel units of the pixel array, all sub-pixel units connected by at least part of the source lines belong to different two columns. If the OLED display panel includes a pixel array of M rows and 4*N columns, M and N are both positive integers, then the OLED display panel includes 2*M gate lines and at most 3*N source lines (i.e. 2*M row channels and at most 3*N source output channels).

[0034] Compared with the number of gate lines (i.e. the number of row channels) and the number of rows of the pixel array in the conventional display panel, and the number of source lines (i.e. the number of source output channels) and the number of columns of the pixel array, the OLED display panel of the embodiment of the utility model reduces the number of source output channels by increasing the number of row channels and designing the connection mode of the sub-pixel units in the AA area, and does not need to increase the MUX in the panel to reduce the number of source output channels, so that the height between the AA area and the source driving chip is reduced, and the lower frame of the OLED display panel can be narrower, so that the area of the frame area of the OLED display panel can be reduced. Figure 1 The OLED display panel shown in the embodiment of the utility model reduces the influence of the on-resistance of the MUX, and does not reduce the charging speed of the sub-pixel units in the pixel array. Figure 1

[0035] ​In a possible implementation, the pixel array of the OLED display panel comprises sub-pixel units R, sub-pixel units B, and sub-pixel units G; in the same row of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G; or, in the same row of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G; wherein the sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light. That is, in the same row of the pixel array, the sub-pixel units are arranged in the order of R, G, B, G or in the order of B, G, R, G.

[0036] Exemplarily, the arrangement order of the sub-pixel units in the odd-numbered rows of the pixel array is different from the arrangement order of the sub-pixel units in the even-numbered rows of the pixel array.

[0037] As an example, in the odd-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G. That is, in the odd-numbered rows of the pixel array, the sub-pixel units are arranged in the order of R, G, B, G; in the even-numbered rows of the pixel array, the sub-pixel units are arranged in the order of B, G, R, G.

[0038] As another example, in the odd-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G. That is, in the odd-numbered rows of the pixel array, the sub-pixel units are arranged in the order of B, G, R, G; in the even-numbered rows of the pixel array, the sub-pixel units are arranged in the order of R, G, B, G.

[0039] Exemplarily, the arrangement order of the sub-pixel units in each row of the pixel array is the same.

[0040] As an example, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G. That is, the sub-pixel units in each row of the pixel array are arranged in a cycle of R, G, B, and G.

[0041] As another example, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G. That is, the sub-pixel units in each row of the pixel array are arranged in a cycle of B, G, R, and G.

[0042] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to a first gate line of two gate lines corresponding to the row of sub-pixel units, and the second sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line of the two gate lines corresponding to the row of sub-pixel units; the number of source lines in the OLED display panel is half the number of columns in the pixel array, and all the sub-pixel units connected by each source line belong to two adjacent columns of sub-pixel units. That is, in each row of the pixel array, all the sub-pixel units R and the sub-pixel units B share one gate line, and all the sub-pixel units G share one gate line; two adjacent columns of sub-pixel units in the pixel array share one source line. In this way, for an OLED display panel including a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 2*N source lines (that is, 2*M row channels and 2*N source output channels), and the number of source output channels is reduced by half.

[0043] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the row of sub-pixel units; the number of source lines in the OLED display panel is half of the number of columns in the pixel array, and all the sub-pixel units connected by each source line belong to two columns of sub-pixel units separated by one column of sub-pixel units. If the adjacent sub-pixel unit R and the sub-pixel unit G are regarded as a first pixel unit group, and the adjacent sub-pixel unit B and the sub-pixel unit G are regarded as a second pixel unit group, that is, in each row of the pixel array, all the first pixel unit groups share one gate line, and all the second pixel unit groups share one gate line; in the adjacent four columns of sub-pixel units of the pixel array, all the sub-pixel units R and the sub-pixel units B share one source line, and all the sub-pixel units G share one source line. In this way, for an OLED display panel including a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 2*N source lines (that is, 2*M row channels and 2*N source output channels), the number of source output channels is reduced by half; and when charging the sub-pixel units in the pixel array, the source output channel corresponding to the source line connected by the sub-pixel unit G can continuously charge the sub-pixel unit G, so that the effect of saving power can be achieved.

[0044] In a possible implementation, in the case that the arrangement order of the sub-pixel units in the odd-numbered rows and the arrangement order of the sub-pixel units in the even-numbered rows in the pixel array are different, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the row of sub-pixel units; the four columns of adjacent sub-pixel units of the pixel array correspond to three source lines, and in the four columns of adjacent sub-pixel units, the sub-pixel units located in the odd-numbered rows in the first column of sub-pixel units and the sub-pixel units located in the even-numbered rows in the third column of sub-pixel units are connected to the first source line of the three source lines, the sub-pixel units located in the even-numbered rows in the first column of sub-pixel units and the sub-pixel units located in the odd-numbered rows in the third column of sub-pixel units are connected to the second source line of the three source lines, and the second column of sub-pixel units and the fourth column of sub-pixel units are connected to the third source line of the three source lines. That is, in each row of the pixel array, all the first pixel unit groups share one gate line, and all the second pixel unit groups share one gate line; in the four columns of adjacent sub-pixel units of the pixel array, all the sub-pixel units R share one source line, all the sub-pixel units B share one source line, and all the sub-pixel units G share one source line. In this way, for an OLED display panel including a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 3*N source lines (that is, 2*M row channels and 3*N source output channels), and the number of source output channels is reduced by 1 / 4; and when charging the sub-pixel units in the pixel array, the source output channel corresponding to the source line connected by the sub-pixel unit R can continuously charge the sub-pixel unit R, the source output channel corresponding to the source line connected by the sub-pixel unit B can continuously charge the sub-pixel unit B, and the source output channel corresponding to the source line connected by the sub-pixel unit G can continuously charge the sub-pixel unit G, so that the effect of saving power can be achieved.

[0045] In a possible implementation, in the case that the arrangement order of the sub-pixel units in each row of the pixel array is the same, in the same row of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the row of the sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the row of the sub-pixel units; the four columns of the sub-pixel units adjacent to each other in the pixel array correspond to three source lines, and in the four columns of the sub-pixel units adjacent to each other, the first column of the sub-pixel units is connected to the first source line of the three source lines, the second column of the sub-pixel units and the fourth column of the sub-pixel units are connected to the second source line of the three source lines, and the third column of the sub-pixel units is connected to the third source line of the three source lines. That is, in each row of the pixel array, all the first pixel unit groups share one gate line, and all the second pixel unit groups share one gate line; in the four columns of the sub-pixel units adjacent to each other in the pixel array, all the sub-pixel units R share one source line, all the sub-pixel units B share one source line, and all the sub-pixel units G share one source line. In this way, for an OLED display panel including an M-row and 4*N-column pixel array, the OLED display panel includes 2*M gate lines and 3*N source lines (that is, 2*M row channels and 3*N source output channels), the number of source output channels is reduced by 1 / 4; and when charging the sub-pixel units in the pixel array, the source output channel corresponding to the source line connected by the sub-pixel unit R can continuously charge the sub-pixel unit R, the source output channel corresponding to the source line connected by the sub-pixel unit B can continuously charge the sub-pixel unit B, and the source output channel corresponding to the source line connected by the sub-pixel unit G can continuously charge the sub-pixel unit G, thereby achieving the effect of saving power.

[0046] The OLED display device includes the OLED display panel, the gate driving circuit, and the source driving circuit.

[0047] For example, the source driving circuit can include a plurality of source driving units, each of which is connected to a source line in the OLED display panel and used to provide a driving voltage for the sub-pixel units connected to the source line.

[0048] Exemplarily, when the gate driving signal is at a low level, a corresponding row channel in the pixel array (i.e., the row channel corresponding to the gate line to which the gate driving signal is input) is turned on; and when the gate driving signal is at a high level, the corresponding row channel in the pixel array is turned off.

[0049] Exemplarily, the gate driving circuit can output a gate driving signal to control the row channels in the pixel array to be turned on row by row, and the source driving circuit can generate a source driving signal according to display data to provide a driving voltage for each sub-pixel unit, so as to drive the OLED display panel to display a to-be-displayed picture.

[0050] Exemplarily, the gate driving circuit in the OLED display device can be integrated in a gate driving chip, and the source driving circuit in the OLED display device can be integrated in a source driving chip.

[0051] The OLED display device provided in the embodiment of the present application reduces the number of source output channels by increasing the number of row channels and designing the connection mode of the sub-pixel units in the AA area of the OLED display panel, and does not need to increase MUX in the OLED display panel to reduce the number of source output channels, so that the OLED display device has the advantages that Figure 1 The OLED display device reduces the height between the AA area in the OLED display panel and the source driving chip, and reduces the area of the frame area of the OLED display panel; and since MUX is not needed, the OLED display device has the advantage that Figure 1 The OLED display device does not have the influence of the on-resistance of MUX, and the charging speed of the sub-pixel unit is faster.

[0052] Figure 3 Fig. 1 shows a schematic diagram of an OLED display device according to an embodiment of the present application, wherein, Figure 3 Fig. 1(a) shows a structural schematic diagram of an OLED display device according to an embodiment of the present application, Figure 3 Fig. 1(b) shows a driving timing schematic diagram of the OLED display device. It should be noted that, Figure 3 Fig. 1(a) only shows the first four rows and the first four columns in the pixel array of the OLED display device. As Figure 3As shown in (a), in the OLED display device, the sub-pixel units of the odd rows of the pixel array of the OLED display panel are arranged in the order of R, G, B and G in a cycle, and the sub-pixel units of the even rows are arranged in the order of B, G, R and G in a cycle; in each row of the pixel array, all the sub-pixel units R and the sub-pixel units B share one gate line, and all the sub-pixel units G share one gate line; two adjacent columns of the sub-pixel units in the pixel array share one source line; the gate driving circuit is connected with each gate line in the OLED display panel, and the gate driving circuit is used for outputting a gate driving signal (namely G1-G8), which can control the row channels corresponding to the gate line 1-gate line 8 to be opened row by row; the source driving circuit includes a plurality of source driving units (namely SOP1, SOP2), each source driving unit is connected with one source line in the OLED display panel, and is used for providing a driving voltage for the sub-pixel units connected to the source line.

[0053] As shown in (a), in the OLED display device, the sub-pixel units of the odd rows of the pixel array of the OLED display panel are arranged in the order of R, G, B and G in a cycle, and the sub-pixel units of the even rows are arranged in the order of B, G, R and G in a cycle; in each row of the pixel array, all the sub-pixel units R and the sub-pixel units B share one gate line, and all the sub-pixel units G share one gate line; two adjacent columns of the sub-pixel units in the pixel array share one source line; the gate driving circuit is connected with each gate line in the OLED display panel, and the gate driving circuit is used for outputting a gate driving signal (namely G1-G8), which can control the row channels corresponding to the gate line 1-gate line 8 to be opened row by row; the source driving circuit includes a plurality of source driving units (namely SOP1, SOP2), each source driving unit is connected with one source line in the OLED display panel, and is used for providing a driving voltage for the sub-pixel units connected to the source line. Figure 3 As shown in (b), taking the first two rows of the sub-pixel units of the pixel array as an example, when G1 changes from high level to low level, the row channel corresponding to the gate line 1 is opened, SOP1 charges the sub-pixel unit R1, and SOP2 charges the sub-pixel unit B1; then G1 changes from low level to high level, G2 changes from high level to low level, the row channel corresponding to the gate line 1 is closed, the row channel corresponding to the gate line 2 is opened, SOP1 charges the sub-pixel unit G11, and SOP2 charges the sub-pixel unit G12; then G2 changes from low level to high level, G3 changes from high level to low level, the row channel corresponding to the gate line 2 is closed, the row channel corresponding to the gate line 3 is opened, SOP1 charges the sub-pixel unit B2, and SOP2 charges the sub-pixel unit R2; then G3 changes from low level to high level, G4 changes from high level to low level, the row channel corresponding to the gate line 3 is closed, the row channel corresponding to the gate line 4 is opened, SOP1 charges the sub-pixel unit G21, and SOP2 charges the sub-pixel unit G22. In the above process, the sub-pixel units output by the source output channel S1 are R1, G11, B2 and G21 in turn (namely SOP1 charges R1, G11, B2 and G21 in turn); the sub-pixel units output by the source output channel S2 are B1, G12, R2 and G22 in turn (namely SOP2 charges B1, G12, R2 and G22 in turn).

[0054] Therefore, the OLED display device does not need to use MUX to reduce the source output channels by half, and the height between the AA area of the OLED display panel and the source driving chip can be reduced, so that the lower frame of the OLED display panel can be narrower, thereby the area of the frame region of the OLED display panel can be reduced, and the charging speed of the sub-pixel units will not be reduced. Figure 1 As shown in (a), in the OLED display device, the sub-pixel units of the odd rows of the pixel array of the OLED display panel are arranged in the order of R, G, B and G in a cycle, and the sub-pixel units of the even rows are arranged in the order of B, G, R and G in a cycle; in each row of the pixel array, all the sub-pixel units R and the sub-pixel units B share one gate line, and all the sub-pixel units G share one gate line; two adjacent columns of the sub-pixel units in the pixel array share one source line; the gate driving circuit is connected with each gate line in the OLED display panel, and the gate driving circuit is used for outputting a gate driving signal (namely G1-G8), which can control the row channels corresponding to the gate line 1-gate line 8 to be opened row by row; the source driving circuit includes a plurality of source driving units (namely SOP1, SOP2), each source driving unit is connected with one source line in the OLED display panel, and is used for providing a driving voltage for the sub-pixel units connected to the source line.

[0055] Figure 4 Fig. 1 shows a schematic diagram of an OLED display device according to an embodiment of the present application, wherein, Figure 4 Fig. 1(a) shows a structural schematic diagram of an OLED display device according to an embodiment of the present application, Figure 4 Fig. 1(b) shows a driving timing schematic diagram of the OLED display device. It should be noted that, Figure 4 Fig. 1(a) only shows the first four rows and the first four columns in the pixel array of the OLED display device. As shown in Fig. 1(a), Figure 4 As shown in Fig. 1(a), in the OLED display device, the odd rows of the pixel array of the OLED display panel are arranged in the order of R, G, B, G in a cyclic manner, and the even rows of the pixel array are arranged in the order of B, G, R, G in a cyclic manner; in each row of the pixel array, all the first pixel unit groups (i.e., adjacent sub-pixel unit R and sub-pixel unit G) share a gate line, and all the second pixel unit groups (i.e., adjacent sub-pixel unit B and sub-pixel unit G) share a gate line; in the adjacent four columns of sub-pixel units of the pixel array, all the sub-pixel units R and sub-pixel units B share a source line, and all the sub-pixel units G share a source line; the gate driving circuit is connected with each gate line in the OLED display panel, and the gate driving circuit is used for outputting a gate driving signal (i.e., G1-G8), which can control the corresponding row channel of the gate line 1-gate line 8 to open row by row; the source driving circuit includes a plurality of source driving units (i.e., SOP1, SOP2), each source driving unit is connected with a source line in the OLED display panel, and is used for providing a driving voltage for the sub-pixel units connected on the source line.

[0056] As shown in Fig. 1(a), Figure 4In the OLED display device shown in (b), taking the first two rows of sub-pixel units of the pixel array as an example, when G1 changes from high level to low level, the row channel corresponding to the gate line 1 is opened, SOP1 charges the sub-pixel unit R1, and SOP2 charges the sub-pixel unit G11; then G1 changes from low level to high level, G2 changes from high level to low level, the row channel corresponding to the gate line 1 is closed, the row channel corresponding to the gate line 2 is opened, SOP1 charges the sub-pixel unit B1, and SOP2 charges the sub-pixel unit G12; then G2 changes from low level to high level, G3 changes from high level to low level, the row channel corresponding to the gate line 2 is closed, the row channel corresponding to the gate line 3 is opened, SOP1 charges the sub-pixel unit B2, and SOP2 charges the sub-pixel unit G21; then G3 changes from low level to high level, G4 changes from high level to low level, the row channel corresponding to the gate line 3 is closed, the row channel corresponding to the gate line 4 is opened, SOP1 charges the sub-pixel unit R2, and SOP2 charges the sub-pixel unit G22. In the above process, the sub-pixel units output by the source output channel S1 are R1, B1, B2 and R2 in sequence (that is, SOP1 charges R1, B1, B2 and R2 in sequence); the sub-pixel units output by the source output channel S2 are G11, G12, G21 and G22 in sequence (that is, SOP2 charges G11, G12, G21 and G22 in sequence).

[0057] In this way, the OLED display device in the embodiment of the present application can reduce the source output channels by half without using MUX, and compared with the prior art, Figure 1 The OLED display device shown in (b) can reduce the height between the AA area of the OLED display panel and the source driving chip, so that the lower frame of the OLED display panel can be narrower, thereby the area of the frame region of the OLED display panel can be reduced, and the charging speed of the sub-pixel units will not be reduced; in addition, in the OLED display device in the embodiment of the present application, one half of the source output channels can output two sub-pixel units of the same color in sequence (that is, can charge two sub-pixel units of the same color in sequence), and the other half of the source output channels can output the sub-pixel units of the same color in sequence (that is, can charge the sub-pixel units of the same color in sequence), and the charging voltage does not need to be changed when charging the sub-pixel units of the same color in sequence, so that the effect of saving power can be achieved.

[0058] Figure 5 Fig. 1 shows a schematic diagram of an OLED display device according to an embodiment of the present application, wherein, Figure 5 Fig. (a) shows a structural schematic diagram of an OLED display device according to an embodiment of the present application, Figure 5 Fig. (b) shows a driving timing schematic diagram of the OLED display device. It should be noted that, Figure 5In (a), only the first four rows and the first four columns in the pixel array of the OLED display device are shown. As Figure 5 In the OLED display device shown in (a), in the pixel array of the OLED display panel, the sub-pixel units in the odd rows are arranged in the order of R, G, B, G in a cycle, and the sub-pixel units in the even rows are arranged in the order of B, G, R, G in a cycle; in each row of the pixel array, all the first pixel unit groups (i.e., adjacent sub-pixel unit R and sub-pixel unit G) share one gate line, and all the second pixel unit groups (i.e., adjacent sub-pixel unit B and sub-pixel unit G) share one gate line; in the four adjacent columns of sub-pixel units of the pixel array, all the sub-pixel units R share one source line, all the sub-pixel units B share one source line, and all the sub-pixel units G share one source line; the gate driving circuit is connected with each gate line in the OLED display panel, and the gate driving circuit is used to output a gate driving signal (i.e., G1-G8), which can control the corresponding row channels of the gate line 1-gate line 8 to be opened row by row; the source driving circuit includes a plurality of source driving units (i.e., SOP1, SOP2, SOP3), each source driving unit is connected with one source line in the OLED display panel, and is used to provide a driving voltage for the sub-pixel units connected on the source line.

[0059] As Figure 5In the process shown in (b), taking the first two rows of sub-pixel units of the pixel array as an example, before G1 changes from high level to low level, SOP1 can pre-charge sub-pixel unit R1. Since the row channel corresponding to gate line 1 is closed at this time, the charge of sub-pixel unit R1 pre-charged by SOP1 can accumulate on source line 1, and the sub-pixel unit R1 is charged when the row channel corresponding to gate line 1 is opened; when G1 changes from high level to low level, the row channel corresponding to gate line 1 is opened, and SOP1 charges sub-pixel unit R1, SOP3 charges sub-pixel unit G11, and SOP2 can pre-charge sub-pixel unit B1. Since the row channel corresponding to gate line 2 is closed at this time, the charge of sub-pixel unit B1 pre-charged by SOP2 can accumulate on source line 2, and the sub-pixel unit B1 is charged when the row channel corresponding to gate line 2 is opened; then G1 changes from low level to high level, G2 changes from high level to low level, the row channel corresponding to gate line 1 is closed, and the row channel corresponding to gate line 2 is opened, SOP2 charges sub-pixel unit B1, SOP3 charges sub-pixel unit G12, and SOP1 can pre-charge sub-pixel unit R2. Since the row channel corresponding to gate line 3 is closed at this time, the charge of sub-pixel unit R2 pre-charged by SOP1 can accumulate on source line 1, and the sub-pixel unit R2 is charged when the row channel corresponding to gate line 3 is opened; then G2 changes from low level to high level, G3 changes from high level to low level, the row channel corresponding to gate line 2 is closed, and the row channel corresponding to gate line 3 is opened, SOP1 charges sub-pixel unit R2, SOP3 charges sub-pixel unit G21, and SOP2 can pre-charge sub-pixel unit B2. Since the row channel corresponding to gate line 4 is closed at this time, the charge of sub-pixel unit B2 pre-charged by SOP2 can accumulate on source line 2, and the sub-pixel unit B2 is charged when the row channel corresponding to gate line 4 is opened; then G3 changes from low level to high level, G4 changes from high level to low level, the row channel corresponding to gate line 3 is closed, and the row channel corresponding to gate line 4 is opened, SOP2 charges sub-pixel unit B2, and SOP3 charges sub-pixel unit G22. In the above process, source output channel S1 continuously outputs sub-pixel unit R (i.e., SOP1 continuously charges sub-pixel unit R), source output channel S2 continuously outputs sub-pixel unit B (i.e., SOP2 continuously charges sub-pixel unit B), source output channel S3 continuously outputs sub-pixel unit G (i.e., SOP3 continuously charges sub-pixel unit G), and the charging time (including pre-charging time) of sub-pixel unit R and sub-pixel unit B is 2 times that of sub-pixel unit G.

[0060] Therefore, the OLED display device provided in the embodiment of the present application can reduce the source output channel by 1 / 4 without using the MUX, can reduce the height between the AA area of the OLED display panel and the source driving chip, and can make the lower frame of the OLED display panel narrower, so that the area of the frame area of the OLED display panel can be reduced, and the charging speed of the sub-pixel unit will not be reduced; and in the OLED display device provided in the embodiment of the present application, each source output channel can continuously output the sub-pixel unit of the same color (that is, can continuously charge the sub-pixel unit of the same color), so that the effect of saving power can be achieved; in addition, since the area of the sub-pixel unit R and the sub-pixel unit B is larger than the area of the sub-pixel unit G, the charging time required by the sub-pixel unit R and the sub-pixel unit B is longer than the charging time required by the sub-pixel unit G, the charging time of the sub-pixel unit R and the sub-pixel unit B in the OLED display device provided in the embodiment of the present application is twice that of the sub-pixel unit G, so that the problem that the display color is dark due to the insufficient charging time of the sub-pixel unit R and the sub-pixel unit B under the condition that the refresh rate of the OLED display panel is high can be avoided, the charging time of the sub-pixel unit R and the sub-pixel unit B is ensured to be sufficient, and thus the better display effect can be ensured.

[0061] The embodiment of the present application further provides an electronic device, which comprises the OLED display device provided in the embodiment of the present application.

[0062] Exemplarily, the electronic device in the embodiment of the present application includes but is not limited to a desktop computer, a television, a mobile device with a large-size screen such as a mobile phone, a tablet computer and other common electronic devices.

[0063] Herein, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0064] It should be noted that, in this document, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, so that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0065] The above merely describes a specific implementation of the present application, but the protection scope of the present application is not limited thereto, any skilled person in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An organic light-emitting diode (OLED) display panel, characterized in that, It includes a pixel array, gate lines, and source lines; the pixel array includes multiple sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, every four sub-pixel units are arranged cyclically in the order of first sub-pixel unit, second sub-pixel unit, third sub-pixel unit, and fourth sub-pixel unit; In this configuration, each sub-pixel unit in the same row of the pixel array is connected to one of the two gate lines corresponding to the sub-pixel unit in that row, and the gate lines connected to the sub-pixel units in different rows are different; each column of the pixel array is connected to the corresponding source line, and at least some of the source lines connect all the sub-pixel units to different columns.

2. The OLED display panel according to claim 1, characterized in that, In the same row of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G; or... In the same row of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G. Among them, sub-pixel unit R is used to display red light, sub-pixel unit B is used to display blue light, and sub-pixel unit G is used to display green light.

3. The OLED display panel according to claim 1, characterized in that, In the odd-numbered rows of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G; or... In the odd-numbered rows of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G. Among them, sub-pixel unit R is used to display red light, sub-pixel unit B is used to display blue light, and sub-pixel unit G is used to display green light.

4. The OLED display panel according to claim 1, characterized in that, In each row of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G; or... In each row of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G. Among them, sub-pixel unit R is used to display red light, sub-pixel unit B is used to display blue light, and sub-pixel unit G is used to display green light.

5. The OLED display panel according to any one of claims 1-4, characterized in that, In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to the first gate line corresponding to the row of sub-pixel units, and the second sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the row of sub-pixel units; The number of source lines is half the number of columns in the pixel array, and all sub-pixel units connected by each source line belong to two adjacent columns of sub-pixel units.

6. The OLED display panel according to any one of claims 1-4, characterized in that, In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the row of sub-pixel units; The number of source lines is half the number of columns in the pixel array, and the sub-pixel units connected by each source line belong to two columns of sub-pixel units that are separated by one column of sub-pixel units.

7. The OLED display panel according to claim 3, characterized in that, In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the row of sub-pixel units; The pixel array has four adjacent columns of sub-pixel units corresponding to three source lines. Among the four adjacent columns of sub-pixel units, the sub-pixel units in the odd-numbered rows of the first column and the sub-pixel units in the even-numbered rows of the third column are connected to the first source line of the three source lines. The sub-pixel units in the even-numbered rows of the first column and the sub-pixel units in the odd-numbered rows of the third column are connected to the second source line of the three source lines. The sub-pixel units in the second and fourth columns are connected to the third source line of the three source lines.

8. The OLED display panel according to claim 4, characterized in that, In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the row of sub-pixel units, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the row of sub-pixel units; The four adjacent columns of sub-pixel units in the pixel array correspond to three source lines. Among the four adjacent columns of sub-pixel units, the first column of sub-pixel units is connected to the first source line of the three source lines, the second column of sub-pixel units and the fourth column of sub-pixel units are connected to the second source line of the three source lines, and the third column of sub-pixel units is connected to the third source line of the three source lines.

9. An OLED display device, characterized in that, Includes the OLED display panel, gate driving circuit, and source driving circuit as described in any one of claims 1-8; The gate driving circuit is connected to each gate line in the OLED display panel; the source driving circuit is connected to each source line in the OLED display panel; the gate driving circuit is used to output a gate driving signal to the gate line to control the corresponding row channel in the pixel array to turn on or off; the source driving circuit is used to output a source driving signal to the source line to provide a driving voltage for the sub-pixel unit in the pixel array; wherein, one row channel corresponds to a sub-pixel unit in the pixel array connected to the same gate line.

10. An electronic device, characterized in that, Includes the OLED display device as described in claim 9.

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