Laser emission array and laser device

Abstract

The utility model discloses a laser emission array and a laser device, and relates to the technical field of semiconductor lasers, the laser emission array comprises a plurality of VCSEL luminous points and a plurality of metal interconnection layers, part of the metal interconnection layers are arranged at intervals along a first direction and are correspondingly connected with anodes of a row or a column of VCSEL luminous points, and the metal interconnection layers are arranged at intervals along a second direction. The other part of the metal interconnection layers are arranged at intervals along a second direction and are correspondingly connected with negative electrodes of one column or one row of VCSEL light-emitting points, and the first direction is perpendicular to the second direction; one end of each metal interconnection layer is connected with a bonding pad, and at least part of the metal interconnection layers is designed in the mode that the line resistance of at least part of the area of the same metal interconnection layer is gradually reduced in the direction away from the bonding pad. Therefore, the voltage difference between the VCSEL light-emitting points can be reduced, and the consistency of the light power generated by the VCSEL light-emitting points is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor laser technology, and more particularly to a laser emitting array and laser device. Background Technology

[0002] A vertical cavity surface emitting laser (VCSEL) is a laser whose emission direction is perpendicular to the surface of the resonant cavity. It has advantages such as low threshold current, small operating current, small divergence angle, high coupling efficiency with optical fiber, low mass production cost, and easy integration. It is currently widely used in medical, lighting, optical pumping, optical communication, and optical storage fields.

[0003] Several VCSEL emitting points can be integrated into a two-dimensional addressable laser emitting array. In the laser emitting array, because the metal interconnect layer that electrically connects each VCSEL emitting point has line resistance, this line resistance will cause a voltage drop. The further away the VCSEL emitting point is from the driving end, the lower its voltage. Since the current and optical power are proportional to the applied voltage, the voltage difference between each VCSEL emitting point in the VCSEL array will cause the optical power generated by each VCSEL emitting point to be different from each other, affecting the uniformity of the VCSEL array's light emission. Utility Model Content

[0004] This application provides a laser emitting array and laser device, which can solve the problem of low uniformity of light emission from VSCEL arrays.

[0005] According to one aspect of this application, one embodiment provides a laser emitting array, comprising:

[0006] A plurality of VCSEL light-emitting points, wherein each VCSEL light-emitting point includes a positive electrode and a negative electrode;

[0007] A plurality of metal interconnect layers, wherein some of the metal interconnect layers are arranged at intervals along a first direction and are correspondingly connected to the positive electrode of a row or column of VCSEL light-emitting points, and other metal interconnect layers are arranged at intervals along a second direction and are correspondingly connected to the negative electrode of a row or column of VCSEL light-emitting points, wherein the first direction is perpendicular to the second direction;

[0008] Each of the metal interconnect layers has one end connected to a pad, and at least some of the metal interconnect layers are designed such that at least a portion of the same metal interconnect layer has a gradually decreasing line resistance along the direction away from the pad.

[0009] In one embodiment, the metal interconnection layer includes first interconnection segments above the VCSEL light emitting points, and second interconnection segments between adjacent VCSEL light emitting points or between a VCSEL light emitting point and a pad, and in the at least part of the metal interconnection layer, the line resistance of the second interconnection segments of the same metal interconnection layer decreases in turn in the direction away from the pad.

[0010] In one embodiment, the line resistance of the second interconnection segments of the same metal interconnection layer decreases in an arithmetic progression or geometric progression in the direction away from the pad.

[0011] In one embodiment, the metal interconnection layer includes first interconnection segments above the VCSEL light emitting points, and second interconnection segments between adjacent VCSEL light emitting points or between a VCSEL light emitting point and a pad, and in the at least part of the metal interconnection layer, the line resistance of the first interconnection segments of the same metal interconnection layer remains unchanged or decreases in turn in the direction away from the pad.

[0012] In one embodiment, the line resistance of the first interconnection segments of the same metal interconnection layer decreases in an arithmetic progression or geometric progression in the direction away from the pad.

[0013] In one embodiment, in the at least part of the metal interconnection layer, the line resistance of the first interconnection segments of the same metal interconnection layer remains unchanged, and the line resistance of the second interconnection segments of the same metal interconnection layer decreases in turn in the direction away from the pad.

[0014] In one embodiment, in the at least part of the metal interconnection layer, the line resistance of the first interconnection segments of the same metal interconnection layer remains unchanged in the direction away from the pad; the first interconnection segment is provided with a light passage for laser to pass through, and the first interconnection segment has a spacing between the opposite two sides and the light passage.

[0015] In one embodiment, in the at least part of the metal interconnection layer, the cross-sectional area of the same metal interconnection layer gradually increases in the direction away from the pad.

[0016] In one embodiment, the designed metal interconnection layer corresponds to the positive electrode of a row or a column of the VCSEL light emitting points.

[0017] According to another aspect of the present application, in one embodiment, a laser device is provided, which includes a driving chip and a laser emitting array as described above, and the driving chip is electrically connected with the pads.

[0018] According to the laser emission array and the laser device of the above embodiments, the line resistance of at least part of the region of the same metal interconnection layer gradually decreases in the direction away from the pad, and the smaller the line resistance, the smaller the corresponding voltage drop, thereby reducing the voltage difference between the VCSEL light emitting points, improving the consistency of the light power generated by the VCSEL light emitting points, and improving the uniformity of the VCSEL array light emission. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 A structural schematic diagram of a laser emission array of an embodiment;

[0020] Figure 2 Another structural schematic diagram of a laser emission array of an embodiment;

[0021] Figure 3 Still another structural schematic diagram of a laser emission array of an embodiment;

[0022] Figure 4 Still another structural schematic diagram of a laser emission array of an embodiment;

[0023] Figure 5 A structural schematic diagram of a laser emission array of an embodiment; Figure 4 A structural schematic diagram of a laser emission array of an embodiment;

[0024] REFERENCE SIGNS:

[0025] 1-metal interconnection layer, 11-first interconnection section, 12-second interconnection section; 2-optical channel; 3-VCSEL light emitting point, 31-anode, 32-cathode, 33-N-type reflection layer, 34-active layer, 35-P-type reflection layer; 4-substrate; 5-pad. DETAILED DESCRIPTION

[0026] The application will be further described in detail through specific embodiments and with reference to the drawings. In different embodiments, similar elements are denoted by similar element reference numbers. In the following embodiments, many details are described in order to make the application better understood. However, those skilled in the art can easily recognize that some features can be omitted in different cases, or can be replaced by other elements, materials, or methods. In some cases, some operations related to the application are not shown or described in the specification, in order to avoid the core part of the application being overwhelmed by too much description, and it is not necessary to describe these related operations in detail for those skilled in the art according to the description in the specification and general technical knowledge in the art.

[0027] In addition, features, operations, or functions described in the specification can be implemented in any suitable manner. The ordinal numbers of components herein, such as "first", "second", etc., are merely used to distinguish the described objects, and do not have any sequential or technical meaning. The "connection" or "coupling" in the present application, unless otherwise specified, includes direct and indirect connections (couplings).

[0028] Referring to Figures 1 to 5 The embodiment of the present application provides a laser emission array, which comprises a plurality of VCSEL light emitting points 3, a plurality of metal interconnection layers 1 and other functional components as needed, which will be described in detail below.

[0029] As Figure 5 shown, the VCSEL light emitting point 3 in the embodiment comprises an anode 31 and a cathode 32. The VCSEL light emitting point 3 is used to emit laser, and the VCSEL light emitting point 3 can comprise an N-type reflective layer 33, an active layer 34, and a P-type reflective layer 35. The active layer 34 is located between the N-type reflective layer 33 and the P-type reflective layer 35. The N-type reflective layer 33 is provided with the cathode 32, and the P-type reflective layer 35 is provided with the anode 31. In an embodiment, the VCSEL light emitting point 3 is a vertical cavity surface emitting laser (VCSEL). The N-type reflective layer 33 can be an N-type mirror, specifically an N-type Bragg mirror (N-DBR). The active layer 34 comprises a quantum well composite structure arranged in layers, which is used to convert electrical energy into optical energy. The P-type reflective layer 35 can be a P-type mirror, specifically a P-type Bragg mirror (P-DBR). The N-type reflective layer 33 and the P-type reflective layer 35 are used to reflect and enhance the light generated by the active layer 34, and then emit from the surface of the P-type reflective layer 35. In some embodiments, the N-type reflective layer 33, the active layer 34 and the P-type reflective layer 35 can be formed by a method such as but not limited to chemical vapor deposition. The cathode 32 and the anode 31 in the embodiment are conductive metal materials. In some embodiments, the VCSEL light emitting point 3 can further comprise other layer structures, such as a protective layer, a photoelectric confinement layer, an ohmic contact layer, etc. The material of the protective layer in the embodiment is an insulating material. The VCSEL light emitting point 3 in the embodiment is provided with a plurality of, i.e. two or more, VCSEL light emitting points 3, which can form a two-dimensional addressable laser emission array. In an embodiment, the laser emission array further comprises a substrate 4, and the VCSEL light emitting point 3 is arranged on the substrate 4. The cathode 32 and the anode 31 are located on the side of the VCSEL light emitting point 3 away from the substrate 4. The substrate 4 in the embodiment can be any material suitable for forming a vertical cavity surface emitting laser, such as a gallium arsenide (GaAs) substrate.

[0030] As Figures 1-4As shown, in the metal interconnection layers 1 of the embodiment, part of the metal interconnection layers 1 are arranged in the first direction and correspond to the anodes 31 of a row or a column of the VCSEL light emitting points 3, and another part of the metal interconnection layers 1 are arranged in the second direction and correspond to the cathodes 32 of a row or a column of the VCSEL light emitting points 3, the first direction being perpendicular to the second direction; one end of each of the metal interconnection layers 1 is connected to a bonding pad 5, and at least part of the metal interconnection layers are designed such that the line resistance gradually decreases in the direction away from the bonding pad in at least part of the region of the same metal interconnection layer.

[0031] It can be understood that, in the embodiment, part of the metal interconnection layers 1 correspond to the anodes 31 of a row or a column of the VCSEL light emitting points 3, i.e., each of the metal interconnection layers 1 in the part of the metal interconnection layers 1 corresponds to the anodes 31 of a row or a column of the VCSEL light emitting points 3, and another part of the metal interconnection layers 1 correspond to the cathodes 32 of a row or a column of the VCSEL light emitting points 3, i.e., each of the metal interconnection layers 1 in the another part of the metal interconnection layers 1 corresponds to the cathodes 32 of a row or a column of the VCSEL light emitting points 3. The metal interconnection layers 1 in the embodiment are conductive metal materials, which can be formed by, but not limited to, evaporation, sputtering or electroplating. After the metal interconnection layers 1 are connected to the anodes 31 and the cathodes 32 of the VCSEL light emitting points 3, the metal interconnection layers 1 can drive the VCSEL light emitting points 3 to emit light. In the embodiment, the metal interconnection layers 1 are arranged at intervals, i.e., there is a spacing between adjacent metal interconnection layers 1. In the embodiment, one end of each of the metal interconnection layers 1 is provided with a bonding pad 5, and the other end corresponds to the anodes 31 or the cathodes 32 of a row or a column of the VCSEL light emitting points 3. The length of one end and the other end of the metal interconnection layers 1 is not specifically limited in the embodiment. The more the number of the VCSEL light emitting points 3 connected by the metal interconnection layers 1, the longer the length of the other end of the metal interconnection layers 1. The first direction in the embodiment can be any one of the row direction and the column direction of the array, and the second direction is the other one of the row direction and the column direction of the array.

[0032] In one embodiment, the VCSEL light-emitting points 3 can be distributed in a rectangular array, with the first direction being the row direction of the rectangular array and the second direction being the column direction of the rectangular array. In the laser emitting array, two or more metal interconnect layers 1 are arranged at intervals along the first direction and at intervals along the second direction. Each intersection of the metal interconnect layers 1 arranged in the first direction and the metal interconnect layers 1 arranged in the second direction corresponds to a VCSEL light-emitting point 3. By selecting the metal interconnect layers 1 in the specified first direction and the metal interconnect layers 1 in the specified second direction, the VCSEL light-emitting point 3 corresponding to the intersection of the specified metal interconnect layers 1 in the first direction and the metal interconnect layers 1 in the second direction can be energized and lit, thereby enabling individual driving of each VCSEL light-emitting point 3. In this embodiment, each pad 5 is used for electrical connection with the driver chip, and the driver chip enables the light emission control of the VCSEL array.

[0033] In this embodiment, the line resistance refers to the resistance of the wire, and its magnitude directly affects the current transmission efficiency. A higher line resistance means greater resistance encountered by the current during transmission, leading to increased energy loss and thus an increased voltage drop in the circuit. In this embodiment, at least a portion of the metal interconnect layer is designed such that the line resistance gradually decreases in at least a portion of the same metal interconnect layer along the direction away from the pads. A smaller line resistance corresponds to a smaller voltage drop, thereby reducing the voltage difference between each VCSEL light-emitting point 3, improving the consistency of the light power generated by each VCSEL light-emitting point 3, and resulting in better uniformity of light emission from the VCSEL array. In some embodiments, methods for reducing line resistance include, but are not limited to, improving the width, thickness, and shape of the metal interconnect layer 1.

[0034] In one embodiment, such as Figure 1 , Figure 2 As shown, the metal interconnect layer 1 includes a first interconnect segment 11 located above the VCSEL light-emitting points 3, and a second interconnect segment 12 located between adjacent VCSEL light-emitting points 3 or between the VCSEL light-emitting points 3 and the pads 5. In at least a portion of the metal interconnect layer 1, the line resistance of the second interconnect segment 12 of the same metal interconnect layer 1 decreases sequentially along the direction away from the pads 5. The sequential decrease in line resistance of the second interconnect segment 12 can also mitigate the effects of voltage drop, thereby reducing the voltage difference between each VCSEL light-emitting point 3, improving the consistency of the optical power generated by each VCSEL light-emitting point 3, and resulting in better uniformity of light emission from the VCSEL array.

[0035] The second interconnection section 12 in the embodiment is located between adjacent VCSEL light emitting points 3 or between a VCSEL light emitting point 3 and a pad 5. The length of each second interconnection section 12 is not specifically limited in the embodiment. When the length of the second interconnection section 12 is equal to the length between two adjacent first interconnection sections 11, the first interconnection section 11 and the second interconnection section 12 in the same metal interconnection layer 1 are connected in a head-to-tail structure. When the length of the second interconnection section 12 is less than the length between two adjacent first interconnection sections 11, there is also another metal interconnection part between the first interconnection section 11 and the second interconnection section 12 in the same metal interconnection layer 1. In some application scenarios, the line resistance of the other metal interconnection part can remain unchanged, for example, the width and thickness can be the same. In this case, the width and thickness of the other metal interconnection part can also be the same as those of the first interconnection section 11. Or the line resistance of the other metal interconnection part in the same metal interconnection layer 1 can also decrease in turn in the direction away from the pad 5. In some embodiments, in at least part of the metal interconnection layer 1, the line resistance of the second interconnection section 12 in the same metal interconnection layer 1 is less than that of the previous first interconnection section 11 adjacent to it in the direction away from the pad 5. For example, the cross-sectional area of the second interconnection section 12 in the same metal interconnection layer 1 can be greater than that of the previous first interconnection section 11 adjacent to it. However, it is not limited thereto. In the embodiment, the size relationship between the line resistance of the second interconnection section 12 and that of the first interconnection section 11 can be designed to be greater than or less than, which is not limited in the application.

[0036] In an embodiment, the line resistance of the second interconnection section 12 in the same metal interconnection layer 1 decreases in an arithmetic progression or geometric progression in the direction away from the pad 5. When the line resistance decreases in an arithmetic progression or geometric progression, the change of the line resistance is more uniform, which is conducive to further improving the consistency of the optical power generated by each VCSEL light emitting point 3. In some application scenarios, the line resistance of the second interconnection section 12 can also be realized by other setting methods. In the embodiment, the line resistance of the second interconnection section 12 can be realized by changing the cross-sectional area of the second interconnection section 12, for example, the width and / or thickness of the second interconnection section 12 gradually increases in the direction away from the pad 5. The larger the width and / or thickness, the larger the corresponding cross-sectional area. The larger the cross-sectional area, the smaller the corresponding line group. The cross-sectional area is the cross-sectional area perpendicular to the extension direction of the metal interconnection layer 1. In some embodiments, the length of the second interconnection section 12 can also increase in turn in the direction away from the pad 5. The longer the length, the more the line resistance decreases, thereby further reducing the voltage drop.

[0037] In an embodiment, the metal interconnection layer 1 includes first interconnection sections 11 above the VCSEL light emitting points 3, and second interconnection sections 12 between adjacent VCSEL light emitting points 3 or between the VCSEL light emitting points 3 and the pads 5. In at least part of the metal interconnection layer 1, the line resistance of the first interconnection sections 11 of the same metal interconnection layer 1 remains unchanged or decreases successively in the direction away from the pads 5. The line resistance of the first interconnection sections 11 decreases successively, which can improve the influence of voltage drop, thereby reducing the voltage difference between the VCSEL light emitting points 3 and improving the consistency of the light power generated by the VCSEL light emitting points 3, and the uniformity of the light emitted by the VCSEL array is better. When the line resistance of the first interconnection sections 11 remains unchanged, it is beneficial to the good electrical connection between the metal interconnection layer 1 and the VCSEL light emitting points 3. In the embodiment, the line resistance of the first interconnection sections 11 remains unchanged, which can be achieved by keeping the cross-sectional area of the first interconnection sections 11 unchanged, and the width and thickness of the corresponding region of the first interconnection sections 11 can remain unchanged.

[0038] In an embodiment, when the line resistance of the first interconnection sections 11 of the same metal interconnection layer 1 decreases successively, the line resistance of the first interconnection sections 11 of the same metal interconnection layer 1 can decrease in an arithmetic progression or a geometric progression in the direction away from the pads. When the line resistance decreases in an arithmetic progression or a geometric progression, the change of the line resistance is more uniform, which is beneficial to further improve the consistency of the light power generated by the VCSEL light emitting points 3. In some application scenarios, the line resistance of the first interconnection sections 11 can also be set in other ways to decrease successively. In the embodiment, the line resistance of the first interconnection sections 11 decreases successively, which can be achieved by changing the cross-sectional area of the first interconnection sections 11 to decrease the line resistance of the first interconnection sections 11, for example, by gradually increasing the width and / or thickness of the first interconnection sections 11 in the direction away from the pads 5. The width and / or thickness increases, and the corresponding cross-sectional area also gradually increases. The larger the cross-sectional area is, the smaller the corresponding line group is. In some embodiments, the length of the first interconnection sections 11 can also increase successively in the direction away from the pads 5. The longer the length is, the more the line resistance decreases, thereby further reducing the voltage drop.

[0039] In an embodiment, as shown in FIG. 1, in at least part of the metal interconnection layer 1, the line resistance of the first interconnection sections 11 of the same metal interconnection layer 1 remains unchanged in the direction away from the pads 5, and the line resistance of the second interconnection sections 12 of the same metal interconnection layer 1 decreases successively. Figure 1 , Figure 2 The line resistance of the first interconnection sections 11 remains unchanged, and the line resistance of the second interconnection sections 12 decreases successively, which can improve the influence of voltage drop, thereby reducing the voltage difference between the VCSEL light emitting points 3 and improving the consistency of the light power generated by the VCSEL light emitting points 3. When the line resistance of the first interconnection sections 11 remains unchanged, it is beneficial to the good electrical connection between the metal interconnection layer 1 and the VCSEL light emitting points 3.

[0040] In one embodiment, the longitudinal section of the second interconnection section 12 can be trapezoidal, with the small end of the trapezoid close to the pad 5; and / or, the longitudinal section of the second interconnection section 12 can be rectangular; the longitudinal section is a section parallel to the extension direction of the metal interconnection layer 1 and parallel to the width direction of the metal interconnection layer 1. When the longitudinal section of the second interconnection section 12 is trapezoidal, as shown in Figure 1 , Figure 4 , when the longitudinal section of the second interconnection section 12 is rectangular, as shown in Figure 2 . When the longitudinal section of the second interconnection section 12 is trapezoidal or rectangular, it is simple to manufacture, and when manufacturing, a groove for manufacturing the metal interconnection layer 1 is processed on the insulating protective layer, and the metal is manufactured in the groove to form the metal interconnection layer 1. When the longitudinal section is trapezoidal, the line resistance in the second interconnection section 12 can also gradually decrease along the direction of the current, so that the line resistance changes more uniformly, and the uniformity of light emission can be further improved.

[0041] In one embodiment, as shown in Figure 4 , in order to further improve the uniformity of light emission, the longitudinal section of the second interconnection section 12 is trapezoidal, and in the same metal interconnection layer 1, along the direction away from the pad 5, the width of the small end of the latter second interconnection section 12 is greater than or equal to the width of the large end of the former second interconnection section 12. At this time, the line resistance of the second interconnection section 12 can also be reduced more uniformly. In some application scenarios, as shown in Figure 1 , the width of the small end of each second interconnection section 12 can also be the same as the width of the first interconnection section 11, so that the width of the large end of the latter second interconnection section 12 is greater than the width of the large end of the former second interconnection section 12.

[0042] In one embodiment, in at least part of the metal interconnection layer 1, along the direction away from the pad 5, the line resistance of the first interconnection section 11 of the same metal interconnection layer 1 remains unchanged; the first interconnection section 11 is provided with a light channel 2 for the laser to pass through, and the first interconnection section 11 has a spacing between the opposite two sides and the light channel 2. The line resistance of the first interconnection section 11 remains unchanged, which facilitates the setting of the spacing between the opposite two sides of the first interconnection section 11 and the light channel 2, ensures sufficient metal contact area during electrical connection, and also ensures the current injection efficiency around the light channel 2, because the width of the first interconnection section 11 is equal, the injection efficiency can remain almost unchanged. In some application scenarios, the light channel 2 in the present embodiment can be composed of multiple circular holes, but is not limited thereto, and the light channel 2 in the present embodiment can also have other structures.

[0043] In one embodiment, as shown in Figure 3As shown, in at least part of the metal interconnection layer 1, the cross-sectional area of the same metal interconnection layer 1 gradually increases in the direction away from the pad 5. The gradual increase is simple to manufacture and process, and in some embodiments, the width of the same metal interconnection layer 1 can gradually increase in the direction away from the pad 5. The greater the width, the greater the cross-sectional area, and the smaller the line resistance. Alternatively, in some embodiments, the thickness of the same metal interconnection layer 1 can gradually increase in the direction away from the pad 5, and the greater the thickness, the greater the cross-sectional area, and the smaller the line resistance. When the metal interconnection layer 1 includes the first interconnection segment 11 and the second interconnection segment 12, because the cross-sectional area of the metal interconnection layer 1 gradually increases in the direction away from the pad 5, the line resistance of the corresponding first interconnection segment 11 and the line resistance of the second interconnection segment 12 are sequentially reduced.

[0044] In an embodiment, each metal interconnection layer 1 is designed to correspond to the positive electrode 31 of a row or a column of VCSEL light emitting points 3. At this time, each metal interconnection layer 1 is designed to correspond to the positive electrode pad 5. The current flows through the positive electrode pad 5 to the positive electrode 31 of the VCSEL light emitting point 3, and because the line resistance of the second interconnection segment 12 sequentially decreases in the direction away from the pad 5, the voltage drop in the circuit can be reduced, the energy loss is small, and the uniformity of the VSCEL array light emission is improved. In some application scenarios, each metal interconnection layer 1 can correspond to the negative electrode 32 of a row or a column of VCSEL light emitting points 3, and at this time, each metal interconnection layer 1 is designed to correspond to the negative electrode pad 5. In some embodiments, all metal interconnection layers 1 can be designed so that the second interconnection segment 12 of the same metal interconnection layer 1 is designed to meet: in the direction away from the pad 5, the line resistance of the second interconnection segment 12 sequentially decreases. That is, part of each metal interconnection layer 1 is designed to correspond to the positive electrode 31 of a row or a column of VCSEL light emitting points 3, and another part of each metal interconnection layer 1 is designed to correspond to the negative electrode 32 of a row or a column of VCSEL light emitting points 3.

[0045] The laser emission array provided by the above embodiment has at least part of the same metal interconnection layer 1 gradually decreasing in line resistance in the direction away from the pad 5, and the smaller the line resistance, the smaller the corresponding voltage drop, thereby reducing the voltage difference between the VCSEL light emitting points 3, improving the consistency of the optical power generated by the VCSEL light emitting points 3, and improving the uniformity of the VSCEL array light emission.

[0046] The embodiment of the present application also provides a laser device, which includes a driving chip and a laser emission array as described above, and the driving chip is electrically connected with the pads 5.

[0047] The structure of the laser emission array in the embodiment is the same as that of the above embodiment, and will not be described again. The laser emission array can provide a stable light source for the laser device. The laser device in the embodiment can be a laser emission device for laser radar, data communication, and consumer electronics (such as a mobile phone). The driving chip in the embodiment is not specifically limited, and any driving chip that can achieve driving control of the VSCEL array light emission can be used. The laser device in the embodiment can also include other functional components, which can be set as needed.

[0048] The laser device provided in the embodiment includes a laser emission array, wherein the line resistance of at least part of the area of the same metal interconnection layer 1 gradually decreases in the direction away from the pad 5. The smaller the line resistance, the smaller the corresponding voltage drop. Thus, the voltage difference between the VCSEL light emitting points 3 can be reduced, and the consistency of the optical power generated by the VCSEL light emitting points 3 is improved, and the uniformity of the VSCEL array light emission is better.

[0049] The above application uses specific examples to illustrate the present application, which is only used to help understand the present application and does not limit the present application. For those skilled in the art to which the present application belongs, according to the idea of the present application, a number of simple deductions, deformations or substitutions can be made.

Claims

1. A laser emission array, characterized by, The laser emission array comprises: a plurality of VCSEL light emitting points, each of which comprises a positive electrode and a negative electrode; a plurality of metal interconnection layers, wherein some of the metal interconnection layers are arranged in a first direction and correspond to the positive electrodes of a row or a column of VCSEL light emitting points, and the other metal interconnection layers are arranged in a second direction and correspond to the negative electrodes of a column or a row of VCSEL light emitting points, the first direction being perpendicular to the second direction; one end of each of the metal interconnection layers is connected to a pad, and at least some of the metal interconnection layers are designed such that the sheet resistance of at least some areas of the same metal interconnection layer gradually decreases in a direction away from the pad.

2. The laser emission array of claim 1, wherein, The metal interconnection layers comprise first interconnection sections above the VCSEL light emitting points and second interconnection sections between adjacent VCSEL light emitting points or between a VCSEL light emitting point and a pad, and in the at least some metal interconnection layers, the sheet resistance of the second interconnection sections of the same metal interconnection layer gradually decreases in a direction away from the pad.

3. The laser emission array of claim 2, wherein, The sheet resistance of the second interconnection sections of the same metal interconnection layer decreases in an arithmetic progression or a geometric progression in a direction away from the pad.

4. The laser emission array of claim 1, wherein, The metal interconnection layers comprise first interconnection sections above the VCSEL light emitting points and second interconnection sections between adjacent VCSEL light emitting points or between a VCSEL light emitting point and a pad, and in the at least some metal interconnection layers, the sheet resistance of the first interconnection sections of the same metal interconnection layer remains unchanged or gradually decreases in a direction away from the pad.

5. The laser emission array of claim 4, wherein, The sheet resistance of the first interconnection sections of the same metal interconnection layer decreases in an arithmetic progression or a geometric progression in a direction away from the pad.

6. The laser emission array of claim 4, wherein, In the at least some metal interconnection layers, the sheet resistance of the first interconnection sections of the same metal interconnection layer remains unchanged, and the sheet resistance of the second interconnection sections of the same metal interconnection layer gradually decreases in a direction away from the pad.

7. The laser emission array of claim 4, wherein, In the at least some metal interconnection layers, the sheet resistance of the first interconnection sections of the same metal interconnection layer remains unchanged; the first interconnection sections are provided with light passages for laser to pass through, and the first interconnection sections have a spacing between the opposite two sides and the light passages.

8. The laser emission array of any of claims 1-5, wherein, In the at least some metal interconnection layers, the cross-sectional area of the same metal interconnection layer gradually increases in a direction away from the pad.

9. The laser emission array of any of claims 1-7, wherein, The metal interconnection layers are designed to correspond to the positive electrodes of a row or a column of the VCSEL light emitting points.

10. A laser device, characterized by comprising: The laser emission array comprises a driving chip and a laser emission array as claimed in any one of claims 1-9, the driving chip being electrically connected to the pads.

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