Heterojunction solar cell
By employing microtextured structures in different regions on the substrate surface of heterojunction solar cells, the problem of the inability to differentiate textured structures in existing technologies has been solved, achieving the effects of improved cell performance and reduced cost.
Patent Information
- Application Number
- CN202423167409.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2034-12-20
AI Technical Summary
The textured surface structure of existing heterojunction solar cells cannot create differentiation, resulting in high series resistance and poor performance.
Different sizes of microtextured structures are used in different areas of the substrate surface of heterojunction solar cells to form a double-sided differentiated textured structure, which enhances the light reception and paste contact performance of the front and back sides and reduces series resistance.
By using a differentiated textured surface structure, the light utilization rate and product quality of the solar cells are improved, production costs are reduced, and the paste contact at the grid line positions is enhanced, thereby increasing the fill factor (FF) and current collection efficiency.
Smart Images
Figure CN223681439U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of solar cell, in particular to a kind of heterojunction solar cell. BACKGROUND
[0002] The current heterojunction solar cell is double-sided symmetric or single-sided textured with the other side being a polished structure. The existing texture is difficult to have both reflectivity and silver paste contact due to the uniform distribution of the texture. In addition, the same texture distribution, CVD, PVD and other film thickness distribution are uniform, which cannot form differentiated silver paste contact and light receiving surface, resulting in high series resistance of the cell and poor performance of the cell. SUMMARY
[0003] One object of the first aspect of the utility model is to provide a heterojunction solar cell that solves the problem of poor cell performance due to the inability to form differentiated textures in the prior art.
[0004] In particular, the utility model provides a heterojunction solar cell, comprising:
[0005] a substrate having a first surface and a second surface;
[0006] a first intrinsic amorphous silicon layer, an n-type doped layer, a first transparent conductive film layer and a first grid line are sequentially arranged from inside to outside on the first surface of the substrate; and
[0007] a second intrinsic amorphous silicon layer, a p-type doped layer, a second transparent conductive film layer and a second grid line are sequentially arranged from inside to outside on the second surface of the substrate;
[0008] wherein the first surface of the substrate includes a first region and a second region, the first region is located below the first grid line, the second region is a region other than the first region, the substrate includes a first micro-texture structure located in the first region and a second micro-texture structure located in the second region;
[0009] the second surface of the substrate includes a third region and a fourth region, the third region is located below the second grid line, the fourth region is a region other than the third region, the substrate includes a third micro-texture structure located in the third region and a fourth micro-texture structure located in the fourth region;
[0010] the size of the first micro-texture structure is less than or equal to the size of the second micro-texture structure, and / or the size of the third micro-texture structure is less than or equal to the size of the fourth micro-texture structure.
[0011] Optionally, the size of the first micro-textured structure is smaller than the size of the second micro-textured structure, and the size of the third micro-textured structure is equal to the size of the fourth micro-textured structure.
[0012] Optionally, the size of the third micro-textured structure and the size of the fourth micro-textured structure are 1-8 microns.
[0013] Optionally, the size of the third micro-textured structure and the size of the fourth micro-textured structure are 0.1-1 microns.
[0014] Optionally, the size of the first micro-textured structure is equal to the size of the second micro-textured structure, and the size of the third micro-textured structure is smaller than the size of the fourth micro-textured structure.
[0015] Optionally, the size of the first micro-textured structure is smaller than the size of the second micro-textured structure, and the size of the third micro-textured structure is smaller than the size of the fourth micro-textured structure.
[0016] Optionally, the first gate line includes a main gate and a fine gate, the width of the main gate is greater than the width of the fine gate, the first area is only located below the main gate, or the first area is only located below the fine gate, or the first area is located below the main gate and the fine gate.
[0017] Optionally, the second gate line includes a main gate and a fine gate, the width of the main gate is greater than the width of the fine gate, the third area is only located below the main gate; or the third area is only located below the fine gate, or the third area is located below the main gate and the fine gate.
[0018] Optionally, the first surface further includes a first contact point area, the texture structure of the first contact point area is the same as the second micro-textured structure of the second area.
[0019] Optionally, the second surface further includes a second contact point area, the texture structure of the second contact point area is the same as the fourth micro-textured structure of the fourth area.
[0020] The first surface of the substrate of the heterojunction solar cell of the scheme comprises a first region and a second region, the first region is located below the first grid line, the second surface of the substrate comprises a third region and a fourth region, the third region is located below the second grid line, the size of the first micro-textured structure of the first region is less than or equal to the second micro-textured structure of the second region, and / or the size of the third micro-textured structure of the third region is less than or equal to the fourth micro-textured structure of the fourth region, so that the micro-textured structures of different regions of the substrate surface can be the same or different, in addition, the micro-textured structures of different surfaces of the substrate can be the same or different, so that the size of the micro-textured structure can be obtained according to the different needs of different positions of the cell, the double-sided differential textured structure, the light receiving and paste contact performance of the front and back surfaces are maximized, the paste contact of the grid line position of the front and back surfaces is enhanced, the series resistance is reduced, the FF is improved, and the quality of the product is improved, the cost of the product is reduced, and the light utilization rate is improved.
[0021] The above and other objects, advantages and features of the present application will become more apparent from the following detailed description of some embodiments thereof, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0022] Some embodiments of the present application will now be described, by way of example only, with reference to the accompanying drawings. Identical or similar components or parts are referred to using the same reference numerals throughout the drawings. It will be appreciated that these drawings are not necessarily to scale. In the drawings:
[0023] Figure 1 is a schematic cross-sectional structure diagram of a heterojunction solar cell according to one specific embodiment of the present application;
[0024] Figure 2 is a schematic cross-sectional structure diagram of a substrate according to one specific embodiment of the present application;
[0025] Figure 3 is a schematic cross-sectional structure diagram of a substrate according to another specific embodiment of the present application;
[0026] Figure 4 is a schematic cross-sectional structure diagram of a substrate according to yet another specific embodiment of the present application;
[0027] Figure 5 is a schematic cross-sectional structure diagram of a substrate according to yet another specific embodiment of the present application;
[0028] Figure 6 is a schematic structure diagram of a heterojunction solar cell according to one specific embodiment of the present application.
[0029] BRIEF DESCRIPTION OF DRAWINGS
[0030] heterojunction solar cell - 100; substrate - 110; first surface - 111; second surface - 112; first intrinsic amorphous silicon layer - 120; n-type doped layer - 130; first transparent conductive film layer - 140; first grid line - 150; main grid - 151; fine grid - 152; second intrinsic amorphous silicon layer - 160; p-type doped layer - 170; second transparent conductive film layer - 180; second grid line - 190; first micro-textured structure - 1111; second micro-textured structure - 1112; third micro-textured structure - 1121; fourth micro-textured structure - 1122; first contact point area - 1113. DETAILED DESCRIPTION
[0031] In the description of the present embodiment, it should be understood that the terms "length", "width", "height", "upper", "lower", "left", "right", "vertical", "horizontal", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present utility model.
[0032] As a specific embodiment of the present utility model, as shown in Figure 1 and Figure 2 Specifically, the present embodiment provides a heterojunction solar cell 100, which can include:
[0033] a substrate 110 having a first surface 111 and a second surface 112;
[0034] a first intrinsic amorphous silicon layer 120, an n-type doped layer 130, a first transparent conductive film layer 140 and a first grid line 150 arranged in the substrate 110 from inside to outside on the first surface 111 of the substrate 110; and
[0035] a second intrinsic amorphous silicon layer 160, a p-type doped layer 170, a second transparent conductive film layer 180 and a second grid line 190 arranged in the substrate 110 from inside to outside on the second surface 112 of the substrate 110;
[0036] Wherein, the first surface 111 of the substrate 110 can include a first area and a second area, the first area is located below the first grid line 150, and the second area is an area other than the first area, the substrate 110 includes a first micro-textured structure 1111 located in the first area and a second micro-textured structure 1112 located in the second area;
[0037] The second surface 112 of the substrate 110 comprises a third region and a fourth region, the third region is located below the second grid line 190, and the fourth region is a region other than the third region, the substrate 110 comprises a third micro-textured structure 1121 located in the third region and a fourth micro-textured structure 1122 located in the fourth region;
[0038] The size of the first micro-textured structure 1111 is less than or equal to the size of the second micro-textured structure 1112, and / or the size of the third micro-textured structure 1121 is less than or equal to the size of the fourth micro-textured structure 1122.
[0039] The material of the n-type doped layer is amorphous silicon-based material, microcrystalline silicon-based material or nanosilicon-based material, and / or the material of the p-type doped layer is amorphous silicon-based material, microcrystalline silicon-based material or nanosilicon-based material.
[0040] The first surface 111 of the substrate 110 of the heterojunction solar cell comprises a first region and a second region, the first region is located below the first grid line 150, the second surface 112 of the substrate 110 comprises a third region and a fourth region, the third region is located below the second grid line 190, the size of the first micro-textured structure 1111 of the first region is less than or equal to the size of the second micro-textured structure 1112 of the second region, and / or the size of the third micro-textured structure 1121 of the third region is less than or equal to the size of the fourth micro-textured structure 1122 of the fourth region, so that the micro-textured structures of different regions on the surface of the substrate 110 can be the same or different, and in addition, the micro-textured structures of different surfaces of the substrate 110 can be the same or different, so that the size of the micro-textured structure can be obtained according to different requirements of different positions of the cell, the double-sided differential textured structure, the light receiving and paste contact performance of the front and back surfaces are guaranteed to the greatest extent, the paste contact of the grid line position of the front and back surfaces is enhanced, the series resistance is reduced, the FF is improved, and the quality of the product is improved, and the cost of the product is reduced.
[0041] As a specific embodiment of the utility model, as shown in the drawings, Figure 2 The size of the first micro-textured structure 1111 is less than the size of the second micro-textured structure 1112, and the size of the third micro-textured structure 1121 is equal to the size of the fourth micro-textured structure 1122.
[0042] Specifically, due to the material characteristics of the heterojunction low-temperature paste, there are cavities between the normal suede and silver or copper particles in the paste after curing, the formation of the cavities leads to the increase of the series resistance, and the micro-suede is similar to a polished state, which can reduce the cavities between the paste and the suede, enhance the contact between the silicon wafer and the paste, and reduce the contact resistance.
[0043] As a specific embodiment of the utility model, as shown in the drawings, Figure 2 The size of the third micro-suede structure 1121 and the size of the fourth micro-suede structure 1122 in the embodiment are 1-8 microns. For example, the size of the fourth micro-suede structure 1122 can be 1 micron, 2 microns, 3 microns, 4 microns, 5 microns, 6 microns, 7 microns or 8 microns.
[0044] Specifically, the first surface 111 of the substrate 110 in the embodiment is a main light-receiving surface, and the differential suede is made on the first surface 111, which can ensure that the illumination area is not affected and enhance the contact of the front gate line position, thereby reducing the series resistance.
[0045] As a specific embodiment of the utility model, as shown in the drawings, Figure 3 The size of the third micro-suede structure 1121 and the size of the fourth micro-suede structure 1122 in the embodiment are 0.1-1 micron. Specifically, the size of the third micro-suede structure 1121 and the size of the fourth micro-suede structure 1122 in the embodiment are 0.1 micron, 0.3 micron, 0.5 micron, 0.7 micron, 0.9 micron or 1 micron.
[0046] Specifically, the first surface 111 of the substrate 110 in the embodiment is a main light-receiving surface, and the differential suede is made on the first surface 111, which can ensure that the illumination area is not affected and enhance the contact of the front gate line position, thereby reducing the series resistance. The second surface 112 in the embodiment is a micro-suede structure, which can improve the contact between the paste and the substrate 110 of the second surface 112, reduce the contact resistance, and the micro-suede structure of the second surface 112 can improve the reflection of long-wave light and enhance the current.
[0047] As a specific embodiment of the utility model, as shown in the drawings, Figure 4As shown, the size of the first micro-textured structure 1111 is equal to the size of the second micro-textured structure 1112, and the size of the third micro-textured structure 1121 is smaller than the size of the fourth micro-textured structure 1122.
[0048] Specifically, the first micro-textured structure 1111 and the second micro-textured structure 1112 of the first surface 111 of the substrate 110 of the embodiment are the same and are of a regular size, i.e., the size of the first micro-textured structure 1111 and the size of the second micro-textured structure 1112 are 1-8 microns.
[0049] As a specific embodiment of the utility model, as shown in Figure 5 As shown, preferably, the size of the first micro-textured structure 1111 is smaller than the size of the second micro-textured structure 1112, and the size of the third micro-textured structure 1121 is smaller than the size of the fourth micro-textured structure 1122. Such design makes the first surface 111 and the second surface 112 of the substrate 110 have differentiated micro-textured structures, so that the positions where the grid lines of the first surface 111 and the second surface 112 contact are small micro-textured structures, ensuring the bonding force of the grid lines, increasing the contact between the silver paste and the transparent conductive layer, and reducing the contact resistance. In the positions outside the grid lines, normal micro-textured structures are made, the specific surface area is small, which is beneficial to CVD anti-epitaxy and passivation, can effectively reduce the passivation requirement of CVD, save film plating time, and reduce equipment investment. In addition, the specific surface area is small, and reduced TCO or transparent conductive film material can be used to achieve the anti-reflection and passivation layer protection effect, thereby reducing the production cost.
[0050] As a specific embodiment of the utility model, as shown in Figure 6 As shown, the first grid line 150 of the embodiment can include a main grid 151 and a fine grid 152, the width of the main grid 151 is greater than the width of the fine grid 152, the first area is only located below the main grid 151, or the first area is only located below the fine grid 152, or the first area is located below the main grid 151 and the fine grid 152.
[0051] Specifically, when the first area is located below the main grid 151, the embodiment can reduce the contact resistance of the current collection area of the main grid 151 and improve the FF. When the first area is located below the auxiliary grid, the contact resistance of the auxiliary grid area can be reduced, which is more conducive to the reduction of the battery contact resistance, and the process is slightly more complex, and the printing process requires high alignment and overprinting. When the first area is located below the main grid 151 and the auxiliary grid, the contact resistance of the silver paste area on the front surface of the battery can be reduced to the greatest extent, and the process complexity is further improved.
[0052] As a specific embodiment of the utility model, the second grid line 190 of the embodiment can include a main grid and a fine grid (not shown in the figure, similar to the structure of the first grid line 150), the width of the main grid is greater than the width of the fine grid, the third region is only located below the main grid, or the third region is only located below the fine grid, or the third region is located below the main grid and the fine grid.
[0053] Specifically, when the second region is located below the main grid, the embodiment can reduce the contact resistance of the main grid current collection area, improve FF. When the second region is located below the auxiliary grid, the contact resistance of the auxiliary grid area can be reduced, which is more conducive to the reduction of the battery contact resistance, the process is slightly complex, and the printing process alignment overprint requirement is high. When the second region is located below the main grid and the auxiliary grid, the contact resistance of the positive paste area of the battery can be reduced to the maximum extent, and the process complexity is further improved.
[0054] As a specific embodiment of the utility model, the first surface 111 of the embodiment can further include a first contact point region 1113, the suede structure of the first contact point region 1113 is the same as the second micro suede structure 1112 of the second region.
[0055] Specifically, the suede structure of the first contact point region 1113 of the embodiment is the same as the second micro suede structure 1112, which ensures that the paste tension of the first contact point region 1113 meets the requirements and ensures the reliability of the battery assembly.
[0056] As a specific embodiment of the utility model, the second surface 112 of the embodiment can further include a second contact point region (not shown in the figure, similar to the first contact point region 1113), the suede structure of the second contact point region is the same as the fourth micro suede structure 1122 of the fourth region.
[0057] Specifically, the suede structure of the second contact point region of the embodiment is the same as the fourth micro suede structure 1122, which ensures that the paste tension of the second contact point region meets the requirements and ensures the reliability of the battery assembly.
[0058] At this point, those skilled in the art should realize that although the utility model has been shown and described in detail herein, many other variants or modifications conforming to the principles of the utility model can be directly determined or deduced according to the content disclosed by the utility model without departing from the spirit and scope of the utility model. Therefore, the scope of the utility model should be understood and recognized as covering all these other variants or modifications.
Claims
1. A heterojunction solar cell, characterized by, Comprise: a substrate having a first surface and a second surface; a first intrinsic amorphous silicon layer, an n-type doped layer, a first transparent conductive film layer and a first gate line arranged in order from inside to outside of the substrate on the first surface of the substrate; and a second intrinsic amorphous silicon layer, a p-type doped layer, a second transparent conductive film layer and a second gate line arranged in order from inside to outside of the substrate on the second surface of the substrate; wherein the first surface of the substrate comprises a first region and a second region, the first region is located below the first gate line, the second region is a region other than the first region, the substrate comprises a first micro-textured structure located in the first region and a second micro-textured structure located in the second region; the second surface of the substrate comprises a third region and a fourth region, the third region is located below the second gate line, the fourth region is a region other than the third region, the substrate comprises a third micro-textured structure located in the third region and a fourth micro-textured structure located in the fourth region; the size of the first micro-textured structure is less than or equal to the size of the second micro-textured structure, and / or the size of the third micro-textured structure is less than or equal to the size of the fourth micro-textured structure.
2. The heterojunction solar cell according to claim 1, wherein the size of the first micro-textured structure is less than the size of the second micro-textured structure, and the size of the third micro-textured structure is equal to the size of the fourth micro-textured structure.
3. The heterojunction solar cell according to claim 2, wherein the size of the third micro-textured structure and the size of the fourth micro-textured structure are 1-8 microns.
4. The heterojunction solar cell according to claim 2, wherein the size of the third micro-textured structure and the size of the fourth micro-textured structure are 0.1-1 microns.
5. The heterojunction solar cell according to claim 1, wherein the size of the first micro-textured structure is equal to the size of the second micro-textured structure, and the size of the third micro-textured structure is less than the size of the fourth micro-textured structure.
6. The heterojunction solar cell according to claim 1, wherein the size of the first micro-textured structure is less than the size of the second micro-textured structure, and the size of the third micro-textured structure is less than the size of the fourth micro-textured structure.
7. The heterojunction solar cell according to any one of claims 1-6, wherein the first gate line comprises a main gate and a fine gate, the width of the main gate is greater than the width of the fine gate, the first region is located only below the main gate, or the first region is located only below the fine gate, or the first region is located below both the main gate and the fine gate.
8. The heterojunction solar cell according to any one of claims 1-6, wherein the second gate line comprises a main gate and a fine gate, the width of the main gate is greater than the width of the fine gate, the third region is located only below the main gate; or the third region is located only below the fine gate, or the third region is located below both the main gate and the fine gate. 9. The heterojunction solar cell according to any one of claims 1 to 6, wherein the first surface further comprises a first contact point region having the same micro-textured structure as the second micro-textured structure of the second region.
10. The heterojunction solar cell according to any one of claims 1 to 6, wherein the second surface further comprises a second contact point region having the same micro-textured structure as the fourth micro-textured structure of the fourth region.