Strong impulse noise hearing protection circuit

Abstract

The utility model discloses a strong pulse noise hearing protection circuit which comprises a signal input end and a signal output end. The pulse amplitude limiting module circuit is connected with the signal input end and the signal output end and is used for carrying out pulse amplitude limiting processing on the input signal; the azimuth sensing circuit is connected with the signal input end and is used for sensing azimuth information of the input signal; the delay control module circuit is connected with the signal input end, the pulse amplitude limiting module circuit and the direction sensing circuit; according to the utility model, through cooperative work of the pulse amplitude limiting module circuit, the orientation sensing circuit and the time delay control module circuit, comprehensive processing of input signals is realized, and the pulse amplitude limiting module circuit ensures that output signals do not exceed a preset maximum amplitude; the azimuth sensing circuit extracts and transmits azimuth information of the input signal; and the delay control module circuit performs delay control on the signal according to the azimuth information and the preset condition, so that the circuit can output the signal meeting the specific requirement, and the requirements of various application scenes are met.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of protection circuit, specifically relates to a strong impulse noise hearing protection circuit. BACKGROUND

[0002] In the environment of industrial production, military training, building construction, strong impulse noise exists universally, and poses a serious threat to the hearing of the operating personnel. The traditional hearing protection equipment mostly adopts passive sound insulation material, which can reduce the direct impact of noise on the ear to a certain extent, but its protection effect is limited in the face of sudden high-intensity impulse noise. In addition, the prior art lacks effective identification of the direction of noise source, which limits the safety vigilance of users in complex environments. SUMMARY

[0003] Therefore, the main purpose of the utility model is to provide a strong impulse noise hearing protection circuit.

[0004] To achieve the above purpose, the technical scheme of the utility model is as follows:

[0005] The utility model embodiment provides a strong impulse noise hearing protection circuit, which comprises:

[0006] A signal input end for receiving an input signal;

[0007] A signal output end for outputting a processed signal;

[0008] A pulse limiting module circuit connected with the signal input end and the signal output end, for pulse limiting processing of the input signal;

[0009] A direction sensing circuit connected with the signal input end, for sensing the direction information of the input signal;

[0010] A delay control module circuit connected with the signal input end, the pulse limiting module circuit and the direction sensing circuit, for delay control of the signal according to the direction information and preset conditions.

[0011] In the scheme, the pulse limiting module circuit comprises a first amplifier, a comparator, a first transistor, a first resistor, a third resistor, a fifth resistor, a seventh resistor, a ninth resistor, a thirteenth resistor, a first capacitor, a second capacitor, a third capacitor, a tenth capacitor, a thirteenth capacitor and a first inductor; the emitter of the first transistor is connected with the signal input end and the first end of the fifth resistor respectively; the collector of the first transistor is connected with the first end of the seventh resistor, the first end of the second capacitor, the first end of the third capacitor and the first end of the first resistor respectively; the second end of the first resistor is connected with the control end of the comparator; the output end of the comparator is connected with the first end of the first capacitor, the first end of the ninth resistor, the fourth end of the first amplifier and the signal output end through the third resistor in series; the fifth end of the first amplifier is connected with the signal input end and the first end of the thirteenth capacitor respectively; the third end of the first amplifier is connected with the first end of the thirteenth resistor, the second end of the first capacitor, the second end of the ninth resistor and the input end of the comparator respectively; the second end of the thirteenth resistor is connected with the first end of the tenth capacitor through the first inductor in series; the second end of the seventh resistor, the second end of the second capacitor, the second end of the third capacitor and the second end of the thirteenth capacitor are grounded.

[0012] In the scheme, the second end of the first resistor in the pulse limiting module circuit is connected with the control end of the comparator; the output end of the comparator is connected with the first end of the first capacitor through the third resistor and connected with the fourth end of the first amplifier through the ninth resistor, forming a feedback path of pulse limiting.

[0013] In the scheme, the orientation sensing circuit comprises a twenty-second resistor, a seventeenth capacitor, an orientation sensor, a twentieth capacitor, a fourth inductor, a twenty-fourth resistor, a twentieth resistor, a sixteenth capacitor, a second amplifier, a twenty-second capacitor, a twenty-fourth capacitor, a twenty-sixth capacitor, a twenty-eighth capacitor, a twenty-seventh resistor, and a twenty-eighth resistor. The first end of the twenty-second resistor is connected to the signal input end. The second end of the twenty-second resistor is connected to the first end of the seventeenth capacitor, the orientation sensor, the first end of the twentieth capacitor, and the second end of the tenth capacitor, respectively. The second end of the twentieth capacitor is connected to the second end of the second amplifier, the first end of the sixteenth capacitor, and the first end of the twentieth resistor in sequence after being connected to the fourth inductor and the twenty-fourth resistor in sequence. The second end of the sixteenth capacitor is connected to the second end of the twentieth resistor, the first end of the second amplifier, and the first end of the twenty-second capacitor, respectively. The third end of the second amplifier is connected to the first end of the first amplifier, the first end of the twenty-eighth resistor, the first end of the twenty-seventh resistor, and the first end of the twenty-eighth capacitor, respectively. The second end of the twenty-seventh resistor is connected to the first end of the twenty-sixth capacitor, the first end of the twenty-fourth capacitor, the eighth end of the second amplifier, and the signal input end, respectively. The second end of the seventeenth capacitor, the second end of the twenty-eighth resistor, the second end of the twenty-eighth capacitor, the second end of the twenty-fourth capacitor, and the second end of the twenty-sixth capacitor are all grounded.

[0014] In the scheme, the third end of the second amplifier in the orientation sensing circuit is connected to the first end of the first amplifier, for transmitting the orientation information to the pulse limiting module circuit.

[0015] In the scheme, the delay control module circuit comprises a twenty-ninth resistor, a fourth transistor, a thirty-seventh resistor, a thirtieth capacitor, a second diode, a thirty-eighth resistor, a third amplifier, a forty-first resistor, a thirty-fourth resistor, and a thirty-second resistor. The first end of the twenty-ninth resistor is connected to the second end of the fifth resistor and the base of the first transistor, respectively. The second end of the twenty-ninth resistor is connected to the collector of the fourth transistor. The base of the fourth transistor is connected to the first end of the thirtieth capacitor, the negative electrode of the second diode, and the first end of the thirty-eighth resistor in sequence after being connected to the thirty-seventh resistor in sequence. The second end of the thirty-eighth resistor is connected to the positive electrode of the second diode and the seventh end of the third amplifier, respectively. The fifth end of the third amplifier is connected to the second end of the twenty-second capacitor after being connected to the thirty-fourth resistor in sequence. The sixth end of the third amplifier is connected to the first end of the forty-first resistor and the first end of the thirty-second resistor, respectively. The second end of the thirty-second resistor is connected to the signal input end. The collector of the fourth transistor, the second end of the thirtieth capacitor, and the second end of the forty-first resistor are all grounded.

[0016] In the scheme, the base of the fourth triode in the delay control module circuit is connected to the first end of the thirty-first capacitor through the thirty-seventh resistor, and is connected to the seventh end of the third amplifier through the second diode, forming a trigger path of delay control.

[0017] In the scheme, the fifth end of the third amplifier in the delay control module circuit is connected to the second end of the twenty-second capacitor through the thirty-fourth resistor, used for receiving the output signal of the direction sensing circuit, and adjusting the delay control according to the signal.

[0018] Compared with the prior art, the utility model has the advantages of:

[0019] The pulse limiting module circuit ensures that the output signal does not exceed the preset maximum amplitude, the direction sensing circuit extracts and transmits the direction information of the input signal, and the delay control module circuit controls the signal according to the direction information and the preset condition, so that the circuit can output the signal meeting the specific requirements, and meet the needs of various application scenarios. BRIEF DESCRIPTION OF DRAWINGS

[0020] The accompanying drawings described herein are used to disclose a further understanding of the utility model, and form a part of the utility model, the illustrative embodiment of the utility model and its explanation are used to explain the utility model, and do not constitute improper limitation to the utility model.

[0021] Figure 1 It is a structural schematic view of the strong pulse noise hearing protection circuit. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical scheme and advantages of the utility model more clear and obvious, the utility model is further described in detail below by combining with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the utility model, and are not used to limit the utility model.

[0023] The same or similar reference numerals in the drawings of the embodiment correspond to the same or similar parts; in the description of the utility model, it should be understood that the terms "first", "second", "third" and the like are only used to facilitate the differentiation of the same components, and do not indicate or imply the number of the components referred to, and should not be understood as a limitation of the patent. For those skilled in the art, the specific meanings of the above terms can be understood according to the specific circumstances.

[0024] It is to be understood that the terms "including", "comprising", and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, article, or apparatus. Without further limitation, an element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, article, or apparatus that includes the element.

[0025] The utility model embodiment provides a kind of strong impulse noise hearing protection circuit, as shown in Figure 1 It includes:

[0026] Signal input terminal, for receiving input signal;

[0027] Signal output terminal, for outputting processed signal;

[0028] Pulse limiting module circuit, connected with signal input terminal and signal output terminal, for pulse limiting processing to input signal;

[0029] Azimuth sensing circuit, connected with signal input terminal, for sensing azimuth information of input signal;

[0030] Delay control module circuit, connected with signal input terminal, pulse limiting module circuit and azimuth sensing circuit, for delay control to signal according to azimuth information and preset condition.

[0031] As shown in Figure 1As shown, the pulse limiting module circuit includes a first amplifier U4, a comparator U1A, a first transistor Q1, a first resistor R1, a third resistor R3, a fifth resistor R5, a seventh resistor R7, a ninth resistor R9, a thirteenth resistor R13, a first capacitor C1, a second capacitor C2, a third capacitor C3, a tenth capacitor C10, a thirteenth capacitor C13, and a first inductor L1. The emitter of the first transistor Q1 is connected to the signal input terminal 3.3V_SY and the first terminal of the fifth resistor R5. The collector of the first transistor Q1 is connected to the first terminal of the seventh resistor R7, the first terminal of the second capacitor C2, the first terminal of the third capacitor C3, and the first terminal of the first resistor R1. The second terminal of the first resistor R1 is connected to the control terminal of the comparator U1A. The output terminal of comparator U1A is connected in series with a third resistor R3 and then to the first terminal of the first capacitor C1, the first terminal of the ninth resistor R9, the fourth terminal of the first amplifier U4, and the signal output terminal. The fifth terminal of the first amplifier U4 is connected to the signal input terminal 3.3V_SY and the first terminal of the thirteenth capacitor C13. The third terminal of the first amplifier U4 is connected to the first terminal of the thirteenth resistor R13, the second terminal of the first capacitor C1, the second terminal of the ninth resistor R9, and the input terminal of comparator U1A. The second terminal of the thirteenth resistor R13 is connected in series with a first inductor L1 and then to the first terminal of the tenth capacitor C10. The second terminals of the seventh resistor R7, the second terminal of the second capacitor C2, the second terminal of the third capacitor C3, and the second terminal of the thirteenth capacitor C13 are all grounded.

[0032] like Figure 1 As shown, the second end of the first resistor R1 in the pulse limiting module circuit is connected to the control terminal of the comparator U1A. The output terminal of the comparator U1A is connected to the first terminal of the first capacitor C1 through the third resistor R3, and to the fourth terminal of the first amplifier U4 through the ninth resistor R9, forming a feedback path for pulse limiting.

[0033] like Figure 1As shown, the orientation sensing circuit includes a 22nd resistor R22, a 17th capacitor C17, an orientation sensor U1, a 20th capacitor C20, a 4th inductor L4, a 24th resistor R24, a 20th resistor R20, a 16th capacitor C16, a 2nd amplifier U7A, a 22nd capacitor C22, a 24th capacitor C24, a 26th capacitor C26, a 28th capacitor C28, a 27th resistor R27, and a 28th resistor R28. The first terminal of the 22nd resistor R22 is connected to the signal input terminal 3.3V_SY. The second terminal of the 22nd resistor R22 is connected to the first terminal of the 17th capacitor C17, the orientation sensor U1, the first terminal of the 20th capacitor C20, and the second terminal of the 10th capacitor C10. The second terminal of the 20th capacitor C20 is connected in series with the 4th inductor L4 and the 24th resistor R24, and then connected to the second terminal of the 2nd amplifier U7A and the 10th capacitor C10. The first terminal of the six-capacitor C16 is connected to the first terminal of the twentieth resistor R20. The second terminal of the sixteenth capacitor C16 is connected to the second terminal of the twentieth resistor R20, the first terminal of the second amplifier U7A, and the first terminal of the twenty-second capacitor C22. The third terminal of the second amplifier U7A is connected to the first terminal of the first amplifier U4, the first terminal of the twenty-eighth resistor R28, the first terminal of the twenty-seventh resistor R27, and the first terminal of the twenty-eighth capacitor C28. The second terminal of the twenty-seventh resistor R27 is connected to the first terminal of the twenty-sixth capacitor C26, the first terminal of the twenty-fourth capacitor C24, the eighth terminal of the second amplifier U7A, and the signal input terminal 3.3V_SY. The second terminals of the seventeenth capacitor C17, the twenty-eighth resistor R28, the twenty-eighth capacitor C28, the twenty-fourth capacitor C24, and the twenty-sixth capacitor C26 are all grounded.

[0034] like Figure 1 As shown, the third terminal of the second amplifier in the orientation sensing circuit is connected to the first terminal of the first amplifier, and is used to transmit orientation information to the pulse limiting module circuit.

[0035] like Figure 1As shown, the delay control module circuit includes a 29th resistor R29, a 4th transistor Q4, a 37th resistor R37, a 30th capacitor C30, a 2nd diode D2, a 38th resistor R38, a 3rd amplifier U7B, a 41st resistor R41, a 34th resistor R34, and a 32nd resistor R32. The first terminal of the 29th resistor R29 is connected to the second terminal of the 5th resistor R5 and the base of the 1st transistor Q1. The second terminal of the 29th resistor R29 is connected to the collector of the 4th transistor Q4. The base of the 4th transistor Q4 is connected in series with the 37th resistor R37 and then to the first terminal of the 30th capacitor C30 and the 2nd diode D2. The negative terminal of diode 2 is connected to the first terminal of the thirty-eighth resistor R38. The second terminal of the thirty-eighth resistor R38 is connected to the positive terminal of the second diode D2 and the seventh terminal of the third amplifier U7B. The fifth terminal of the third amplifier U7B is connected in series with the thirty-fourth resistor R34 and then connected to the second terminal of the twenty-second capacitor C22. The sixth terminal of the third amplifier U7B is connected to the first terminal of the forty-first resistor R41 and the first terminal of the thirty-second resistor R32. The second terminal of the thirty-second resistor R32 is connected to the signal input terminal 3.3V_SY. The collector of the fourth transistor Q4, the second terminal of the thirty-tenth capacitor C30, and the second terminal of the forty-first resistor R41 are all grounded.

[0036] like Figure 1 As shown, the base of the fourth transistor Q4 in the delay control module circuit is connected to the first terminal of the thirtieth capacitor C30 through the thirty-seventh resistor R37, and is connected to the seventh terminal of the third amplifier U7B through the second diode D2, forming the trigger path for delay control.

[0037] like Figure 1 As shown, the fifth terminal of the third amplifier U7B in the delay control module circuit is connected to the second terminal of the twenty-second capacitor C22 through the thirty-fourth resistor R34, which is used to receive the output signal of the orientation sensing circuit and adjust the delay control according to the signal.

[0038] The working principle of this utility model is as follows:

[0039] like Figure 1 As shown, the signal processing circuit of this utility model integrates three major functions: pulse limiting, orientation sensing, and delay control, which work together to achieve comprehensive processing of the input signal.

[0040] The pulse limiting module circuit is mainly composed of a first amplifier U4, a comparator U1A, a first transistor Q1, and a series of resistors and capacitors. When the signal input end receives an input signal, the signal is first applied to the base of the first transistor Q1 through the fifth resistor R5, so that the first transistor Q1 is turned on. The collector current of the turned-on first transistor Q1 passes through a voltage division network formed by the seventh resistor R7, the second capacitor C2, the third capacitor C3, and the first resistor R1, to generate a voltage related to the amplitude of the input signal.

[0041] The voltage serves as an input signal of the comparator U1A and is compared with a reference voltage set in the comparator U1A. When the input signal voltage exceeds the reference voltage, the comparator U1A outputs a high level, which is fed back to the first end of the first capacitor C1 through the third resistor R3, triggers the first amplifier U4 to amplify, and is output to the signal output end OUTR through the ninth resistor R9. In this way, the circuit realizes the pulse limiting function of the input signal, and ensures that the output signal does not exceed the preset maximum amplitude.

[0042] The orientation sensing circuit is mainly composed of a twenty-second resistor R22, an orientation sensor U1, a twentieth capacitor C20, a fourth inductor L4, and a second amplifier U7A. The input signal enters the circuit through the twenty-second resistor R22, and is filtered by the seventeenth capacitor C17 before being applied to the orientation sensor U1. The orientation sensor U1 senses the orientation information of the signal according to specific characteristics (such as phase, frequency, etc.) of the input signal.

[0043] The sensed orientation information passes through a filtering network formed by the twentieth capacitor C20 and the fourth inductor L4, and then enters the input end of the second amplifier U7A. The second amplifier U7A amplifies the received orientation information and transmits the amplified signal to the delay control module circuit and the pulse limiting module circuit through its output end. In this way, the circuit realizes the extraction and transmission of the orientation information of the input signal.

[0044] The delay control module circuit is mainly composed of a fourth transistor Q4, a third amplifier U7B, and a series of resistors and capacitors. When the orientation information output by the orientation sensing circuit meets the preset condition, the information is transmitted to the base of the fourth transistor Q4 through a network composed of resistors and capacitors, so that the fourth transistor Q4 is turned on.

[0045] The collector current of the turned-on fourth transistor Q4 passes through the charging process formed by the thirtieth capacitor C30. When the thirtieth capacitor C30 is charged to a certain voltage, the third amplifier U7B is triggered to amplify. The output signal of the third amplifier U7B passes through a delay network composed of resistors and capacitors, to form an output signal with a specific delay.

[0046] Meanwhile, the delay control module circuit also receives a signal from the pulse limiting module circuit, and determines the delay time according to the signal and the azimuth information.

[0047] The signal processing circuit realizes comprehensive processing of the input signal through the cooperative work of the pulse limiting module circuit, the azimuth sensing circuit and the delay control module circuit, the pulse limiting module circuit ensures that the output signal does not exceed the preset maximum amplitude, the azimuth sensing circuit extracts and transmits the azimuth information of the input signal, and the delay control module circuit controls the delay of the signal according to the azimuth information and the preset condition, so that the circuit can output a signal meeting specific requirements and meet the needs of various application scenarios.

[0048] The above merely describes preferred embodiments of the present application, and is not intended to limit the protection scope of the present application.

Claims

1. A circuit for hearing protection against strong impulse noise, characterized in that The application relates to a signal processing circuit. The signal processing circuit comprises a signal input end for receiving an input signal, a signal output end for outputting a processed signal, a pulse limiting module circuit connected with the signal input end and the signal output end and used for performing pulse limiting processing on the input signal, an azimuth sensing circuit connected with the signal input end and used for sensing azimuth information of the input signal, and a delay control module circuit connected with the signal input end, the pulse limiting module circuit and the azimuth sensing circuit and used for performing delay control on the signal according to the azimuth information and preset conditions. The pulse limiting module circuit comprises a first amplifier, a comparator, a first triode, a first resistor, a third resistor, a fifth resistor, a seventh resistor, a ninth resistor, a thirteenth resistor, a first capacitor, a second capacitor, a third capacitor, a tenth capacitor, a thirteenth capacitor and a first inductor, the emitter of the first triode is connected with the signal input end and the first end of the fifth resistor, the collector of the first triode is connected with the first end of the seventh resistor, the first end of the second capacitor, the first end of the third capacitor and the first end of the first resistor, the second end of the first resistor is connected with the control end of the comparator, the output end of the comparator is connected with the first end of the first capacitor, the first end of the ninth resistor, the fourth end of the first amplifier and the signal output end in series connection with the third resistor, the fifth end of the first amplifier is connected with the signal input end and the first end of the thirteenth capacitor, the third end of the first amplifier is connected with the first end of the thirteenth resistor, the second end of the first capacitor, the second end of the ninth resistor and the input end of the comparator, the second end of the thirteenth resistor is connected with the first end of the tenth capacitor in series connection with the first inductor, and the second end of the seventh resistor, the second end of the second capacitor, the second end of the third capacitor and the second end of the thirteenth capacitor are grounded. The second end of the first resistor in the pulse limiting module circuit is connected to the control end of the comparator, the output end of the comparator is connected to the first end of the first capacitor through the third resistor and connected to the fourth end of the first amplifier through the ninth resistor, and a feedback path of pulse limiting is formed. ​ ​ 2. A circuit for hearing protection against strong impulse noise according to claim 1, characterized in that ​ 3. A circuit for hearing protection against strong impulse noise according to claim 2, characterized in that ​ 4. A circuit for hearing protection against strong impulse noise according to claim 3, characterized in that The orientation sensing circuit comprises a twenty-second resistor, a seventeenth capacitor, an orientation sensor, a twentieth capacitor, a fourth inductor, a twenty-fourth resistor, a twentieth resistor, a sixteenth capacitor, a second amplifier, a twenty-second capacitor, a twenty-fourth capacitor, a twenty-sixth capacitor, a twenty-eighth capacitor, a twenty-seventh resistor, and a twenty-eighth resistor. A first end of the twenty-second resistor is connected to a signal input end. Second ends of the twenty-second resistor are respectively connected to a first end of the seventeenth capacitor, the orientation sensor, a first end of the twentieth capacitor, and a second end of the tenth capacitor. A second end of the twentieth capacitor is connected to a second end of the second amplifier, a first end of the sixteenth capacitor, and a first end of the twentieth resistor in sequence after being connected to the fourth inductor and the twenty-fourth resistor in sequence. A second end of the sixteenth capacitor is respectively connected to a second end of the twentieth resistor, a first end of the second amplifier, and a first end of the twenty-second capacitor. A third end of the second amplifier is respectively connected to a first end of the first amplifier, a first end of the twenty-eighth resistor, a first end of the twenty-seventh resistor, and a first end of the twenty-eighth capacitor. A second end of the twenty-seventh resistor is respectively connected to a first end of the twenty-sixth capacitor, a first end of the twenty-fourth capacitor, an eighth end of the second amplifier, and the signal input end. Second ends of the seventeenth capacitor, the twenty-eighth resistor, the twenty-eighth capacitor, the twenty-fourth capacitor, and the twenty-sixth capacitor are grounded.

5. A circuit for hearing protection against strong impulse noise according to claim 4, characterized in that The third end of the second amplifier in the orientation sensing circuit is connected to the first end of the first amplifier, for transmitting orientation information to the pulse limiting module circuit.

6. A circuit for hearing protection against strong impulse noise according to claim 5, characterized in that The delay control module circuit comprises a twenty-ninth resistor, a fourth triode, a thirty-seventh resistor, a thirtieth capacitor, a second diode, a thirty-eighth resistor, a third amplifier, a forty-first resistor, a thirty-fourth resistor, and a thirty-second resistor. A first end of the twenty-ninth resistor is respectively connected to a second end of the fifth resistor and a base of the first triode. A second end of the twenty-ninth resistor is connected to a collector of the fourth triode. The base of the fourth triode is respectively connected to a first end of the thirtieth capacitor, a negative electrode of the second diode, and a first end of the thirty-eighth resistor after being connected to the thirty-seventh resistor in sequence. A second end of the thirty-eighth resistor is respectively connected to a positive electrode of the second diode and a seventh end of the third amplifier. A fifth end of the third amplifier is connected to a second end of the twenty-second capacitor after being connected to the thirty-fourth resistor in sequence. A sixth end of the third amplifier is respectively connected to a first end of the forty-first resistor and a first end of the thirty-second resistor. A second end of the thirty-second resistor is connected to a signal input end. The collector of the fourth triode, a second end of the thirtieth capacitor, and a second end of the forty-first resistor are grounded.

7. A circuit for hearing protection against strong impulse noise according to claim 6, characterized in that The base of the fourth triode in the delay control module circuit is connected to the first end of the thirtieth capacitor through the thirty-seventh resistor, and is connected to the seventh end of the third amplifier through the second diode, forming a trigger path of delay control.

8. A circuit for hearing protection against strong impulse noise according to claim 7, characterized in that The fifth end of the third amplifier in the delay control module circuit is connected to the second end of the twenty-second capacitor through the thirty-fourth resistor, used for receiving the output signal of the azimuth sensing circuit, and adjusting the delay control according to the signal.

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