100M Ethernet consistency test fixture

Abstract

The utility model relates to a 100-megabit Ethernet consistency test fixture. The fixture comprises a circuit substrate; the circuit substrate is provided with an Ethernet chip, a communication interface and a PIN pin. The output end of the Ethernet chip is connected with the first end of the communication interface, the input end of the PIN pin is connected with the second end of the communication interface, and the third end of the communication interface is connected with the input and output end of the to-be-tested piece. The clamp does not need to be connected with an additional microprocessor and an expensive network card chip (such as an X710 network card chip), does not need to arrange a register on the to-be-tested piece, can achieve the induction test of the to-be-tested piece, and has the advantages of being simple in circuit connection, simple in circuit composition, convenient to operate and low in cost.

Description

TECHNICAL FIELD

[0001] The utility model belongs to network testing device technical field, concretely relates to a gigabit ethernet consistency test fixture. BACKGROUND

[0002] Gigabit Ethernet, also known as fast Ethernet, uses two pairs of unshielded twisted pair to transmit signals, and the network transmission rate is 100Mb / s, which has full duplex mode and is widely used in industry, computers and consumer electronics. In gigabit Ethernet, the communication system complies with IEEE802.3 standard and uses carrier sense multiple access / collision detection (CSMA / CD) protocol. In order to ensure the normal operation of the communication system and the smooth development of the communication service, it is necessary to use consistency test to determine whether the external behavior of the protocol given implementation conforms to the protocol specification. Specifically, the work content of the consistency test is to determine whether the measured implementation is consistent with the standard. Usually, a set of test case sequences are used to test the measured implementation in a certain network environment, and the difference between the actual output and the expected output of the measured piece is compared to determine whether the measured piece implementation is consistent with the protocol description.

[0003] However, the existing consistency test fixture has the problems of complex circuit connection design, numerous circuit elements and high cost. UTILITY MODEL CONTENT

[0004] In order to solve the above problems in the prior art, the utility model provides a gigabit Ethernet consistency test fixture. The technical problem to be solved by the utility model is solved by the following technical scheme:

[0005] The utility model provides a gigabit Ethernet consistency test fixture, the fixture includes: circuit substrate, be equipped with Ethernet chip, communication interface and PIN pin on the circuit substrate, the output end of the Ethernet chip is connected with the first end of the communication interface, the input end of the PIN pin is connected with the second end of the communication interface, the third end of the communication interface is connected with the input and output end of the measured piece, the output end of the PIN pin is connected with the differential probe of oscilloscope.

[0006] In some embodiments, the fixture further includes: network transformer, the network transformer is arranged between the Ethernet chip and the communication interface.

[0007] In some embodiments, the Ethernet chip is W5500 chip.

[0008] In some embodiments, the PIN pin is 2.54mm 2PIN pin.

[0009] In some embodiments, the communication interface is RJ45 connector.

[0010] In some embodiments, the network transformer is a H1102 network transformer.

[0011] In some embodiments, a first output end of the Ethernet chip is connected to pin 8 of the network transformer, and a second output end of the Ethernet chip is connected to pin 6 of the network transformer.

[0012] In some embodiments, pin 3 of the communication interface is connected to pin 11 of the network transformer, and pin 6 of the communication interface is connected to pin 9 of the network transformer.

[0013] In some embodiments, pin 1 of the communication interface is connected to the first input end of the PIN pin, and pin 2 of the communication interface is connected to the second input end of the PIN pin.

[0014] In some embodiments, the input end of the Ethernet chip is connected to the output end of the quartz crystal oscillator.

[0015] Compared with the prior art, the utility model has the beneficial effects of:

[0016] In view of the problems of complex circuit connection design, numerous circuit elements and high cost of the existing consistency test fixture, the utility model provides a consistency test fixture for 100 megabit Ethernet, which is used for testing the consistency of 100 megabit Ethernet, and specifically, the fixture is internally provided with an Ethernet chip, a communication interface and a PIN pin; the Ethernet chip sends electric signals to the measured piece through the communication interface, and then the communication interface receives the electric signals fed back by the measured piece and displays them using an oscilloscope, without the need of connecting an additional microprocessor and expensive network card chip (such as X710 network card chip) and setting a register on the measured piece, so that the inductive test of the measured piece can be realized, and the fixture has the advantages of simple circuit connection, simple circuit composition, convenient operation and low cost. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is the structural block diagram of the consistency test fixture for 100 megabit Ethernet provided by the utility model;

[0018] Figure 2 is the circuit schematic diagram of the Ethernet chip provided by the utility model;

[0019] Figure 3 is the circuit schematic diagram for generating different working modes provided by the utility model;

[0020] Figure 4 is the circuit connection schematic diagram of the consistency test fixture for 100 megabit Ethernet provided by the utility model.

[0021] REFERENCE SIGNS:

[0022] 100, circuit substrate; 110, Ethernet chip; 120, communication interface; 130, PIN pin; 200, to-be-tested device; 300, oscilloscope. DETAILED DESCRIPTION

[0023] The utility model will be described in further detail below in combination with specific embodiments, but the embodiments of the utility model are not limited thereto.

[0024] The utility model provides a gigabit Ethernet consistency test fixture will be described in detail in combination with drawings.

[0025] Please see Figure 1 , Figure 1 The utility model provides a gigabit Ethernet consistency test fixture's structure block diagram. The fixture includes: circuit substrate 100;Circuit substrate 100 is equipped with Ethernet chip 110, communication interface 120 and PIN pin 130;Ethernet chip 110's output end is connected with communication interface 120's first end, and PIN pin 130's input end is connected with communication interface 120's second end, and communication interface 120's third end is connected with to-be-tested device 200's input and output end, and PIN pin 130's output end is connected with oscilloscope 300's differential probe.

[0026] In a possible implementation, the number of Ethernet chip 110, communication interface 120 and PIN pin 130 is 1.

[0027] Here, PIN pin 130 is 2.54 millimeter 2PIN pin. The output end of the PIN pin 130 is connected with the differential probe of the oscilloscope 300, which is used to transmit the electrical signal fed back by the to-be-tested device 200, and reflects the waveform change of the electrical signal through the oscilloscope 300, so as to facilitate the technician to judge the difference between the actual output and the expected output of the to-be-tested device 200.

[0028] And, communication interface 120 is the socket of RJ45 connector, and the specific model is RJ45_SMD;And, the input and output end on the corresponding to-be-tested device 200 is also the socket of RJ45 connector. RJ45 is a kind of information socket (i.e. communication lead-out end) connector in wiring system, and the RJ45 connector is composed of plug (joint, crystal head) and socket (module). In actual use, the communication interface 120 and the connection of the to-be-tested device 200 can be established by the network cable with crystal head at both ends. The communication interface 120 can send the preset induction signal generated by the Ethernet chip 110 to the to-be-tested device 200, and can also receive the electrical signal fed back by the to-be-tested device 200.

[0029] Here, the Ethernet chip 110 is a W5500 chip, which has the advantage of low cost. Moreover, the chip is an embedded Ethernet controller integrating a full hardware TCP / IP protocol stack, and is also an industrial-grade Ethernet control chip. The W5500 chip supports a high-speed standard 4-wire SPI interface for communication with a host, and the SPI rate can theoretically reach 80MHz. The W5500 chip also integrates an Ethernet data link layer (MAC) and a 10BaseT / 100BaseTX Ethernet physical layer (PHY), supports automatic negotiation (10 / 100-Based full duplex / half duplex), power-down mode and network wake-up function. Unlike traditional software protocol stacks, the W5500 has 8 independent hardware sockets embedded therein, which can perform 8-way independent communication. The communication efficiency of the 8-way sockets does not affect each other, and the size of each socket can be flexibly defined through the 32Kbyte receive / transmit buffer on the W5500 chip.

[0030] Please refer to Figure 2 , Figure 2 is a circuit schematic diagram of the Ethernet chip provided by the utility model. The pin 1 and the pin 2 of the Ethernet chip 110 are used to establish connection with the communication interface 120, the pin 3 and the pin 9 are grounded, the pin 4, the pin 8 and the pin 11 are connected with analog circuit power supply 3V3_AVDD, the pin 5 is connected with one end of the resistor R32, the pin 6 is connected with one end of the resistor R30, the other end of the resistor R32 and the other end of the resistor R30 are connected with one end of the capacitor C6, the other end of the capacitor C6 is grounded;The pin 10 is connected with one end of the resistor R35, and the other end of the resistor R35 is grounded;The pin 7 and the pin 12 are vacant.

[0031] Here, the pin 13 and the pin 18 of the Ethernet chip 110 are vacant, the pin 14, the pin 16, the pin 19 and the pin 23 are grounded, the pin 15, the pin 17 and the pin 21 are connected with analog circuit power supply 3V3_AVDD, the pin 20 is connected with one end of the capacitor C13, and the other end of the capacitor C13 is grounded;The pin 22 is connected with one end of the capacitor C14, and the other end of the capacitor C14 is grounded;The pin 24 is connected with the first LED indicator, and the name of the LED indicator signal is not100M.

[0032] Here, the input end of the Ethernet chip 110 is connected with the output end of the quartz crystal oscillator. Here, the quartz crystal oscillator, also known as the quartz crystal oscillator, is used to cooperate with other elements to generate a standard time pulse signal. Specifically, the pin 30 of the Ethernet chip 110 is connected to one end of the quartz crystal oscillator and one end of the capacitor C9, the other end of the capacitor C9 is grounded; the pin 31 is connected to the other end of the quartz crystal oscillator and one end of the capacitor C7, the other end of the capacitor C7 is grounded; the pin 36 is connected to one end of the resistor R31, and the pin 32 is connected to one end of the resistor R29, and the other end of the resistor R29 and the other end of the resistor R31 are connected to the power supply 3V3. In addition, the pin 25 of the Ethernet chip 110 is connected to the second LED indicator, and the signal name of the second LED indicator is notLINK; the pins 26, 27, 33, 34 and 35 are empty; the pin 28 and one end of the capacitor C3 are both connected to the power supply 3V3, and the pin 29 and the other end of the capacitor C3 are both grounded.

[0033] Here, the pin 37 of the Ethernet chip 110 is connected to one end of the capacitor C5 and one end of the resistor R28, the other end of the capacitor C5 is grounded, and the other end of the resistor R28 is connected to the power supply 3V3; the pins 38, 39, 40, 41, 42, 46 and 47 are empty; the pin 48 is grounded; the pin 43 is connected to the circuit for generating working mode 2, the pin 44 is connected to the circuit for generating working mode 1, and the pin 45 is connected to the circuit for generating working mode 0.

[0034] Please refer to Figure 3 , Figure 3 is the circuit schematic diagram for generating different working modes provided by the utility model. The circuit for generating working mode 0 includes: 3PIN pin J26, and resistor R24; the pin 45 of the Ethernet chip 110 is connected to the second end of the 3PIN pin J26, the third end of the 3PIN pin J26 is connected to one end of the resistor R24, the other end of the resistor R24 is connected to the power supply 3V3, and the first end is grounded. The circuit for generating working mode 0 works at high level.

[0035] Here, the circuit for generating working mode 1 includes: 3PIN pin J27, and resistor R25; the pin 44 of the Ethernet chip 110 is connected to the second end of the 3PIN pin J27, the third end of the 3PIN pin J27 is connected to one end of the resistor R25, the other end of the resistor R25 is connected to the power supply 3V3, and the first end is grounded. The circuit for generating working mode 1 works at high level.

[0036] Here, the circuit for generating the working mode 2 comprises: 3PIN pin J28, resistance R26; the pin 43 of the Ethernet chip 110 is connected to the second end of the 3PIN pin J28, the third end of the 3PIN pin J28 is connected to one end of the resistance R26, the other end of the resistance R26 is connected to the power supply 3V3, and the first end is grounded. The circuit for generating the working mode 2 works at low level.

[0037] It should be noted that the 3PIN pin J26, the 3PIN pin J27 and the 3PIN pin J28 are all provided with a jumper cap (not shown in the figure). The jumper cap is a device that can be inserted into the pin to make the two feet of the pin connected. Specifically, in the circuit for generating the working mode 0, the jumper cap is inserted into the 2, 3 feet (i.e. the second end and the third end) of the 3PIN pin J26; in the circuit for generating the working mode 1, the jumper cap is inserted into the 2, 3 feet (i.e. the second end and the third end) of the 3PIN pin J27; in the circuit for generating the working mode 2, the jumper cap is inserted into the 1, 2 feet (i.e. the first end and the second end) of the 3PIN pin J28.

[0038] Now the connection relationship between the components of the test fixture will be described in detail. Please refer to Figure 4 , Figure 4 is a circuit connection schematic diagram of the 100 Mbps Ethernet consistency test fixture provided by the utility model.

[0039] Here, the communication interface 120 is represented by the symbol "J25", and the PIN pin 130 is represented by the symbol "J30". In an example, the PIN pin 130 is provided with a jumper cap (not shown in the figure). The fixture further comprises a network transformer (represented by the symbol "T1"). In the 100 Mbps Ethernet, the network transformer can enhance the transmission distance of the signal, improve the stability and reliability of the transmission, and at the same time provide protection for the Ethernet chip 110 to prevent external interference and damage. The network transformer T1 is arranged between the Ethernet chip 110 and the communication interface 120. Moreover, the network transformer is an H1102 network transformer.

[0040] Here, the first output end of the Ethernet chip 110 is connected to the pin 8 (i.e. the pin RD-) of the network transformer, and the second output end of the Ethernet chip 110 is connected to the pin 6 (i.e. the pin RD+) of the network transformer, so as to send the electrical signal to the network transformer. Specifically, the first output end of the Ethernet chip 110 is the pin 1 (i.e. the pin TXN), and the second output end is the pin 2 (i.e. the pin TXP); the pin 2 is connected to the pin 6 of the network transformer T1, and the pin 1 is connected to the pin 8 of the network transformer T1.

[0041] Here, the pin 7 of the network transformer T1 is connected to one end of the capacitor C1, one end of the resistor R19, one end of the resistor R20 and one end of the resistor R17, the other end of the capacitor C1 is grounded, the other end of the resistor R19 is connected to the pin 8 of the network transformer, the other end of the resistor R20 is connected to the pin 6 of the network transformer; the other end of the resistor R17 is connected to the analog circuit power supply 3V3_AVDD.

[0042] Here, the pin 3 (i.e. the pin BI_DB+) of the communication interface is connected to the pin 11 (i.e. the pin RX+) of the network transformer, the pin 6 (i.e. the pin BI_DB-) of the communication interface is connected to the pin 9 (i.e. the pin RX-) of the network transformer, for reading the electrical signal output by the network transformer. The pins 1, 2, 3, 4, 5, 12, 13, 14, 15 and 16 of the network transformer T1 are vacant; the pin 10 is connected to one end of the resistor R23, the other end of the resistor R23 is connected to one end of the capacitor C4, and the other end of the capacitor C4 is grounded.

[0043] Here, the pins 4 and 5 of the communication interface 120 are both connected to one end of the resistor R22, and the other end of the resistor R22 is connected to one end of the capacitor C4; the pins 7 and 8 of the communication interface 120 are both connected to one end of the resistor R21, and the other end of the resistor R21 is connected to one end of the capacitor C4; the pin 1 of the communication interface 120 is connected to one end of the resistor R36 and the first end of the PIN pin 130, and the pin 2 of the communication interface 120 is connected to the other end of the resistor R36 and the second end of the PIN pin 130; the pins 9 and 10 of the communication interface 120 are grounded.

[0044] In an embodiment, the process that the test fixture establishes a connection with the to-be-tested member 200 specifically includes: after the test fixture is powered on, an alternating current impedance of 49.9 ohms is generated on the pins 5 and 6 of the Ethernet chip 110, it is determined that the to-be-tested member 200 exists, then, an induction signal, or a handshake signal, is sent to the to-be-tested member 200 through the pins 1 and 2 of the Ethernet chip 110, specifically, the handshake signal is input into the pins 3 and 6 of the communication interface 120 through the pins 6 and 8 of the network transformer T1, and then reaches the to-be-tested member 200 through the network cable; according to the 100 Mbps Ethernet communication protocol, after receiving the handshake signal, the to-be-tested member 200 triggers an idle signal, the idle signal reaches the PIN pin 130 through the communication port of the to-be-tested member 200, the pins 1 and 2 of the communication interface 120, and finally enters the oscilloscope 300, the connection is completed, and the consistency test can be started.

[0045] It should be noted that the software module is not used in the process of establishing the connection between the test fixture and the to-be-tested member 200. The "handshake" signal and the "idle" signal can be understood as an electrical signal or a time pulse signal. The test fixture sends a time pulse signal to the to-be-tested member 200, and the time pulse signal returns to the test fixture from the to-be-tested member 200.

[0046] In view of the problems of complex circuit connection design, numerous circuit elements and high cost of existing consistency test fixtures, the utility model provides a kind of consistency test fixture of hundred megabit ethernet, and the fixture is used to test the consistency of hundred megabit ethernet, specifically, the fixture is equipped with an ethernet chip, a communication interface and a PIN pin;Through communication interface, ethernet chip sends electrical signal to to-be-tested member, then communication interface receives the electrical signal feedback by to-be-tested member, and uses oscilloscope 300 to display, without connecting additional microprocessor and expensive network card chip (for example X710 network card chip), also without setting register to to-be-tested member, can realize the inductive test of to-be-tested member, with the advantages of simple circuit connection, simple circuit composition, convenient operation and low cost.

[0047] It should be noted that, in this document, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus.

[0048] The above description shows and describes several preferred embodiments of the utility model, but as before, it should be understood that the utility model is not limited to the form disclosed herein, and should not be considered as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the utility model concept disclosed herein by the above teaching or related art or knowledge. The modification and change made by the person skilled in the art without departing from the spirit and scope of the utility model should be within the protection scope of the claims attached to the utility model.

Claims

1. A 100 Mbps Ethernet conformance test fixture, characterized in that, The fixture includes: a circuit board; the circuit board is provided with an Ethernet chip, a communication interface and PIN pins; The output terminal of the Ethernet chip is connected to the first terminal of the communication interface, the input terminal of the PIN pin is connected to the second terminal of the communication interface, the third terminal of the communication interface is connected to the input / output terminal of the device under test, and the output terminal of the PIN pin is connected to the differential probe of an external oscilloscope.

2. The 100Mbps Ethernet conformance test fixture according to claim 1, characterized in that, The fixture further includes a network transformer; the network transformer is located between the Ethernet chip and the communication interface.

3. The 100Mbps Ethernet conformance test fixture according to claim 1, characterized in that, The Ethernet chip is a W5500 chip.

4. The 100Mbps Ethernet conformance test fixture according to claim 1, characterized in that, The PIN is a 2-PIN pin with a diameter of 2.54 mm.

5. The 100Mbps Ethernet conformance test fixture according to claim 1, characterized in that, The communication interface is a socket for an RJ45 connector.

6. The 100Mbps Ethernet conformance test fixture according to claim 2, characterized in that, The network transformer is an H1102 network transformer.

7. The 100Mbps Ethernet conformance test fixture according to claim 2, characterized in that, The first output terminal of the Ethernet chip is connected to pin 8 of the network transformer, and the second output terminal of the Ethernet chip is connected to pin 6 of the network transformer.

8. The 100Mbps Ethernet conformance test fixture according to claim 2, characterized in that, Pin 3 of the communication interface is connected to pin 11 of the network transformer, and pin 6 of the communication interface is connected to pin 9 of the network transformer.

9. The 100Mbps Ethernet conformance test fixture according to claim 2, characterized in that, Pin 1 of the communication interface is connected to the first input terminal of the PIN pin, and pin 2 of the communication interface is connected to the second input terminal of the PIN pin.

10. The 100Mbps Ethernet conformance test fixture according to claim 1, characterized in that, The input terminal of the Ethernet chip is connected to the output terminal of the quartz crystal oscillator.

Images