Double-POLO stacked gate battery structure and solar battery comprising same
By introducing a bifacial POLO stacked grid cell structure into the TOPCon cell, the problems of front-side metal contact recombination and light absorption loss are solved, achieving efficient photoelectric conversion and current harvesting, and improving the voltage and current density of the cell.
Patent Information
- Application Number
- CN202422845137.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2034-11-21
AI Technical Summary
Existing TOPCon cells suffer from recombination issues at the front metal contact and light absorption losses due to the alumina and silicon nitride passivation layers, which affect current collection efficiency.
It adopts a double-sided POLO structure combined with a stacked grid cell structure. The front localized POLO structure and metal conductive wire design reflect unabsorbed light, while the back POLO structure reduces metal contact recombination and improves carrier tunneling efficiency.
This improved the photoelectric conversion efficiency and effectiveness of the solar cells, reduced metal-to-metal recombination, and increased the voltage and current density of the solar cells.
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Figure CN223758660U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to photovoltaic technology field, concretely is a double POLO stack grid cell structure. BACKGROUND
[0002] Passivation contact is the only way to improve the efficiency of solar silicon cells. Passivation contact can realize selective carrier passing by bending the energy band through material and structure, and realize good metallization contact without affecting the integrity of the surface passivation. TOPCon (Tunnel Oxide Passivated Contact) cell first prepares an ultra-thin silicon oxide layer on the back of the cell by chemical method, and then deposits a doped polysilicon thin layer, which together forms a passivation contact structure. This structure is called poly-Si on oxide (POLO). Because the silicon oxide layer is very thin (<2nm) and the polysilicon thin layer is doped, the majority carriers can pass through the oxide thin layer, while the minority carriers are blocked. Then sinter the metal on the polysilicon thin layer, the metal does not form direct contact with the silicon, ensuring the integrity of the surface passivation of the cell, effectively reducing the surface recombination and metal contact recombination. However, the polysilicon thin layer in this passivation contact structure has a large light absorption, which seriously affects the current. Currently, it is only applied to the back of the cell. For the front of the TOPCon cell, aluminum oxide and silicon nitride are still mainly used as passivation layers and anti-reflection layers. The electrode metal needs to be burned through to the diffusion layer to form an ohmic contact, but it needs to reconcile the contradiction between low sheet resistance and low sheet resistance leading to increased contact recombination. Selective emitter can better solve this contradiction, or use LECO (Laser-enhanced contact optimization) laser-assisted sintering technology to directly reduce the metal contact resistance and contact area, reduce the damage to the silicon wafer and the surface, and reduce the surface and contact recombination, and to a certain extent, improve the surface sheet resistance of the cell.
[0003] Stack grid technology is a cell metal electrode structure technology. The stack grid structure includes a seed layer on the surface of the cell for current collection and export, and a conductive wire for current transmission covering and connected above the conductive seed layer. UTILITY MODEL CONTENT
[0004] The utility model aims at providing a double POLO stack grid cell structure to combine the advantages of stack grid cell structure and POLO structure and improve the efficiency of the cell.
[0005] To achieve the above purpose, the utility model provides the following technical scheme:
[0006] A double-POLO structure of a stacked gate cell structure comprises a silicon substrate, a first POLO structure is arranged on the front surface of the silicon substrate, and a second POLO structure is arranged on the back surface of the silicon substrate, the first POLO structure is a localized POLO structure, and the first POLO structure comprises a localized first dielectric layer and a first doped layer on the first dielectric layer, a conductive seed layer is arranged on the first doped layer, and a metal conductive wire is connected to the conductive seed layer through a conductive connecting material layer, wherein the width of the first POLO structure is greater than or equal to the width of the conductive seed layer but less than the projected width of the metal conductive wire.
[0007] Preferably, the second POLO structure is arranged on the back surface of the silicon substrate, the second POLO structure comprises a second dielectric layer on the silicon substrate and a second doped layer on the second dielectric layer, and a metal electrode structure or a stacked gate structure is arranged on the second doped layer. Preferably, a first functional layer is arranged between the first POLO structures on the front surface; a second functional layer is further arranged on the second doped layer; the first functional layer and the second functional layer can be a passivation layer or an anti-reflection layer or a passivation and anti-reflection layer, and the material of the first functional layer and the second functional layer can be aluminum oxide, silicon nitride, silicon oxynitride, silicon oxide or the like.
[0008] Preferably, the cross section of the metal conductive wire is a triangle or a triangle-like shape, wherein the parameters of the triangle are that the chamfer R is less than or equal to 20 microns, the bottom angle is greater than or equal to 45 degrees, and the side length is 0.05-0.2 mm.
[0009] Further, the surface reflectivity of the metal conductive wire is greater than or equal to 70%.
[0010] Preferably, the conductive connecting material layer for connecting the conductive seed layer and the metal conductive wire is a solder layer or a conductive polymer material layer. More preferably, the conductive polymer material layer is a conductive adhesive layer or a conductive adhesive tape layer.
[0011] Preferably, the width of the conductive seed layer is 2-150 microns, the height is 1-10 microns, the projected width of the metal conductive wire is 5-200 microns, the width of the first POLO structure is 2-200 microns, and the height is not greater than 5 microns.
[0012] The utility model further provides a solar cell, the solar cell contains the double-POLO structure of stacked gate cell structure as mentioned above.
[0013] Compared with the prior art, the utility model has the beneficial effects that:
[0014] 1、 the utility model discloses a double-sided POLO structure combines stacked gate structure, and the metal conductive wire on the front surface can completely cover the localized POLO structure below, and the light projected on the metal conductive wire is reflected to the surface of the cell sheet and is absorbed and utilized by the cell sheet, and is not directly projected on the second doped layer in the POLO structure and is wasted.
[0015] 2. The double-sided POLO structure solves the problem of front metal contact combination, and the problem that good metal contact must match low square resistance in a conventional battery piece. The double-sided POLO battery has less combination, high square resistance, high battery piece voltage and high efficiency;
[0016] 3. The metal conductive wire has high reflectivity, especially when the cross section is triangular or similar triangular. Most of the light projected onto the metal conductive wire can be reflected to the surface of the battery piece and absorbed and utilized. Compared with the utilization rate of the light directly projected onto the metal grid line in a conventional battery, the battery piece has higher current;
[0017] 4. The stacked gate double POLO battery has less combination, high voltage, high fill factor, and higher current, so the battery piece has high efficiency. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 is a schematic view of the double POLO stacked gate battery structure of the utility model.
[0019] In the figure: 1, silicon substrate; 2, first POLO structure; 3, second POLO structure; 4, first functional layer; 41, aluminum oxide layer; 42, silicon nitride layer; 5, second functional layer; 6, metal electrode structure; 7, conductive seed layer; 8, conductive connecting material layer; 9, metal conductive wire; 21, first dielectric layer; 22, first doped layer; 31, second dielectric layer; 32, second doped layer. DETAILED DESCRIPTION
[0020] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor belong to the scope of protection of the utility model.
[0021] In the description of the utility model, it should be explained that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the utility model and simplifying the description, and do not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, so it cannot be understood as a limitation on the utility model. In addition, the terms "first" and "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.
[0022] In the description of the utility model, it is necessary to explain that, unless there is definite stipulation and limitation, the terms "installation", "set with", "connection" and the like should be understood broadly, for example, "connection" can be fixed connection, also can be detachable connection, or integrally connected, can be mechanical connection, also can be electrical connection, can be direct connection, also can be indirect connection through intermediate medium, can be the intercommunication of two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.
[0023] In the description of the utility model, as the ordinary skilled in the photovoltaic technical field understands, the terms "front", "back" are relative to the direction of receiving sunlight, that is, the side receiving sunlight is "front", and the back surface is "back".
[0024] To further solve the problem of cell front metallization contact composite and surface passivation being destroyed, in combination with POLO and the structure of the stack, the utility model proposes a kind of double-sided POLO stack cell structure.The back of the cell is POLO passivation contact structure, and the functional layer between the localized POLO structure on the front can be passivation layer or antireflection layer or passivation and antireflection layer, the material of functional layer can be aluminum oxide, silicon nitride, silicon oxynitride, silicon oxide and the like, the localized POLO structure below the front metal region is designed, metal and doped layer contact, the width of localized POLO structure is greater than or equal to the width of conductive seed layer to prevent conductive seed layer from exceeding POLO layer range, and metal conductive wire is covered on conductive seed layer, and it is ensured that metal conductive wire will be covered with conductive seed layer and POLO structure.
[0025] Referring to Figure 1The front surface of the silicon substrate 1 is provided with a POLO stack structure, wherein the structure comprises a first POLO structure 2, and the first POLO structure 2 is a localized POLO structure and has a first dielectric layer 21 and a first doped layer 22. The material of the first dielectric layer can include one or more dielectric materials, such as at least one of aluminum oxide, molybdenum oxide, tin oxide, silicon oxide, nickel oxide, silicon nitride, silicon oxynitride, magnesium fluoride, polysilicon, silicon carbide, titanium oxide, hafnium oxide or diptassium tantalum pentoxide. The first doped layer 22 can be a conventional doped polysilicon layer, and the doping element of the doped layer is a P-type element or an N-type element. The dielectric layer and the doped layer can form a better passivation contact structure, so that the carriers in the dielectric layer tunnel into the doped layer, while blocking the recombination of the minority carriers, thereby reducing the metal contact recombination, improving the open-circuit voltage and short-circuit current of the solar cell, and improving the photoelectric conversion rate of the solar cell. If the thickness is too low, the passivation effect is not good; if the thickness is too high, the tunneling effect of the carriers is affected. Exemplarily, the thickness of the dielectric layer is 1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2 nm, etc.; and the thickness of the doped layer is 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, etc. The conductive seed layer 7 is in contact with the first doped layer 22 of the localized POLO structure, and the conductive seed layer forms an ohmic contact with the first doped layer. The metal conductive wire 9 is covered on the conductive seed layer 7, and the two are electrically connected through the conductive connection material layer 8.
[0026] In order to reduce the problem of light absorption of the front POLO structure, a localized POLO structure is designed on the front surface, that is, the POLO structure is designed only in the region of the front conductive seed layer, rather than a global POLO structure. The localized POLO structure is only arranged corresponding to the front conductive seed layer, so as not to affect the light efficiency of the front surface. In the present application, the width of the conductive seed layer is 2-150 μm, and the height is 1-10 μm. The projection width of the metal conductive wire is 5-200 μm. The width of the first POLO structure 2 is greater than or equal to the width of the seed layer and less than the projection width of the metal conductive wire. The width of the first POLO structure 2 ranges from 2 to 200 μm, and the height is not greater than 5 μm. As understood by those skilled in the art, the width of the localized POLO structure refers to the distance between two edges close to each other on the corresponding pattern after the patterned structure is formed on the surface of the silicon substrate. For example, in the scheme of the present application, the first POLO structure 2 is a plurality of linear structures distributed in parallel on the surface of the silicon substrate 1, and the width of the first POLO structure 2 is the distance between the two edges in the extension direction of the linear structures. The width of the first POLO structure 2 is greater than or equal to the width of the conductive seed layer, so as to facilitate the laying of the conductive seed layer and avoid the contact between the conductive seed layer and the silicon substrate to form metal composite.
[0027] The width of the metal conductive wire is greater than the width of the front localized POLO structure, so as to shield the front localized POLO structure and prevent the incident light from being absorbed by the first doped layer of the localized POLO structure. The metal conductive wire can reflect the light incident thereon to the surface of the cell sheet, thereby improving the light efficiency. Therefore, from the perspective of reflection, the cross section of the metal conductive wire 9 is preferably triangular or triangular-like, as shown in Figure 1 However, the utility model is not limited thereto, and other metal conductive wires having reflection performance should also be included in the protection scope of the utility model, and the specific scope should be subject to the claims. As a preferred embodiment of the metal conductive wire, the chamfer R of the metal conductive wire is ≤20 μm, the surface reflectivity is ≥70%, the base angle is ≥45°, and the side length is 0.05-0.2 mm; the chamfer of the metal conductive wire can be of any shape, the chamfer is a circular arc, and R represents the radius of the circular arc; the chamfer is a straight edge, and R represents the width of the straight edge; the chamfer is irregular, and R represents the width of the non-linear break between the two straight edges of the triangular-like shape; the surface reflectivity is tested by using a microscopic reflectivity tester (manufacturer: Hangzhou Pulei Optoelectronic Technology Co., Ltd., model: CX40M) in a conventional room temperature environment; accordingly, the width of the front POLO structure is not less than the width of the conductive seed layer, so as to prevent the seed layer from exceeding the range of the POLO layer and causing the metal to directly contact the surface of the silicon sheet to form a metal composite, and the width of the front POLO structure is not greater than the projection width of the metal conductive wire, so that the localized POLO structure is completely shielded by the metal conductive wire, the light irradiated to the region of the metal conductive wire can be reflected to the non-POLO region on the front of the cell sheet, and the light efficiency is improved.
[0028] The metal conductive wire 9 and the conductive seed layer 7 are connected through a conductive connecting material layer 8, which can be a welding material or a conductive polymer material, etc.; the conductive polymer material is a conductive adhesive or a conductive adhesive tape, etc.
[0029] The conductive seed layer 7 can be silver, silver-coated copper, aluminum or any other material capable of forming an electrical contact, and the utility model does not make special requirements.
[0030] A first functional layer is formed on the surface of the silicon substrate in the localized POLO structure region on the front, and the first functional layer can be a passivation layer or an anti-reflection layer or a passivation and anti-reflection layer, and the material of the first functional layer can be aluminum oxide, silicon nitride, silicon oxynitride, silicon oxide, etc. For example, the functional layer includes an aluminum oxide layer 41 formed on the silicon substrate and a silicon nitride layer 42 formed thereon.
[0031] As the back of the double-sided POLO structure battery, the second POLO structure 3 is provided with a second dielectric layer 31 and a second doped layer 32, and a metal electrode structure 6 is arranged on the second doped layer 32, and a second functional layer can also be arranged on the non-metal region as a protective layer of the back; the metal electrode structure is in ohmic contact with the doped layer after sintering and solidification of the electrode paste; the material of the second dielectric layer 31 can include one or more dielectric materials, such as at least one of aluminum oxide, molybdenum oxide, tin oxide, silicon oxide, nickel oxide, silicon nitride, silicon oxynitride, magnesium fluoride, polysilicon, silicon carbide, titanium oxide, hafnium oxide or diantimony pentoxide; the second doped layer 32 can be a conventional doped polysilicon layer, and the doping element of the doped layer is a P-type element or an N-type element; the dielectric layer and the doped layer can form a better passivation contact structure, so that the carriers in the dielectric layer tunnel into the doped layer, while blocking the recombination of the minority carriers, thereby reducing the metal contact recombination, improving the open circuit voltage and short circuit current of the sliced solar cell, and improving the photoelectric conversion rate of the sliced solar cell; if the thickness is too low, the passivation effect is not good; if the thickness is too high, the tunneling effect of the carriers is affected; for example, the thickness of the dielectric layer is 1nm, 1.2nm, 1.4nm, 1.6nm, 1.8nm, 2nm, etc.; the thickness of the doped layer is 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, etc.
[0032] The parts not described in the utility model are known to those skilled in the art.
[0033] Finally, it should be pointed out that: the above specific embodiments are only used to illustrate the technical solutions of the utility model and are not limited; although the utility model has been described in detail with reference to the embodiments, those skilled in the art should understand that the technical solutions of the utility model can be modified and replaced equivalently without departing from the spirit and scope of the technical solutions of the utility model, and they should be covered in the scope of the claims of the utility model.
Claims
1. A dual POLO stack cell structure, characterized by, The structure comprises a silicon substrate, a first POLO structure is arranged on the front surface of the silicon substrate, and a second POLO structure is arranged on the back surface of the silicon substrate, the first POLO structure is a localized POLO structure, and comprises a localized first dielectric layer and a first doped layer on the first dielectric layer, a conductive seed layer is arranged on the first doped layer, and a metal conductive wire is connected to the conductive seed layer through a conductive connecting material layer, wherein the width of the first POLO structure is greater than or equal to the width of the conductive seed layer but less than the projected width of the metal conductive wire.
2. The dual POLO stacked gate cell structure of claim 1, wherein, A first functional layer is arranged between the first POLO structures on the front surface.
3. The dual POLO stacked gate cell structure of claim 1, wherein, The second POLO structure arranged on the back surface of the silicon substrate comprises a second dielectric layer on the silicon substrate and a second doped layer on the second dielectric layer, and a metal electrode structure or a stacked gate structure is arranged on the second doped layer.
4. The dual POLO stacked gate cell structure of claim 1, wherein, The cross section of the metal conductive wire is triangular or quasi-triangular, wherein the parameters of the triangular or quasi-triangular shape are a chamfer R≤20 μm, a bottom angle ≥45°, and a side length of 0.05-0.2 mm.
5. The dual POLO stacked gate cell structure of claim 1, wherein, The surface reflectivity of the metal conductive wire is ≥70%.
6. The dual POLO stacked gate cell structure of claim 1, wherein, The conductive connecting material layer for connecting the conductive seed layer and the metal conductive wire is a solder layer or a conductive polymer material layer.
7. The dual POLO stacked gate cell structure of claim 6, wherein, The conductive polymer material layer is a conductive adhesive layer or a conductive adhesive tape layer.
8. The dual POLO stacked gate cell structure of claim 1, wherein, The width of the conductive seed layer is 2-150 μm, the height is 1-10 μm, the projected width of the metal conductive wire is 5-200 μm, the width of the first POLO structure is 2-200 μm, and the height is not greater than 5 μm.
9. A solar cell, characterized by, The solar cell comprises the double-POLO stacked gate cell structure according to any one of claims 1-8.