Adapter board capable of configuring multi-channel interface

Abstract

The utility model discloses a configurable multi-channel interface adapter board, which relates to the field of aviation equipment and technology, and comprises a channel selection module used for accessing CAN FD signals and completing signal adaptation; the protocol conversion module is used for converting the CAN FD signal into an SPI signal; the FPGA module is used for providing interface extension and establishing communication connection with the MCU module; and the MCU module is used for analyzing the TPU communication content and controlling peripheral actions. According to the interface adapter board, the latest automobile communication protocol CAN FD can be completely compatible by adopting an MCU + FPGA + MCP2517 architecture, a CAN FD channel can be configured according to requirements, and meanwhile, the interface adapter board can realize various avionics system interfaces, is flexible and expandable, and ensures the real-time performance of data protocol conversion and communication functions.

Description

Technical Field

[0001] This utility model relates to the field of aviation equipment and technology, and more specifically, to a configurable multi-channel interface adapter board. Background Technology

[0002] To apply a certain vehicle-mounted TPU to a UAV platform, it is necessary to adapt the TPU's interface to the UAV's avionics system interface at the hardware level to meet the communication functions between the TPU and the avionics system. The TPU's communication interface is CAN FD, while the avionics system's interfaces include RS422, PWM, RS232, and SBUS. This configurable multi-channel interface adapter board enables the transmission of communication data between different interfaces through protocol conversion.

[0003] Current approximate solutions employ a DSP+FPGA+MCP2515 architecture. The DSP handles data processing and communication, while the FPGA acts as a bridge between the DSP and external interfaces, primarily handling communication with the MCP2515. The MCP2515 is used for protocol conversion from the CAN interface to the SPI interface. However, existing technologies using the MCP2515 chip are incompatible with the latest automotive communication protocol, CAN FD.

[0004] No effective solutions have yet been proposed to address the problems in the relevant technologies. Utility Model Content

[0005] In view of the problems in the related technologies, this utility model proposes a configurable multi-channel interface adapter board to overcome the above-mentioned technical problems existing in the existing related technologies.

[0006] Therefore, the specific technical solution adopted by this utility model is as follows:

[0007] A configurable multi-channel interface adapter board, comprising:

[0008] A channel selection module used to access CAN FD signals and complete signal adaptation;

[0009] A protocol conversion module used to convert CAN FD signals to SPI signals;

[0010] An FPGA module used to provide interface expansion and establish communication connections with MCU modules;

[0011] An MCU module used to parse TPU communication content and control peripheral actions;

[0012] The channel selection module, protocol conversion module, FPGA module, and MCU module maintain data connection in sequence.

[0013] Furthermore, the channel selection module includes several DIP switches that are connected in parallel;

[0014] The DIP switch input is connected to the TPU interface, one of the DIP switch outputs a CAN FD signal, and the other DIP switch output is connected to the protocol conversion module.

[0015] Furthermore, the protocol conversion module includes several CAN transceivers and CAN FD controllers; wherein the number of CAN transceivers, CAN FD controllers and DIP switches is the same, and the input terminal of the CAN transceiver is connected to the output terminal of the corresponding DIP switch, the output terminal of the CAN transceiver is connected to the input terminal of the corresponding CAN FD controller, and the output terminal of the CAN FD controller is connected to the input terminal of the FPGA module and inputs an SPI signal.

[0016] Furthermore, one input terminal of the FPGA module is connected to the output terminal of the CAN FD controller, the other input terminal of the FPGA module is connected to the LIN bus, and the output terminal of the FPGA module maintains a communication connection with the MCU module through the SRAM interface.

[0017] Furthermore, the FPGA module's interface expansion includes SBUS bus, RS422 serial communication interface, RS232 serial communication interface, PWM output, and GPIO expansion interface.

[0018] Furthermore, one input terminal of the MCU module is connected to the output terminal of the FPGA module, the other input terminal of the MCU module is connected to the GPIO input interface, and the output terminal of the MCU module is connected to multiple peripherals.

[0019] The beneficial effects of this utility model are as follows: by adopting the MCU+FPGA+MCP2517 architecture, it can be fully compatible with the latest automotive communication protocol CAN FD, and the CAN FD channel can be configured as needed. At the same time, the interface adapter board can realize a variety of avionics system interfaces, which is flexible and expandable, and ensures the real-time performance of data protocol conversion and communication functions. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a system module of a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0022] Figure 2This is a schematic diagram of the circuit module structure of a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0023] Figure 3 This is a schematic diagram of an FPGA module and an MCU module and their interface expansion in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0024] Figure 4 This is a schematic diagram of a DIP switch circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0025] Figure 5 This is a schematic diagram of the CAN transceiver circuit in the protocol conversion module of a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0026] Figure 6 This is a schematic diagram of the CAN FD controller circuit in the protocol conversion module of a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0027] Figure 7 This is one of the schematic diagrams of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0028] Figure 8 This is the second schematic diagram of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0029] Figure 9 This is the third schematic diagram of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0030] Figure 10 This is the fourth schematic diagram of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0031] Figure 11 This is the fifth schematic diagram of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0032] Figure 12 This is the sixth schematic diagram of an FPGA module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0033] Figure 13 This is one of the schematic diagrams of an MCU module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0034] Figure 14 This is the second schematic diagram of the MCU module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model;

[0035] Figure 15 This is the third schematic diagram of the MCU module circuit in a configurable multi-channel interface adapter board according to an embodiment of the present utility model.

[0036] In the picture:

[0037] 1. Channel selection module; 2. Protocol conversion module; 3. FPGA module; 4. MCU module. Detailed Implementation

[0038] According to an embodiment of the present invention, a configurable multi-channel interface adapter board is provided.

[0039] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments, such as... Figures 1-15 As shown, the configurable multi-channel interface adapter board according to an embodiment of the present invention includes:

[0040] Channel selection module 1 for accessing CAN FD signals and completing signal adaptation;

[0041] Protocol conversion module 2 for converting CAN FD signals to SPI signals;

[0042] FPGA module 3 is used to provide interface expansion and establish communication connections with the MCU module;

[0043] MCU module 4 is used to parse TPU communication content and control peripheral actions;

[0044] Channel selection module 1, protocol conversion module 2, FPGA module 3, and MCU module 4 maintain data connection in sequence.

[0045] In one embodiment, the channel selection module 1 includes a plurality of DIP switches that are maintained in parallel connection;

[0046] The DIP switch input is connected to the TPU interface, one of the DIP switch outputs a CAN FD signal, and the other DIP switch output is connected to the protocol conversion module 2.

[0047] like Figure 2 As shown, the DIP switches SW in the channel selection module 1 include: DIP switch SW1, DIP switch SW2, DIP switch SW3, DIP switch SW4, DIP switch SW5, DIP switch SW6, DIP switch SW7, DIP switch SW8 and DIP switch SW9; and the input terminal of DIP switch SW1 is connected to the TPU interface, one output terminal of DIP switch SW1 outputs a CAN FD1 signal, and the other output terminal of DIP switch SW1 is connected to the protocol conversion module 2.

[0048] like Figure 4The diagram shows the pin connections of the DIP switch SW1. The DIP switch SW1 has the same structure as the other eight DIP switches, and its pins are connected to the corresponding TPU interface, CAN FD signal and protocol conversion module 2, respectively.

[0049] In one embodiment, the protocol conversion module 2 includes several CAN transceivers and a CAN FD controller;

[0050] The number of CAN transceivers, CAN FD controllers, and DIP switches is the same. The input terminal of the CAN transceiver is connected to the output terminal of the corresponding DIP switch, the output terminal of the CAN transceiver is connected to the input terminal of the corresponding CAN FD controller, and the output terminal of the CAN FD controller is connected to the input terminal of FPGA module 3 and inputs the SPI signal.

[0051] like Figure 2 As shown, the CAN transceiver includes U1, U3, U5, U7, U9, U11, U13, U15, and U17. The CAN FD controller includes U2, U4, U6, U8, U10, U12, U14, and U16. The circuit structure of the CAN transceiver U1 is as follows: Figure 5 As shown, the remaining CAN transceivers all use the same circuit structure design, which will not be elaborated upon here. The circuit structure diagram of CAN FD controller U2 is as follows. Figure 6 As shown, the remaining CAN FD controllers use the same circuit structure design.

[0052] Specifically, such as Figure 5 As shown, the CAN transceiver circuit consists of a CAN transceiver chip U1, a common-mode filter L1, a bus electrostatic discharge and surge protector D1, and auxiliary resistors and capacitors. Its operating principle is as follows:

[0053] 1. Transmission process (TxD → CAN bus)

[0054] Input signals: The CAN transceiver sends digital signals (logic high or low) through the TxD pin.

[0055] Signal conversion: The CAN transceiver converts the TxD digital signal into a differential signal.

[0056] Logic high (dominant state): CAN_H is high level, CAN_L is low level.

[0057] Logic low (recessive state): Both CAN_H and CAN_L are at medium level.

[0058] Bus drive: Differential signals drive the CAN bus through the CAN_H and CAN_L pins.

[0059] 2. Receiving process (CAN bus → RxD)

[0060] Bus signals: The differential signals (CAN_H and CAN_L) on the CAN bus are received by the CAN transceiver.

[0061] Signal conversion: The CAN transceiver converts differential signals into digital signals.

[0062] Dominant state (CAN_H>CAN_L): Output logic high.

[0063] Latent state (CAN_H≈CAN_L): Output logic low.

[0064] Output signal: The converted digital signal is sent to the CAN controller through the RxD pin.

[0065] like Figure 6 As shown, the CAN FD controller consists of a control chip U2, a passive crystal oscillator X1, and auxiliary resistors and capacitors. Its operating principle is as follows:

[0066] 1. Transmission process (SPI→TxD)

[0067] Input signals: The CAN FD controller receives serial digital signals (logic high or low) via the SPI pin.

[0068] Signal Conversion: The CAN FD controller converts the received serial digital signal into a CAN signal.

[0069] CAN driver: CAN signals are output through the TxD pin.

[0070] 2. Reception process (RxD→SPI)

[0071] CAN signal: The signal output by the CAN transceiver is received by the CAN FD controller.

[0072] Signal Conversion: The CAN FD controller converts CAN signals into SPI serial digital signals.

[0073] Output signal: The converted digital signal is sent through the SPI pin.

[0074] In one embodiment, one input terminal of FPGA module 3 is connected to the output terminal of CAN FD controller, the other input terminal of FPGA module 3 is connected to LIN bus, and the output terminal of FPGA module 3 maintains a communication connection with MCU module through SRAM interface.

[0075] In one embodiment, the interface expansion of FPGA module 3 includes SBUS bus, RS422 serial communication interface, RS232 serial communication interface, PWM output and GPIO expansion interface.

[0076] Specifically, the circuit structure of FPGA module 3 is as follows: Figures 7-12 As shown. FPGA module 3 consists of FPGA chip U6, an auxiliary clock chip, a Flash chip, and a power supply. The operating principle of FPGA module 3 is as follows:

[0077] (1) Configuration phase

[0078] The FPGA loads the configuration file (Bitstream) from external memory (Flash) during startup.

[0079] The configuration file defines the functionality of the logical units and the connection methods for interconnecting resources.

[0080] Once configured, the FPGA's logic functions and circuit structure are fixed.

[0081] (2) Logic Implementation

[0082] Lookup Table (LUT): A LUT is a basic logic unit in an FPGA and can be configured to implement any combinational logic function. For example, a 4-input LUT can implement any logic function with 4 inputs and 1 output.

[0083] Flip-Flop: Used to store state information and implement sequential logic.

[0084] Multiplexer (MUX): Used to select signal paths to implement complex logic functions.

[0085] (3) Signal transmission

[0086] The input signal enters the FPGA through the IOB.

[0087] Signals are transmitted to logic units via interconnect resources for logical operations.

[0088] The calculation results are transmitted to the output IOB via interconnect resources and sent to external devices.

[0089] (4) Clock Management

[0090] The clock signal is distributed to each logic unit through the clock management unit.

[0091] Clock division and phase adjustment functions ensure the correct operation of timing logic.

[0092] In one embodiment, one input terminal of MCU module 4 is connected to the output terminal of FPGA module 3, the other input terminal of MCU module 4 is connected to the GPIO input interface, and the output terminal of MCU module 4 is connected to multiple peripherals.

[0093] Specifically, the circuit structure of MCU module 4 is as follows: Figures 13-15As shown. MCU module 4 consists of MCU chip U3, an auxiliary clock chip, and a power supply. The operating principle of MCU module 4 is as follows:

[0094] (1) Startup and initialization

[0095] Power-on reset: After the MCU is powered on, the reset circuit initializes the system to a known state.

[0096] Loader: Loads program code from Flash memory into the CPU.

[0097] Initialize peripherals: Configure peripherals such as GPIO, timers, and communication interfaces.

[0098] (2) Instruction execution

[0099] Instruction fetch: The CPU reads instructions from the Flash memory.

[0100] Decoding: Decodes instructions into opcodes and operands.

[0101] Execution: The CPU executes instructions to perform arithmetic operations, logical operations, data transfer, and other operations.

[0102] Write back: Write the execution result back to a register or memory.

[0103] (3) Interruption handling

[0104] Interrupt request: An interrupt request is triggered by a peripheral device or an external event.

[0105] Interrupt response: The CPU suspends the current task, saves the context, and jumps to the interrupt service routine (ISR).

[0106] Interrupt return: After the ISR completes execution, the context is restored and the original task continues to be executed.

[0107] (4) Peripheral control

[0108] GPIO control: External devices can be controlled by configuring the state (input / output) and level (high / low) of GPIO pins.

[0109] Timer control: Precise time control can be achieved by configuring the timer's count value and mode (such as timer, count, PWM).

[0110] Communication interface control: Data transmission is achieved by configuring parameters (such as baud rate and data format) of interfaces such as FMC, UART, SPI, and I2C.

[0111] like Figure 3As shown, the multiple peripherals connected to the output of MCU module 4 include a radar altimeter, data link and SBUS, atmospheric engine, inertial navigation system, power system, steering servo and wing surface servo.

[0112] To facilitate understanding of the above-mentioned technical solutions of this utility model, the working principle or operation method of this utility model in actual process will be described in detail below.

[0113] In practical applications, channel selection module 1 is used to split the CAN FD signal introduced by the TPU interface into two, allowing the introduced CAN FD signal to be either connected to the interface adapter unit or directly exported for other uses. A DIP switch is selected in channel selection module 1 to implement this channel configuration function. Protocol conversion module 2 is used to convert the introduced CAN FD signal into an SPI signal, which is then connected to the FPGA for communication with the MCU. This not only ensures a high communication rate (8Mbps) but also expands the number of channels. An MCP2517FD is selected in this module to implement this function. FPGA module 3 is used to implement communication between the VDC and the MCU after protocol conversion. The FPGA module acts as an interface expansion unit for the MCU, communicating with the MCU through an SRAM interface. MCU module 4 is used to implement communication with the TPU, parse the communication content, and then control various peripherals to perform corresponding actions, while simultaneously collecting sensor information and sending it to the TPU. An STM32F427 chip is selected in this invention to implement this function.

[0114] In summary, by utilizing the above-mentioned technical solution of this utility model, the MCU+FPGA+MCP2517 architecture can be fully compatible with the latest automotive communication protocol CAN FD. Moreover, the CAN FD channel can be configured as needed. At the same time, the interface adapter board can realize various avionics system interfaces, which is flexible and expandable, ensuring the real-time performance of data protocol conversion and communication functions.

[0115] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A configurable multi-channel interface adapter board, characterized in that, include: Channel selection module (1) for accessing CAN FD signals and completing signal adaptation; Protocol conversion module (2) for converting CAN FD signals to SPI signals; FPGA module (3) used to provide interface expansion and establish communication connection with MCU module; MCU module (4) used to parse TPU communication content and control peripheral actions; The channel selection module (1), the protocol conversion module (2), the FPGA module (3), and the MCU module (4) maintain data connection in sequence.

2. The configurable multi-channel interface adapter board according to claim 1, characterized in that, The channel selection module (1) includes several DIP switches that are connected in parallel; The DIP switch input is connected to the TPU interface, one of the DIP switch outputs a CAN FD signal, and the other output is connected to the protocol conversion module (2).

3. A configurable multi-channel interface adapter board according to claim 2, characterized in that, The protocol conversion module (2) includes several CAN transceivers and a CAN FD controller; The number of CAN transceivers, CAN FD controllers and DIP switches are the same, and the input terminal of the CAN transceiver is connected to the corresponding output terminal of the DIP switch. The output terminal of the CAN transceiver is connected to the corresponding input terminal of the CAN FD controller. The output terminal of the CAN FD controller is connected to the input terminal of the FPGA module (3) and inputs an SPI signal.

4. A configurable multi-channel interface adapter board according to claim 3, characterized in that, One input terminal of the FPGA module (3) is connected to the output terminal of the CAN FD controller, the other input terminal of the FPGA module (3) is connected to the LIN bus, and the output terminal of the FPGA module (3) maintains a communication connection with the MCU module through the SRAM interface.

5. A configurable multi-channel interface adapter board according to claim 4, characterized in that, The interface expansion of the FPGA module (3) includes SBUS bus, RS422 serial communication interface, RS232 serial communication interface, PWM output and GPIO expansion interface.

6. A configurable multi-channel interface adapter board according to claim 5, characterized in that, One input terminal of the MCU module (4) is connected to the output terminal of the FPGA module (3), the other input terminal of the MCU module (4) is connected to the GPIO input interface, and the output terminal of the MCU module (4) is connected to multiple peripherals.

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