Voltage detection circuit and electronic equipment

Abstract

The utility model relates to the technical field of communication, in particular to a voltage detection circuit and electronic equipment. The circuit comprises a sampling circuit, the first end of the sampling circuit is connected with the first end of a secondary winding of the isolation converter, the second end of the sampling circuit is connected with the second end of the secondary winding, and the sampling circuit is used for sampling voltage induced by the secondary winding; wherein the second end of the secondary winding is connected with the first end of an output circuit, the second end of the output circuit is grounded, and the output circuit is used for outputting voltage induced by the secondary winding; the first end of the detection circuit is connected with the first end of the sampling circuit, the second end of the detection circuit is connected with the second end of the sampling circuit, and the detection circuit is used for detecting the voltage sampled by the sampling circuit.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of voltage detection, and in particular to a voltage detection circuit and an electronic device. BACKGROUND

[0002] An isolation converter can electrically isolate an input circuit from an output circuit. Related technologies can detect the voltage on the secondary winding through a detection circuit on the secondary winding side, thereby controlling the output voltage by controlling the input voltage.

[0003] However, the measurement accuracy of related technologies is low, and there is a time interval between two measurements, making it difficult to continuously measure. UTILITY MODEL CONTENT

[0004] To overcome the problems in related technologies, the present disclosure provides a voltage detection circuit and an electronic device, which can solve the above problems.

[0005] According to a first aspect of an embodiment of the present disclosure, a voltage detection circuit is provided, which includes: a sampling circuit, a first end of the sampling circuit being connected to a first end of a secondary winding of an isolation converter, a second end of the sampling circuit being connected to a second end of the secondary winding, the sampling circuit being configured to sample the voltage induced by the secondary winding; wherein the second end of the secondary winding is connected to a first end of an output circuit, a second end of the output circuit being grounded, the output circuit being configured to output the voltage induced by the secondary winding; and a detection circuit, a first end of the detection circuit being connected to a first end of the sampling circuit, a second end of the detection circuit being connected to a second end of the sampling circuit, the detection circuit being configured to detect the voltage sampled by the sampling circuit.

[0006] According to a second aspect of an embodiment of the present disclosure, an electronic device is provided, which includes the voltage detection circuit of the first aspect.

[0007] The technical solution provided by the embodiments of the present disclosure can include the following beneficial effects:

[0008] The first end of the sampling circuit of the present disclosure is connected to the first end of the secondary winding, and the second end is connected to the second end of the secondary winding. Based on the connection mode of the sampling circuit, when the input voltage fluctuates and causes the voltage of the secondary winding to rise, the secondary winding can charge the sampling circuit, so that the sampling circuit can accurately reflect the voltage on the secondary winding. When the input voltage decreases and causes the voltage of the secondary winding to decrease, the sampling circuit can discharge the secondary winding to quickly reduce the voltage to the voltage induced by the secondary winding. Therefore, the sampling circuit can quickly and accurately reflect the dynamic change of the voltage induced by the secondary winding, so that the voltage determined by the detection circuit after detecting the voltage sampled by the sampling circuit has high accuracy and can meet the high real-time dynamic demand.

[0009] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0010] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and serve to explain the principles of the disclosure, in which:

[0011] Figure 1 is a structural schematic diagram of a detection circuit according to an exemplary embodiment of the present disclosure.

[0012] Figure 2 is a structural schematic diagram of a detection circuit according to an exemplary embodiment of the present disclosure.

[0013] Figure 3a is a structural schematic diagram of a detection circuit according to an exemplary embodiment of the present disclosure.

[0014] Figure 3b is a structural schematic diagram of a detection circuit according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0015] Reference will now be made in detail to some embodiments of the application, one example of which is illustrated in the accompanying drawings. Wherever possible, same or similar reference numerals are used in different drawings to depict the same or similar

[0016] The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used in this present disclosure and the appended claims, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0017] It should be understood that although the terms first, second, third, etc. can be used herein to describe various information, these terms are not intended to denote a particular order or hierarchy. For example, a first information can be termed a second information, and similarly, a second information can be termed a first information, without departing from the scope of the present disclosure. As used herein, the term "if' can be construed to mean "when" or "in response to determining" or "in response to a determination" depending on the context.

[0018] As an important component of switched-mode power supplies (SMPS), the design of the control structure of the isolation converter directly affects the overall structure and cost of the converter.

[0019] A common approach is to place the control circuit on the primary winding side of the converter, with the output voltage fed back to the control circuit on the primary winding side via an isolation optocoupler, thereby adjusting the output voltage by controlling the input voltage. However, this approach requires the introduction of an additional isolation optocoupler, increasing costs.

[0020] Another approach is to place the control circuit on the secondary winding side. The control circuit located on the secondary winding side needs to detect the voltage induced in the secondary winding to achieve effective control of the isolation converter.

[0021] Figure 1 This is a schematic diagram of a detection circuit according to an exemplary embodiment of the present disclosure.

[0022] like Figure 1 As shown, in Figure 1 In the circuit, diode D2 and capacitor C2 connected to the secondary winding form the output circuit, providing the output voltage Vout. Resistor R1, diode D1, capacitor C3, capacitor C4 and resistor R2 form the sampling circuit, which can sample the voltage of the secondary winding and store the voltage energy in capacitor C4. Then, the voltage V1 on the secondary winding can be determined by detecting capacitor C4 or resistor R2.

[0023] However, the input voltage may fluctuate. When the input voltage rises, the secondary winding can charge capacitor C4, allowing capacitor C4 to accurately and timely sample the voltage of the secondary winding to reflect the voltage on the primary winding. However, when the input voltage drops, the voltage of the secondary winding is less than the voltage on capacitor C4, and capacitor C4 needs to be discharged through the discharge path; otherwise, it cannot accurately sample the voltage of the secondary winding.

[0024] Therefore, to achieve high-precision sampling, the voltage of capacitor C4 needs to be completely discharged through a resistor in each sampling cycle. Once the voltage is lower than the voltage on the secondary winding, capacitor C4 is then charged by the secondary winding to accurately display the voltage of the secondary winding. This introduces a sampling period in voltage detection, meaning there is a time interval between two adjacent samples, making continuous measurement difficult and resulting in poor dynamic performance. Furthermore, the large current discharge of capacitor C4 also causes voltage fluctuations on the capacitor, affecting sampling accuracy. Therefore, this scheme cannot simultaneously achieve both high dynamic performance and high precision requirements.

[0025] To address the aforementioned technical problems, this disclosure proposes a voltage detection circuit.

[0026] Figure 2 is a structural schematic diagram of a voltage detection circuit according to an embodiment of the present disclosure. As shown in Figure 2 , the voltage detection circuit comprises:

[0027] a sampling circuit 210, a first end of the sampling circuit 210 is connected with a first end of a secondary winding of an isolation transformer, a second end of the sampling circuit 210 is connected with a second end of the secondary winding, and the sampling circuit 210 is configured to sample a voltage induced by the secondary winding; wherein the second end of the secondary winding is connected with a first end of an output circuit 220, a second end of the output circuit 220 is grounded, and the output circuit 220 is configured to output the voltage induced by the secondary winding;

[0028] a detection circuit 230, a first end of the detection circuit 230 is connected with a first end of the sampling circuit 210, a second end of the detection circuit 230 is connected with a second end of the sampling circuit 210, and the detection circuit 230 is configured to detect the voltage sampled by the sampling circuit 210.

[0029] In some embodiments, the first end of the secondary winding can be a same-name end.

[0030] The two ends of the secondary winding are a same-name end and an opposite-name end respectively, and in an embodiment of the present disclosure, the first end of the secondary winding can be the same-name end. It should be noted that the present disclosure does not make any limitation in this regard, and the first end of the secondary winding can also be the opposite-name end.

[0031] In some embodiments, when the first end of the secondary winding is the same-name end, the second end of the secondary winding is the opposite-name end; when the first end of the secondary winding is the opposite-name end, the second end of the secondary winding is the same-name end.

[0032] According to an embodiment of the present disclosure, the two ends of the sampling circuit 210 are connected at the two ends of the secondary winding respectively, so that when the input voltage fluctuates and causes the voltage of the secondary winding to rise, the secondary winding can charge the sampling circuit 210, and when the input voltage drops and causes the voltage of the secondary winding to drop, since the two ends of the sampling circuit 210 are both connected with the secondary winding, the sampling circuit 210 can not be discharged by an additional discharge circuit to reduce the voltage, but can synchronize the voltage sampled by the sampling circuit 210 to the secondary winding, so that the sampling circuit 210 can reduce its own voltage to the voltage of the secondary winding to quickly and accurately reflect the dynamic change of the voltage induced by the secondary winding, while ensuring high accuracy and good dynamic performance.

[0033] Figure 3a and Figure 3b is a structural schematic diagram of a voltage detection circuit according to an embodiment of the present disclosure.

[0034] As shown in Figure 3a , the isolation transformer is provided with a capacitor C1 and a MOS tube Q1 at the primary winding side. When the MOS tube Q1 is turned on, the capacitor C1 can provide an input voltage Vin to the primary winding. After the input voltage passes through the primary winding of the transformer, a corresponding voltage can be induced at the secondary winding side. In the case where the number of turns of the primary winding is N1 and the number of turns of the secondary winding is N2, the voltage induced at the secondary winding side is N2 / N1*Vin.

[0035] In some embodiments, the power topology of the isolation transformer can be a flyback converter.

[0036] In some embodiments, the voltage detection circuit proposed by the present disclosure can also be applied to an isolation topology using a transformer.

[0037] In some embodiments, the output circuit can include a fourth capacitor C4.

[0038] The first end of the fourth capacitor C4 is grounded, and the second end is connected to the second end of the secondary winding. As shown in Figure 3a , the second end of the fourth capacitor, Figure 3a , the C point, the voltage is Vout. For example, one end of the load can be connected to the second end of the fourth capacitor C4 to provide an output voltage Vout to the load. And the output voltage Vout is electrically isolated from the input voltage Vin at the primary winding side.

[0039] In some embodiments, the voltage detection circuit further includes a rectification unit, the first end of the rectification unit is connected to the second end of the secondary winding, the second end of the rectification unit is connected to the first end of the output circuit, and the rectification unit is used to limit the current direction.

[0040] The rectification unit can be a diode D1, the first end of the diode D1 is connected to the second end of the secondary winding, and the second end of the diode D1 is connected to the first end of the output circuit.

[0041] In some embodiments, the first end of the diode D1 is an anode, and the second end of the diode D1 is a cathode.

[0042] The diode D1 has unidirectional conductivity, which allows current to flow only from the second end of the secondary winding to the second end of the fourth capacitor C4 of the output circuit, and can convert alternating current signals into direct current signals, playing a rectification role.

[0043] In some embodiments, the sampling circuit comprises a voltage storage unit, a first end of the voltage storage unit is connected to a first end of the secondary winding, and a second end of the voltage storage unit is connected to a second end of the secondary winding, and the voltage storage unit is configured to store the voltage sampled from the secondary winding.

[0044] For example, the voltage storage unit can be a first capacitor C3. A first end of the first capacitor C3 is connected to a first end of the secondary winding, and a second end of the first capacitor C3 is connected to a second end of the secondary winding, and the first capacitor C3 is configured to sample the voltage induced by the secondary winding.

[0045] The first capacitor C3 is configured to sample the voltage induced by the secondary winding. By detecting the voltage across the first capacitor C3, the voltage induced by the secondary winding can be determined, and then the input voltage of the primary winding can be determined in combination with the ratio of the number of turns of the primary winding to the number of turns of the secondary winding.

[0046] The voltage at the first end of the first capacitor C3 can be denoted as V1. The second end of the first capacitor C3 is connected to the second end of the secondary winding and also connected to the first end of the output circuit, so the voltage at the second end of the first capacitor C3 is also the output voltage Vout. In the case where the first end of the secondary winding is the same end, the induced voltage on the secondary winding is V1-Vout.

[0047] In some embodiments, the sampling circuit further comprises a first switch, a first end of the first switch is connected to a first end of the secondary winding, a second end of the first switch is connected to a first end of the voltage storage unit, and a control end of the first switch is connected to a second end of the secondary winding; a second switch, a first end of the second switch is connected to the control end of the first switch, a second end of the second switch is connected to a second end of the secondary winding, and a control end of the second switch is connected to a first end of the secondary winding; wherein when there is voltage on the secondary winding, the second switch is turned on, so that the control end of the first switch is connected to the second end of the secondary winding, thereby turning on the first switch.

[0048] When there is voltage on the secondary winding, the second switch is turned on, and the control end of the first switch is connected to the second end of the secondary winding, thereby turning on the first switch. After the first switch is turned on, the voltage storage unit is directly connected to the first end of the secondary winding, and thus the voltage of the secondary winding can be sampled.

[0049] Since the voltage storage unit is directly connected to the first end of the secondary winding, when the voltage on the secondary winding changes, whether the voltage on the secondary winding increases or decreases, the voltage storage unit can be synchronized with the secondary winding.

[0050] When the primary winding side stops input voltage, resulting in the absence of voltage on the secondary winding, the control end of the second switch does not receive voltage, and the second switch cannot be turned on. In the case of the second switch being turned off, the control end of the first switch cannot be connected to the second end of the secondary winding, and the first switch is also closed. In this case, the first end and the second end of the voltage storage unit are respectively disconnected from the secondary winding, so that the voltage on the voltage storage unit can be kept unchanged, facilitating detection.

[0051] In some embodiments, the first switch comprises a first MOS tube, and the second switch comprises a second MOS tube.

[0052] The first end of the first MOS tube Q3 is connected to the first end of the secondary winding, the second end of the first MOS tube Q3 is connected to the first end of the first capacitor C3, and the gate of the first MOS tube Q3 is connected to the second end of the secondary winding.

[0053] The first MOS tube Q3 can be a P-type MOS tube or an N-type MOS tube. Figure 3a Taking the P-type MOS tube as an example, the first end and the second end of the first MOS tube Q3 can be the source and the drain, which are connected between the first end of the secondary winding and the first end of the first capacitor C3, and the gate is connected to the second end of the secondary winding.

[0054] The first MOS tube Q3 is controlled to be turned on based on the output voltage Vout provided by the second end of the secondary winding, so that the first end of the secondary winding is connected to the first end of the first capacitor C3, so that the secondary winding can charge the first capacitor C3, or the first capacitor C3 can discharge the secondary winding.

[0055] The first end of the second MOS tube Q2 is connected to the gate of the first MOS tube Q3, the second end of the second MOS tube Q2 is connected to the second end of the secondary winding, and the gate of the second MOS tube Q2 is connected to the first end of the secondary winding.

[0056] The second MOS tube Q2 can be a P-type MOS tube or an N-type MOS tube. Figure 3a Taking the N-type MOS tube as an example, the source and the drain of the second MOS tube Q2 are respectively connected to the gate of the first MOS tube Q3 and the second end of the secondary winding, and the gate of the second MOS tube Q2 is connected to the first end of the secondary winding. In the case that the second MOS tube Q2 is turned on, the voltage of the A node connected to the second MOS tube Q2 can be pulled up to the output voltage Vout, so as to control the first MOS tube Q3. Figure 3a Taking the N-type MOS tube as an example, the source and the drain of the second MOS tube Q2 are respectively connected to the gate of the first MOS tube Q3 and the second end of the secondary winding, and the gate of the second MOS tube Q2 is connected to the first end of the secondary winding. In the case that the second MOS tube Q2 is turned on, the voltage of the A node connected to the second MOS tube Q2 can be pulled up to the output voltage Vout, so as to control the first MOS tube Q3.

[0057] In some embodiments, the sampling circuit further comprises a differential unit, a first end of the differential unit is connected with a first end of the secondary winding, a second end of the differential unit is connected with a control end of the second switch, and a third end of the differential unit is connected with a second end of the secondary winding, and the differential unit is used to absorb a peak voltage on the secondary winding.

[0058] In some embodiments, the differential unit comprises a second capacitor C2, a first end of the second capacitor C2 is connected with a first end of the secondary winding, and a second end of the second capacitor C2 is connected with a gate of the second MOS Q2; and a first resistor R1, a first end of the first resistor R1 is connected with a second end of the second capacitor C2, and a second end of the first resistor R1 is connected with a second end of the secondary winding.

[0059] In the case that an input voltage Vin is added to a primary winding of a transformer, a same-name end of a secondary winding can induce a voltage of N2 / N1*Vin. In this case, the second capacitor C2 and the first resistor R1 can constitute a differential unit, so that the second MOS Q2 is turned on for a period of time. In this case, an expression of a time constant t can be:

[0060]

[0061] wherein, is an input capacitance (Gate-to-Source Capacitance) of the second MOS Q2.

[0062] The voltage is is a voltage division ratio of the second capacitor C2, and in this case, the second MOS Q2 is turned on. After the second MOS Q2 is turned on, a voltage at point A is the same as a voltage at a different-name end of the secondary winding, and is pulled to Vout. Since a first end of the second MOS Q2 is connected with a gate of the first MOS Q3, the first MOS Q3 can be subjected to a negative voltage, so as to be turned on, so that the secondary winding charges the first capacitor C3 through the first MOS Q3, and a voltage V1 at a first end of the first capacitor C3 and a voltage Vout at a second end of the first capacitor C3 satisfy:

[0063]

[0064] In some embodiments, the second capacitor C2 can further constitute an absorbing network of the secondary winding with the first resistor R1.

[0065] For example, the absorbing network comprises an RC absorbing circuit, and can be used to absorb a peak voltage of the secondary winding.

[0066] In some embodiments, the sampling circuit further comprises: a voltage dividing unit, a first end of the voltage dividing unit being connected to the second end of the first switch, a second end of the voltage dividing unit being connected to the control end of the first switch, and a third end of the voltage dividing unit being connected to the first end of the second switch; and the voltage dividing unit is configured to divide voltage to output a divided voltage to the control end of the first switch.

[0067] In some embodiments, the voltage dividing unit comprises: a second resistor R2, a first end of the second resistor R2 being connected to the second end of the first switch, and a second end of the second resistor R2 being connected to the control end of the first switch; and a third resistor R3, a first end of the third resistor R3 being connected to the control end of the first switch, and a second end of the third resistor R3 being connected to the first end of the second switch.

[0068] A first end of the second resistor R2 is connected to a second end of the first MOS transistor Q3, and a second end of the second resistor R2 is connected to a gate of the first MOS transistor Q3; a first end of the third resistor R3 is connected to the gate of the first MOS transistor Q3, and a second end of the third resistor R3 is connected to a first end of the second MOS transistor Q2.

[0069] For example, the second resistor R2 and the third resistor R3 constitute a voltage dividing circuit, which is configured to divide the output voltage Vout of point A, and the divided voltage is input to the gate of the first MOS transistor Q3, so that the first MOS transistor Q3 is turned on under negative voltage. Based on the actual voltage dividing requirement, the skilled person can flexibly set the size of the second resistor R2 and the third resistor R3.

[0070] In some embodiments, the second resistor R2 is equal to the third resistor R3.

[0071] The ratio of the second resistor R2 to the third resistor R3 is 1:1, and in this case, the voltage input to the first MOS transistor Q3 is half of the output voltage Vout of point A.

[0072] In some embodiments, the sampling circuit further comprises: a filter unit, a first end of the filter unit being connected to the second end of the first switch, and a second end of the filter unit being connected to the control end of the first switch; and the filter unit is configured to reduce ripple.

[0073] The filter unit can play a filtering role, can suppress noise signals, prevent false touch, improve stability and reduce the switching loss of the first switch.

[0074] In some embodiments, the filter unit comprises: a third capacitor C5.

[0075] A first end of a third capacitor C5 is connected to a second end of the first MOS tube Q3, and a second end of the third capacitor C5 is connected to a gate of the first MOS tube Q3.

[0076] The present disclosure is based on Figure 3a As shown in the embodiment, when the input voltage Vin on the primary winding side of the isolation transformer rises, the secondary winding charges the first capacitor C3 through the first MOS tube Q3, so that the first capacitor C3 can accurately sample the voltage of the secondary winding; when the input voltage Vin decreases, the first capacitor C3 can be synchronized to the voltage of the secondary winding through the first MOS tube Q3, so that dynamic sampling of the voltage of the secondary winding is realized regardless of whether the input voltage Vin fluctuates; when the MOS tube Q1 on the primary winding side of the isolation transformer is turned off, the second MOS tube Q2 is turned off accordingly, and the first MOS tube Q3 is kept off, thereby avoiding discharging of the first capacitor C3 to the secondary winding, so that the voltage of the first capacitor C3 can remain unchanged to realize static voltage sampling.

[0077] In some embodiments, the detection circuit comprises a debiasing unit and a measurement module; a first end of the debiasing unit is a first end of the detection circuit, a second end of the debiasing unit is a second end of the detection circuit, and a third end of the debiasing unit is connected to the measurement module; the debiasing unit is configured to remove the bias voltage at the second end of the sampling circuit, and the measurement module is configured to detect the voltage sampled by the sampling circuit.

[0078] As Figure 3b As shown in some embodiments, the debiasing unit comprises a fourth resistor R4, a fifth resistor R5, and a first transistor Q4, wherein a first end of the first transistor Q4 is connected to the fourth resistor R4, the other end of the fourth resistor R4 is the first end of the detection circuit; the base of the first transistor Q4 is the second end of the detection circuit; the second end of the first transistor Q4 is connected to the fifth resistor R5, and the other end of the fifth resistor R5 is grounded; and the measurement module is connected to the second end of the first transistor Q4.

[0079] In some embodiments, the first transistor Q4 can be a PNP transistor or an NPN transistor. The first end can be any of the collector and the emitter, and the second end is the other corresponding end.

[0080] As Figure 3b As shown, the first transistor Q4 can be a PNP transistor, the base of which is the second end of the detection circuit and is connected to the second end of the sampling circuit, that is Figure 3aThe C point in the middle of the fourth resistor R4 and the fifth resistor R5 can obtain the output voltage Vout; the first end of the first transistor Q4 is connected with the fourth resistor R4, and the first end of the detection circuit is connected with the first end of the sampling circuit, that is Figure 3a The D point in the middle of the fourth resistor R4 and the fifth resistor R5 can obtain the voltage V1; the second end of the first transistor Q4 is connected with the fifth resistor R5, and the other end of the fifth resistor R5 is grounded. The measurement module is connected with the second end of the first transistor Q4 through the B interface, and the voltage sampled by the sampling circuit is measured after being divided by the fourth resistor R4 and the fifth resistor R5.

[0081] It should be noted that the circuit composed of the fourth resistor R4, the fifth resistor R5 and the first transistor Q4 can remove the bias voltage of the output voltage Vout of the second end of the sampling circuit, so that the voltage measured by the measurement module based on the B interface is the voltage N2 / N1*Vin of the secondary winding.

[0082] In some embodiments, further comprising: a control module connected with the measurement module, for adjusting the input voltage of the isolation transformer according to the detection result of the measurement module.

[0083] After the sampling circuit accurately samples the voltage of the secondary winding, the measurement module can obtain an accurate detection result, which can be sent to the control module by the measurement module, so that the control module adjusts the input voltage of the isolation transformer on the primary winding side based on the detection result.

[0084] In some embodiments, the control module can control the conduction and turn-off of the MOS tube Q1 on the primary winding side of the isolation transformer.

[0085] By controlling the conduction and turn-off of the MOS tube Q1, the presence or absence of the output voltage Vout can be controlled.

[0086] Embodiments of the present disclosure also propose an electronic device comprising the voltage detection circuit according to any one of the above embodiments.

[0087] Other embodiments of the present disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the present disclosure disclosed herein. It is intended that the present disclosure cover any and all variations of the present disclosure including those variations that can be incorporated into the above detailed description and making use of the general principles of the present disclosure. It is intended that the present disclosure be considered as illustrative only of the principles of the present disclosure and not as limiting. The scope of the present disclosure is to be limited only by the claims that follow.

[0088] It should be understood that the present disclosure is not limited to the precise construction that has been described above and shown in the accompanying drawings, and that various modifications and changes can be made by those skilled in the art without departing from the scope of the present disclosure. The scope of the present disclosure is only limited by the claims that follow.

[0089] It is to be noted that, in the present text, relational terms such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0090] The above describes in detail the method and device provided by the embodiments of the present disclosure. The principles and implementation manners of the present disclosure are described by using specific examples. The above description of the embodiments is only used to help understand the method of the present disclosure and its core idea. Meanwhile, for those skilled in the art, according to the idea of the present disclosure, the specific implementation manners and application ranges can be changed. In summary, the content of the present description should not be understood as a limitation of the present disclosure.

Claims

1. A voltage detection circuit, characterized by, The circuit comprises: a sampling circuit, a first end of the sampling circuit being connected with a first end of a secondary winding of an isolation transformer, a second end of the sampling circuit being connected with a second end of the secondary winding, the sampling circuit being configured to sample a voltage induced by the secondary winding; wherein the second end of the secondary winding is connected with a first end of an output circuit, a second end of the output circuit being grounded, the output circuit being configured to output the voltage induced by the secondary winding; a detection circuit, a first end of the detection circuit being connected with the first end of the sampling circuit, a second end of the detection circuit being connected with the second end of the sampling circuit, the detection circuit being configured to detect the voltage sampled by the sampling circuit.

2. The circuit of claim 1, wherein, The sampling circuit comprises: a voltage storage unit, a first end of the voltage storage unit being connected with the first end of the secondary winding, a second end of the voltage storage unit being connected with the second end of the secondary winding, the voltage storage unit being configured to store the voltage sampled from the secondary winding.

3. The circuit of claim 2, wherein, The voltage storage unit comprises a first capacitor.

4. The circuit of claim 2, wherein, The sampling circuit further comprises: a first switch, a first end of the first switch being connected with the first end of the secondary winding, a second end of the first switch being connected with the first end of the voltage storage unit, a control end of the first switch being connected with the second end of the secondary winding; a second switch, a first end of the second switch being connected with the control end of the first switch, a second end of the second switch being connected with the second end of the secondary winding, a control end of the second switch being connected with the first end of the secondary winding; wherein, in the case that there is a voltage on the secondary winding, the second switch is turned on, so that the control end of the first switch is connected with the second end of the secondary winding, thereby turning on the first switch.

5. The circuit of claim 4, wherein, The first switch comprises a first MOS tube, and the second switch comprises a second MOS tube.

6. The circuit of claim 4, wherein, The sampling circuit further comprises a differential unit; a first end of the differential unit being connected with the first end of the secondary winding, a second end of the differential unit being connected with the control end of the second switch, a third end of the differential unit being connected with the second end of the secondary winding; the differential unit being configured to absorb a peak voltage on the secondary winding.

7. The circuit of claim 6, wherein, The differential unit comprises: a second capacitor, a first end of the second capacitor being connected with the first end of the secondary winding, a second end of the second capacitor being connected with the control end of the second switch; a first resistor, a first end of the first resistor being connected with the second end of the second capacitor, a second end of the first resistor being connected with the second end of the secondary winding.

8. The circuit of claim 4, wherein, The sampling circuit further comprises a voltage dividing unit; a first end of the voltage dividing unit being connected with the second end of the first switch, a second end of the voltage dividing unit being connected with the control end of the first switch, a third end of the voltage dividing unit being connected with the first end of the second switch; the voltage dividing unit being configured to divide voltage, so as to output divided voltage to the control end of the first switch.

9. The circuit of claim 8, wherein, The voltage dividing unit comprises: a second resistor, a first end of the second resistor being connected with the second end of the first switch, a second end of the second resistor being connected with the control end of the first switch; A third resistor, a first end of the third resistor being connected with the control end of the first switch, and a second end of the third resistor being connected with the first end of the second switch.

10. The circuit of claim 4, wherein, The sampling circuit further comprises: A filter unit, a first end of the filter unit being connected with the second end of the first switch, and a second end of the filter unit being connected with the control end of the first switch, the filter unit being configured to reduce a ripple.

11. The circuit of claim 10, wherein, The filter unit comprises a third capacitor.

12. The circuit of claim 1, wherein, Further comprising: A rectifier unit, a first end of the rectifier unit being connected with the second end of the secondary winding, and a second end of the rectifier unit being connected with the first end of the output circuit, the rectifier unit being configured to limit a current direction.

13. The circuit of claim 12, wherein, The rectifier unit comprises a diode.

14. The circuit of any one of claims 1-13, wherein, The detection circuit comprises a debiasing unit and a measurement module. A first end of the debiasing unit is the first end of the detection circuit, a second end of the debiasing unit is the second end of the detection circuit, and a third end of the debiasing unit is connected with the measurement module. The debiasing unit is configured to remove a bias voltage of the second end of the sampling circuit, and the measurement module is configured to detect a voltage sampled by the sampling circuit.

15. The circuit of claim 14, wherein, The debiasing unit comprises: A fourth resistor, a fifth resistor, and a first transistor, wherein A first end of the first transistor is connected with the fourth resistor, and another end of the fourth resistor is the first end of the detection circuit. A base of the first transistor is the second end of the detection circuit. A second end of the first transistor is connected with the fifth resistor, and another end of the fifth resistor is grounded. The measurement module is connected with the second end of the first transistor.

16. The circuit of claim 14, wherein, Further comprising: A control module connected with the measurement module, configured to adjust an input voltage of the isolation converter according to a detection result of the measurement module.

17. An electronic device, comprising: The voltage detection circuit comprises any one of claims 1-16.

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