Vehicle monitoring system and vehicle

Abstract

The utility model discloses a vehicle monitoring system and a vehicle. The system comprises an interface expansion board, and a power supply module, an LVDS circuit module, a data transmission module, a CAN module, a communication module and an Ethernet module which are connected with the interface expansion board. Wherein the signal definition led out by the core processor circuit board of the vehicle monitoring system is led out to the interface of the interface expansion board through the connector XIA and the connector XIB. According to the utility model, the core processing board is independently taken as a module and is connected with the interface expansion board through the high-speed connector, so that the maintainability and the stability of the interface expansion board are improved, the core processing board leads out all functional pins of the CPU, a user only needs to do the design of a peripheral circuit with required functions, the function expansion is convenient, and the cost is low. And the subsequent development difficulty and change cost of the operation and maintenance system are effectively reduced.

Description

Technical Field

[0001] This utility model relates to the field of vehicle monitoring technology, specifically a vehicle monitoring system and a vehicle. Background Technology

[0002] Intelligent operation and maintenance systems are comprehensive technical systems designed to improve the operational efficiency, reliability, and maintainability of special vehicles. These vehicles are characterized by a large number of in-vehicle devices and diverse communication interface types. Furthermore, with the improvement of equipment levels, the demand for highly information-based, multi-functional special vehicle equipment is constantly increasing. However, expanding functionality after development is inconvenient, requiring repeated reorganization of the internal main chip's pins. Additionally, some information-based equipment suffers from user experience design issues; products may lack clear guidance, effective feedback mechanisms, and user-friendly interface designs, making it difficult for users to understand the product's functions and how to interact with it. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a vehicle operation and maintenance monitoring system that meets the centralized management needs of multiple types and quantities of equipment.

[0004] To solve the above-mentioned technical problems, this utility model provides the following technical solution:

[0005] A vehicle monitoring system includes an interface expansion board, and a power module, an LVDS circuit module, a data transmission module, a CAN module, a communication module, and an Ethernet module connected to the interface expansion board; wherein, the signal definitions of the core processor circuit board of the vehicle monitoring system are led out to the interface of the interface expansion board through connectors XIA and XIB.

[0006] The power module includes MOSFET N3, fuse F1, transient voltage suppressor diode V5, diode V7, resistors R34 and R35, and capacitors C25 to C28.

[0007] One end of fuse F1 is connected to the input power supply, and the other end is connected to the D pin of MOSFET N3. One end of transient voltage suppression diode V5 is connected to the D pin of MOSFET N3, and the other end is connected to the cathode of diode V7. The anode of diode V7 is connected to resistor R35 and then to the G pin of MOSFET N3.

[0008] After capacitors C25, C26, C27, and C28 are connected in parallel, one end of the parallel connection is connected to the S pin of MOSFET N3, and the other end is connected to the cathode of diode V7 and grounded; the two ends of resistor R34 are connected to the D pin and S pin of MOSFET N3 respectively; and the S pin of MOSFET N3 is connected to the power supply pin port of connector XIB.

[0009] Technical Effects: This utility model provides a desktop hardware based on Loongson 2K1000, mainly composed of an embedded core processor circuit board (CPU) and an embedded interface expansion board. First, the CPU is separated into a single module and connected to the interface expansion board via a high-speed connector, improving the maintainability and stability of the interface expansion board. Second, all functional pins of the CPU are brought out, allowing users to design only the peripheral circuits for the required functions, facilitating functional expansion and effectively reducing the subsequent development difficulty and change costs of the vehicle operation and maintenance system.

[0010] In the power supply filtering design, short circuit protection is provided by fuse F1, voltage regulation is provided by transient voltage suppression diode V5, reverse connection protection is provided by MOSFET N3 and transient voltage suppression diode V5, and high-frequency noise of the power supply is effectively filtered out by decoupling capacitor and bypass capacitor.

[0011] In one embodiment of this utility model, the power supply module includes DC-DC conversion chips U1 and U2, resistors R36, R38 to R41, R43 to R45, inductors L4 and L5, and capacitors C29 to C48.

[0012] Capacitors C31, C32, and C30 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U1, and the other end grounded; the two ends of resistor R38 are connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U1, respectively; resistor R36 and capacitor C29 are connected in series, and resistor R36 and capacitor C29 are also connected to pins 8 and 7 of DC-DC converter chip U1, respectively; capacitors C34, C35, ... After C36, C37, and C33 are connected in parallel, one end is connected to inductor L4 and connected to the power supply, and the other end is grounded. Inductor L4 is also connected to pin 7 of DC-DC converter chip U1. The two ends of capacitor C38 are connected to pins 9 and 10 of DC-DC converter chip U1, respectively. The two ends of resistor R40 are connected to pins 10 and 11 of DC-DC converter chip U1, respectively. The two ends of resistor R39 are connected to pins 11 and 5 of DC-DC converter chip U1, respectively.

[0013] Capacitors C42, C40, and C41 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U2, and the other end grounded; the two ends of resistor R43 are connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U2, respectively; resistor R41 and capacitor C39 are connected in series, and resistor R41 and capacitor C39 are also connected to pins 8 and 7 of DC-DC converter chip U2, respectively; capacitors C44, C45, ... After C46, ​​C47, and C43 are connected in parallel, one end is connected to inductor L5 and connected to the power supply, and the other end is grounded. Inductor L5 is also connected to pin 7 of DC-DC converter chip U2. The two ends of capacitor C48 are connected to pins 9 and 10 of DC-DC converter chip U2, respectively. The two ends of resistor R45 are connected to pins 10 and 11 of DC-DC converter chip U2, respectively. The two ends of resistor R44 are connected to pins 11 and 5 of DC-DC converter chip U2, respectively.

[0014] In one embodiment of this utility model, the LVDS circuit module includes power inductors L15 to L19, positive AND gate logic chips N5 and N6, resistors R85 to R88, capacitors C89 to C95, inductors L12 to L14, and interface X6.

[0015] Pins 2 and 1 of power inductor L15 are connected to pins A71 and A72 of connector XIB, respectively; pins 3 and 4 of power inductor L15 are connected to pins 14 and 15 of interface X6, respectively.

[0016] Pins 2 and 1 of power inductor L16 are connected to pins A75 and A76 of connector XIB, respectively; pins 3 and 4 of power inductor L16 are connected to pins 18 and 19 of interface X6, respectively.

[0017] Pins 2 and 1 of power inductor L17 are connected to pins A73 and A74 of connector XIB, respectively; pins 3 and 4 of power inductor L16 are connected to pins 16 and 17 of interface X6, respectively.

[0018] Pins 2 and 1 of the power inductor L18 are connected to pins A78 and A79 of connector XIB, respectively, and pins 3 and 4 of the power inductor L18 are connected to pins 20 and 21 of interface X6, respectively.

[0019] Pins 2 and 1 of power inductor L19 are connected to pins A81 and A82 of connector XIB, respectively, and pins 3 and 4 of power inductor L19 are connected to pins 22 and 23 of interface X6, respectively.

[0020] Capacitors C90 and C91 are connected in parallel, and capacitors C92 and C93 are connected in parallel; the two ends of inductor L12 are connected to one end of capacitors C91 and C92 respectively, and the two ends of inductor L14 are connected to the other end of capacitors C91 and C92 respectively.

[0021] Inductor L13 is connected in series with capacitor C94; pins 1 and 2 of the positive AND gate logic chip N5 are connected to one end of resistor R85 and then to connector B79 of connector XIB; the other end of resistor R85 is connected to pin 3 of the positive AND gate logic chip N5 and then grounded; pin 5 of the positive AND gate logic chip N5 is connected in series with capacitor C89 and then grounded; pin 4 of the positive AND gate logic chip N5 is connected to pin 12 of interface X6.

[0022] Pins 1 and 2 of the positive AND gate logic chip N6 are connected to one end of resistor R86 and then to B83 of connector XIB. The other end of resistor R86 is connected to pin 3 of the positive AND gate logic chip N6 and then grounded. Pin 5 of the positive AND gate logic chip N6 is connected in series with capacitor C95 and then grounded. Pin 4 of the positive AND gate logic chip N6 is connected to pin 11 of interface X6. Resistor R87 is connected to pin 24 of interface X6, and resistor R88 is connected to pin 25 of interface X6.

[0023] In one embodiment of this utility model, the data transmission module includes a USB 3.0 module; wherein the USB 3.0 module includes a USB conversion chip N12, a flash memory chip N13, diode arrays V20 and V21, an interface X8, an overcurrent protection chip U5, a resistor R109, and capacitors C149 to C153;

[0024] Pins 4, 5, 7, 8, 10, and 11 of the USB converter chip N12 are connected to pins B81, B82, B64, B65, A64, and A65 of the connector XIB, respectively; pin 68 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V21 and pin 9 of the interface X8; pin 67 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V21 and pin 8 of the interface X8.

[0025] Pin 65 of the USB converter chip N12 is connected to pins 5 and 6 of the diode array V20 and pin 6 of the interface X8; pin 64 of the USB converter chip N12 is connected to pins 4 and 7 of the diode array V20 and pin 5 of the interface X8; pin 62 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V20 and pin 3 of the interface X8; pin 61 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V20 and pin 2 of the interface X8.

[0026] Pins 1 and 2 of flash memory chip N13 are connected to pins 17 and 16 of USB converter chip N12, respectively; pins 6 and 5 of flash memory chip N13 are connected to pins 18 and 19 of USB converter chip N12, respectively.

[0027] After capacitors C149 and C150 are connected in parallel, one end is connected to pin 5 of overcurrent protection chip U5; the two ends of resistor R109 are connected to pins 5 and 4 of overcurrent protection chip U5 respectively; the two ends of capacitors C151, C152 and C15 are connected in parallel and connected to pins 1 and 2 of overcurrent protection chip U5 respectively; pin 3 of overcurrent protection chip U5 is connected to pin 20 of USB conversion chip N12.

[0028] In one embodiment of this utility model, the data transmission module includes a USB 2.0 module; the USB 2.0 module includes an overcurrent protection chip U3, a diode array V16, power inductors L10 and L11, capacitors C79, C80, C81, C85, and C86, and resistors R81 and R83.

[0029] One end of capacitors C79 and C80 connected in parallel is connected to pin 5 of overcurrent protection chip U3; the two ends of resistor R81 are connected to pins 5 and 4 of overcurrent protection chip U3, respectively; the two ends of capacitors C81, C85, and C86 connected in parallel are connected to pins 1 and 2 of overcurrent protection chip U3, respectively; resistor R83 is connected to pin 3 of overcurrent protection chip U3.

[0030] Pins 1 and 2 of power inductor L10 are connected to pins B46 and B45 of connector XIA, respectively; pin 3 of power inductor L10 is connected to pins 1 and 10 of diode array V16; and pin 4 of power inductor L10 is connected to pins 2 and 9 of diode array V16.

[0031] Pins 1 and 2 of the power inductor L11 are connected to pins A43 and A42 of connector XIA, respectively. Pin 3 of the power inductor L11 is connected to pins 4 and 7 of diode array V16. Pin 4 of the power inductor L11 is connected to pins 5 and 6 of diode array V16.

[0032] In one embodiment of this utility model, the data transmission module includes a SATA3.0 module; the SATA3.0 module includes a hard disk interface X2; pins 33 and 31 of the hard disk interface X2 are connected to pins A16 and A17 of the connector XIA, respectively; pins 25 and 33 of the hard disk interface X2 are connected to pins A19 and A20 of the connector XIA, respectively.

[0033] In one embodiment of this utility model, the CAN module includes a transceiver N2, a protection diode V4, a power inductor L12, resistors R5 to R8, capacitors C7 to C12, and a Zener diode V3.

[0034] One end of resistor R7 is connected to the cathode of Zener diode V3 and pin A26 of connector XIA. The anode of Zener diode V3 is connected to the power supply. The other end of resistor R7 is connected to pin 5 of transceiver N2. Pin 3 of transceiver N2 is connected to pin A25 of connector XIA.

[0035] The two ends of capacitors C9 and C10 connected in parallel are connected to pins 1 and 2 of transceiver N2, respectively; the two ends of capacitors C8 and C7 connected in parallel are connected to pins 16 and 15 of transceiver N2, respectively; pins 1 and 2 of protection diode V4 are connected to pins 12 and 13 of transceiver N2, respectively; pin 3 of protection diode V4 is connected to one end of capacitors C12 and C11; the two ends of resistor R5 are connected to the other ends of capacitors C12 and C11, respectively; one end of resistor R6 is connected to pin 13 of transceiver N2, and the other end is connected to pin 1 of power inductor L12; one end of resistor R8 is connected to pin 12 of transceiver N2, and the other end is connected to pin 2 of power inductor L12.

[0036] In one embodiment of this utility model, the Ethernet module includes a voltage regulator N4, a network port transformer TR1, and TR2;

[0037] Pins 11 to 16 of voltage regulator N4 are connected to pins A36, B7 to B10, and B37 of connector XIA, respectively.

[0038] Pins 19 to 24 of voltage regulator N4 are connected to pins B36, B3 to B6, and A37 of connector XIA, respectively.

[0039] Pins 2 and 3 of the network port transformer TR1 are connected to pins A13 and A12 of connector XIA, respectively; pins 5 and 6 of the network port transformer TR1 are connected to pins A10 and A9 of connector XIA, respectively; pins 8 and 9 of the network port transformer TR1 are connected to pins A7 and A6 of connector XIA, respectively; and pins 11 and 12 of the network port transformer TR1 are connected to pins A3 and A2 of connector XIA, respectively.

[0040] Pins 2 and 3 of the network transformer TR2 are connected to pins 2 and 1 of the voltage regulator N4, respectively; pins 5 and 6 of the network transformer TR2 are connected to pins 55 and 54 of the voltage regulator N4, respectively; pins 8 and 9 of the network transformer TR2 are connected to pins 52 and 51 of the voltage regulator N4, respectively; and pins 11 and 12 of the network transformer TR2 are connected to pins 49 and 48 of the voltage regulator N4, respectively.

[0041] In one embodiment of this utility model, the communication module includes a transceiver N8, resistors R89 to R95, bidirectional diodes V17 and V18, capacitors C96 to C106, and a digital isolator N7.

[0042] Pins 3 to 6 of digital isolator N7 are connected to pin A38 of connector XIA, pin A101 of connector XIB, pin B38 of connector XIA, and pin A102 of connector XIB, respectively; the two ends of capacitors C101 and C102 connected in parallel are connected to pins 1 and 2 of digital isolator N7, respectively; the two ends of capacitors C99 and C100 connected in parallel are connected to pins 16 and 15 of digital isolator N7, respectively; pins 11 to 14 of digital isolator N7 are connected to pins 12, 9, 11, and 10 of transceiver N8, respectively; the two ends of resistor R93 are connected to pins 10 and 11 of digital isolator N7, respectively.

[0043] The two ends of capacitor C96 are connected to pins 15 and 16 of transceiver N8, respectively; the two ends of resistor R89 ​​are connected to pin 2 of bidirectional diode V17 and pin 14 of transceiver N8, respectively; the two ends of resistor R90 are connected to pin 1 of bidirectional diode V17 and pin 13 of transceiver N8, respectively; the two ends of resistor R92 and capacitor C105 connected in parallel are connected to pin 3 of bidirectional diode V17 and pin 13 of transceiver N8, respectively; one end of capacitor C97 is connected to pin 2 of transceiver N8, and the other end is grounded; the two ends of capacitor C98 are connected to... Connect pins 1 and 3 of transceiver N8; connect the two ends of capacitor C103 to pins 4 and 5 of transceiver N8 respectively; connect one end of the parallel connection of capacitor C106 and resistor R95 to pin 8 of transceiver N8, and connect the other end in series with capacitor C104 to pin 6 of transceiver N8; connect the two ends of resistor R91 to pin 7 of transceiver N8 and pin 2 of bidirectional diode V18 respectively; connect the two ends of resistor R94 to pin 8 of transceiver N8 and pin 1 of bidirectional diode V18 respectively; ground pin 3 of bidirectional diode V18.

[0044] This utility model also provides a vehicle in which the aforementioned vehicle monitoring system is integrated.

[0045] Compared with the prior art, the beneficial effects of this utility model are:

[0046] This utility model provides a desktop hardware based on Loongson 2K1000, mainly composed of an embedded core processor circuit board (CPU) and an embedded interface expansion board. First, the CPU is separated into a single module and connected to the interface expansion board via a high-speed connector. This improves the maintainability and stability of the interface expansion board. Second, all functional pins of the CPU are brought out, allowing users to design only the peripheral circuits for the required functions, facilitating functional expansion and effectively reducing the development difficulty and change costs of the maintenance system.

[0047] The operation and maintenance system has a user-friendly human-machine interface. It connects to an LCD screen via an LVDS interface and to a mouse and keyboard via a USB 2.0 interface to enable real-time monitoring, comprehensive control, data management and storage, equipment maintenance, and other functions for vehicle data.

[0048] This utility model mainly designs a core processing board and an interface expansion board. The circuits involved mainly include a power supply circuit, one LVDS circuit and interface, one USB 3.0 circuit and interface, two USB 2.0 circuits and interfaces, one SATA 3.0 circuit and interface, one CAN circuit and interface, two RS232 circuits and interfaces, and two ETH (network) circuits and interfaces. If users have other maintenance interface requirements, they can expand them on the interface expansion board. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of a vehicle monitoring system according to an embodiment of the present utility model.

[0050] Figure 2 This is a schematic diagram of connector XIA according to an embodiment of the present invention.

[0051] Figure 3 This is a schematic diagram of the connector XIB according to an embodiment of the present invention.

[0052] Figure 4(a) , 4(b) This is a schematic diagram of the power module according to an embodiment of the present utility model.

[0053] Figure 5(a) , 5(b) This is a schematic diagram of the LVDS circuit according to an embodiment of the present invention.

[0054] Figure 6(a) , 6(b) This is a schematic diagram of a USB 3.0 module according to an embodiment of the present invention.

[0055] Figure 7 This is a schematic diagram of a USB 2.0 module according to an embodiment of the present invention.

[0056] Figure 8 This is a schematic diagram of the SATA3.0 module according to an embodiment of the present invention.

[0057] Figure 9 This is a schematic diagram of the CAN module according to an embodiment of the present invention.

[0058] Figure 10 This is a schematic diagram of the communication module according to an embodiment of the present utility model.

[0059] Figure 11(a) , 11(b) This is a schematic diagram of the Ethernet module according to an embodiment of the present invention. Detailed Implementation

[0060] To facilitate understanding of the technical solution of this utility model by those skilled in the art, the technical solution of this utility model will now be further described in conjunction with the accompanying drawings.

[0061] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0062] Please see Figure 1 As shown, this utility model provides a vehicle monitoring system, including an interface expansion board 10, and a power module 20, an LVDS circuit module 30, a data transmission module 40, a CAN module 50, a communication module 60, and an Ethernet module 70 connected to the interface expansion board 10. The signal definitions from the core processor circuit board (CPU) of the vehicle monitoring system are led out to the interface of the interface expansion board 10 via connectors XIA and XIB. Compared to traditional circuit frameworks, the advantage of this utility model is that it adopts a modular design, separating the core processor circuit board as a separate module, thus improving the maintainability and stability of the system. Specifically, in this embodiment, connectors XIA and XIB are both of type CQTL-110-01-LDA. Furthermore, the core processor of the CPU on the core processor circuit board is a Loongson 2K1000.

[0063] Please see Figures 1 to 4(b) As shown, in one embodiment of this utility model, the power module 20 includes a MOSFET N3, a fuse F1, a transient voltage suppression diode V5, a diode V7, resistors R34 and R35, and capacitors C25 to C28.

[0064] One end of fuse F1 is connected to the input power supply, and the other end is connected to the D pin of MOSFET N3. One end of transient voltage suppression diode V5 is connected to the D pin of MOSFET N3, and the other end is connected to the cathode of diode V7. The anode of diode V7 is connected to resistor R35 and then to the G pin of MOSFET N3.

[0065] Capacitors C25, C26, C27, and C28 are connected in parallel. One end of the parallel connection is connected to the source (S) pin of MOSFET N3, and the other end is connected to the cathode of diode V7 and grounded. Resistor R34 is connected to the drain (D) pin and source (S) pin of MOSFET N3, respectively. The source (S) pin of MOSFET N3 is connected to the power supply pin of connector XIB.

[0066] In this embodiment, the power module includes DC-DC conversion chips U1 and U2, resistors R36, R38 to R41, R43 to R45, inductors L4 and L5, and capacitors C29 to C48.

[0067] Capacitors C31, C32, and C30 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U1, and the other end grounded. Resistor R38 is connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U1, respectively. Resistor R36 is connected in series with capacitor C29, and resistor R36 and capacitor C29 are also connected to pins 8 and 7 of DC-DC converter chip U1, respectively. Capacitors C34, C35, C36, C37, and C33 are connected in parallel, with one end connected to inductor L4 and connected to the power supply, and the other end grounded. Inductor L4 is also connected to pin 7 of DC-DC converter chip U1. Capacitor C38 is connected to pins 9 and 10 of DC-DC converter chip U1, respectively. Resistor R40 is connected to pins 10 and 11 of DC-DC converter chip U1, respectively. The two ends of resistor R39 are connected to pin 11 and pin 5 of DC-DC converter chip U1, respectively.

[0068] Capacitors C42, C40, and C41 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U2, and the other end grounded. Resistor R43 is connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U2, respectively. Resistor R41 and capacitor C39 are connected in series, and resistor R41 and capacitor C39 are also connected to pins 8 and 7 of DC-DC converter chip U2, respectively. Capacitors C44, C45, C46, ​​C47, and C43 are connected in parallel, with one end connected to inductor L5 and connected to the power supply, and the other end grounded. Inductor L5 is also connected to pin 7 of DC-DC converter chip U2. Capacitor C48 is connected to pins 9 and 10 of DC-DC converter chip U2, respectively. The two ends of resistor R45 are connected to pins 10 and 11 of DC-DC converter chip U2, respectively; the two ends of resistor R44 are connected to pins 11 and 5 of DC-DC converter chip U2, respectively.

[0069] In this embodiment, MOSFET N3 is a YJS4435A, transient voltage suppressor diode V5 is an SMCJ16CAQ, and DC-DC converter chips U1 and U2 are both SCT2280. The interface expansion board 10 is powered by 12V, which is converted to 5.0V and 3.3V by the DC-DC converter chips to power the system's electronic components. In the power supply filtering design, short-circuit protection is provided by fuse F1, voltage regulation is achieved by transient voltage suppressor diode V5, reverse connection protection is provided by MOSFET N3 and transient voltage suppressor diode V5, and high-frequency noise from the power supply is effectively filtered out by decoupling capacitors and bypass capacitors.

[0070] Please see Figures 1 to 3 As shown in Figures 5(a) and 5(b), in one embodiment of the utility model, the LVDS circuit module includes power inductors L15 to L19, positive AND gate logic chips N5 and N6, resistors R85 to R88, capacitors C89 to C95, inductors L12 to L14, and interface X6.

[0071] Power inductor L15 has its pins 2 and 1 connected to pins A71 and A72 of connector XIB, respectively, and its pins 3 and 4 connected to pins 14 and 15 of interface X6, respectively. Power inductor L16 has its pins 2 and 1 connected to pins A75 and A76 of connector XIB, respectively, and its pins 3 and 4 connected to pins 18 and 19 of interface X6, respectively. Power inductor L17 has its pins 2 and 1 connected to pins A73 and A74 of connector XIB, respectively, and its pins 3 and 4 connected to pins 16 and 17 of interface X6, respectively. Power inductor L18 has its pins 2 and 1 connected to pins A78 and A79 of connector XIB, respectively, and its pins 3 and 4 connected to pins 20 and 21 of interface X6, respectively. Pins 2 and 1 of the power inductor L19 are connected to pins A81 and A82 of connector XIB, respectively, and pins 3 and 4 of the power inductor L19 are connected to pins 22 and 23 of interface X6, respectively.

[0072] Capacitors C90 and C91 are connected in parallel, and capacitors C92 and C93 are connected in parallel; the two ends of inductor L12 are connected to one end of capacitors C91 and C92 respectively, and the two ends of inductor L14 are connected to the other end of capacitors C91 and C92 respectively.

[0073] Inductor L13 and capacitor C94 are connected in series. Pins 1 and 2 of the positive AND gate logic chip N5 are connected to one end of resistor R85, and then to connector B79 of connector XIB. The other end of resistor R85 is connected to pin 3 of the positive AND gate logic chip N5 and then grounded. Pin 5 of the positive AND gate logic chip N5 is connected in series with capacitor C89 and then grounded. Pin 4 of the positive AND gate logic chip N5 is connected to pin 12 of interface X6.

[0074] Pins 1 and 2 of the positive AND gate logic chip N6 are connected to one end of resistor R86, and then to connector B83 of connector XIB. The other end of resistor R86 is connected to pin 3 of the positive AND gate logic chip N6 and then grounded. Pin 5 of the positive AND gate logic chip N6 is connected to capacitor C95 in series and then grounded. Pin 4 of the positive AND gate logic chip N6 is connected to pin 11 of interface X6. Resistor R87 is connected to pin 24 of interface X6, and resistor R88 is connected to pin 25 of interface X6.

[0075] In this embodiment, power inductors L15 to L19 are all SDCW2012-2-121TF, and the positive AND gate logic chips N5 and N6 are both N-SGM7SZ08YC5G. An external LCD module is connected to interface X6. By bringing out all the functional pins of the CPU on the core processor circuit board to the interface expansion board 10, users only need to design the peripheral circuits for the required functions to design an LCD module compatible with the LVDS communication protocol. The design is simple and highly compatible.

[0076] Please see Figures 1 to 3 As shown in Figures 6(a) and 6(b), in one embodiment of the utility model, the data transmission module includes a USB 3.0 module, a USB 2.0 module, and a SATA 3.0 module. The USB 3.0 module includes a USB conversion chip N12, a flash memory chip N13, diode arrays V20 and V21, an interface X8, an overcurrent protection chip U5, a resistor R109, and capacitors C149 to C153.

[0077] Pins 4, 5, 7, 8, 10, and 11 of the USB converter chip N12 are connected to pins B81, B82, B64, B65, A64, and A65 of the connector XIB, respectively. Pin 68 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V21 and pin 9 of the interface X8. Pin 67 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V21 and pin 8 of the interface X8.

[0078] Pin 65 of the USB converter chip N12 is connected to pins 5 and 6 of the diode array V20 and pin 6 of the interface X8. Pin 64 of the USB converter chip N12 is connected to pins 4 and 7 of the diode array V20 and pin 5 of the interface X8. Pin 62 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V20 and pin 3 of the interface X8. Pin 61 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V20 and pin 2 of the interface X8.

[0079] Pins 1 and 2 of flash memory chip N13 are connected to pins 17 and 16 of USB converter chip N12, respectively; pins 6 and 5 of flash memory chip N13 are connected to pins 18 and 19 of USB converter chip N12, respectively.

[0080] Capacitors C149 and C150 are connected in parallel, with one end connected to pin 5 of the overcurrent protection chip U5. Resistor R109 is connected to pins 5 and 4 of the overcurrent protection chip U5, respectively. Capacitors C151, C152, and C15 are connected in parallel, with their two ends connected to pins 1 and 2 of the overcurrent protection chip U5, respectively. Pin 3 of the overcurrent protection chip U5 is connected to pin 20 of the USB converter chip N12.

[0081] In this embodiment, the USB conversion chip N12 is model PD720201K8, the flash memory chip N13 is model N-GD25Q16, the diode arrays V20 and V21 are both model RCLAMP0524P-N, and the overcurrent protection chip U5 is model SGM2588AYN5G / TR. The USB 3.0 module provides a PCIe to USB 3.0 conversion solution. By bringing the PCIe pins of the CPU on the core processor circuit board to the interface expansion board 10, users only need to design the peripheral circuits for the required functions to create a communication interface suitable for USB 3.0. The power supply for the USB is provided separately by the overcurrent protection chip U5, effectively protecting external devices. The USB 3.0 interface is mainly used to export the collected historical vehicle data, facilitating vehicle data analysis. It features a simple design and strong compatibility.

[0082] Please see Figures 1 to 3 , Figure 7 As shown, in one embodiment of the utility model, the USB 2.0 module includes an overcurrent protection chip U3, a diode array V16, power inductors L10 and L11, capacitors C79, C80, C81, C85, and C86, and resistors R81 and R83.

[0083] One end of capacitors C79 and C80 connected in parallel is connected to pin 5 of overcurrent protection chip U3. The two ends of resistor R81 are connected to pins 5 and 4 of overcurrent protection chip U3, respectively. The two ends of capacitors C81, C85, and C86 connected in parallel are connected to pins 1 and 2 of overcurrent protection chip U3, respectively. Resistor R83 is connected to pin 3 of overcurrent protection chip U3.

[0084] Pins 1 and 2 of the power inductor L10 are connected to pins B46 and B45 of connector XIA, respectively. Pin 3 of the power inductor L10 is connected to pins 1 and 10 of diode array V16. Pin 4 of the power inductor L10 is connected to pins 2 and 9 of diode array V16.

[0085] Pins 1 and 2 of the power inductor L11 are connected to pins A43 and A42 of connector XIA, respectively. Pin 3 of the power inductor L11 is connected to pins 4 and 7 of diode array V16. Pin 4 of the power inductor L11 is connected to pins 5 and 6 of diode array V16.

[0086] In this embodiment, the overcurrent protection chip U3 is model SGM2588AYN5G / TR, the diode array V16 is model RCLAMP052P-N, and the power inductors L10 and L11 are both model SDCW2012-2-121TF. By bringing out all the functional pins of the CPU on the core processor circuit board to the interface expansion board 10, the user only needs to design the peripheral circuits for the required functions to design a communication interface suitable for USB 2.0. Through the USB 2.0 interface, a mouse, keyboard, etc., can be connected to achieve real-time monitoring, comprehensive control, data management and storage, equipment maintenance, and other functions for vehicle data. The design is simple and highly compatible.

[0087] Please see Figures 1 to 3 , Figure 8 As shown, in one embodiment of the utility model, the SATA 3.0 module includes a hard disk interface X2. Pins 33 and 31 of the hard disk interface X2 are connected to pins A16 and A17 of the connector XIA, respectively. Pins 25 and 33 of the hard disk interface X2 are connected to pins A19 and A20 of the connector XIA, respectively.

[0088] In this embodiment, the hard drive interface X2 is an mSATA. By bringing out all the functional pins of the CPU on the core processor circuit board to the interface expansion board 10, the user only needs to design the peripheral circuitry for the required functions to design a SATA 3.0 interface. A standard mSATA disk is used for installation and connection, and the corresponding mSATA disk can be replaced according to different storage needs. The design is simple and highly compatible. The SATA 3.0 connection to the mSATA disk is mainly used for storing the collected vehicle data.

[0089] Please see Figures 1 to 3 , Figure 9 As shown, in one embodiment of the utility model, the CAN module includes a transceiver N2, a protection diode V4, a power inductor L12, resistors R5 to R8, capacitors C7 to C12, and a Zener diode V3.

[0090] One end of resistor R7 is connected to the cathode of Zener diode V3 and pin A26 of connector XIA. The anode of Zener diode V3 is connected to the power supply. The other end of resistor R7 is connected to pin 5 of transceiver N2. Pin 3 of transceiver N2 is connected to pin A25 of connector XIA.

[0091] The two ends of capacitors C9 and C10 connected in parallel are connected to pins 1 and 2 of transceiver N2, respectively. The two ends of capacitors C8 and C7 connected in parallel are connected to pins 16 and 15 of transceiver N2, respectively. Pins 1 and 2 of protection diode V4 are connected to pins 12 and 13 of transceiver N2, respectively. Pin 3 of protection diode V4 is connected to one end of capacitors C12 and C11. The two ends of resistor R5 are connected to the other ends of capacitors C12 and C11, respectively. One end of resistor R6 is connected to pin 13 of transceiver N2, and the other end is connected to pin 1 of power inductor L12. One end of resistor R8 is connected to pin 12 of transceiver N2, and the other end is connected to pin 2 of power inductor L12. Pins 3 and 4 of power inductor L12 are external ports.

[0092] In this embodiment, the transceiver N2 is model CA-IS3062W, the protection diode V4 is model JPESD1CAN, and the power inductor L12 is model AMCW4532B-2-510T. By bringing out all the functional pins of the CPU on the core processor circuit board to the interface expansion board 10, the user only needs to design the required CAN chip and the peripheral circuit of the transceiver N2 to design a device with CAN communication function, supporting both CAN2.0A and CAN2.0B protocols.

[0093] Please see Figures 1 to 3 , Figure 10 As shown, in one embodiment of the utility model, the communication module includes a transceiver N8, resistors R89 to R95, bidirectional diodes V17 and V18, capacitors C96 to C106, and a digital isolator N7.

[0094] Pins 3 to 6 of digital isolator N7 are connected to pin A38 of connector XIA, pin A101 of connector XIB, pin B38 of connector XIA, and pin A102 of connector XIB, respectively; the two ends of capacitors C101 and C102 connected in parallel are connected to pins 1 and 2 of digital isolator N7, respectively; the two ends of capacitors C99 and C100 connected in parallel are connected to pins 16 and 15 of digital isolator N7, respectively; pins 11 to 14 of digital isolator N7 are connected to pins 12, 9, 11, and 10 of transceiver N8, respectively; and the two ends of resistor R93 are connected to pins 10 and 11 of digital isolator N7, respectively.

[0095] The two ends of capacitor C96 are connected to pins 15 and 16 of transceiver N8, respectively. The two ends of resistor R89 ​​are connected to pin 2 of bidirectional diode V17 and pin 14 of transceiver N8, respectively. The two ends of resistor R90 are connected to pin 1 of bidirectional diode V17 and pin 13 of transceiver N8, respectively. The two ends of resistor R92 and capacitor C105 connected in parallel are connected to pin 3 of bidirectional diode V17 and pin 13 of transceiver N8, respectively. One end of capacitor C97 is connected to pin 2 of transceiver N8, and the other end is grounded. The two ends of capacitor C98 are connected to pins 1 and 3 of transceiver N8, respectively. The two ends of capacitor C103 are connected to pins 4 and 5 of transceiver N8, respectively. One end of capacitor C106 and resistor R95 connected in parallel is connected to pin 8 of transceiver N8, and the other end is connected in series with capacitor C104 and then connected to pin 6 of transceiver N8. The two ends of resistor R91 are connected to pin 7 of transceiver N8 and pin 2 of bidirectional diode V18, respectively. The two ends of resistor R94 are connected to pin 8 of transceiver N8 and pin 1 of bidirectional diode V18, respectively. Pin 3 of bidirectional diode V18 is grounded.

[0096] In this embodiment, the transceiver N8 is a SIT3232EESE, the bidirectional diodes V17 and V18 are both SMC24, and the digital isolator N7 is an N-NSIP8942W1. By bringing out all the functional pins of the CPU on the core processor circuit board to the interface expansion board 10, the user only needs to design the peripheral circuits of the required RS232 chip to design a device with RS232 communication functionality for data exchange via the RS232 interface in the vehicle.

[0097] Please see Figures 1 to 3 As shown in Figures 11(a) and 11(b), in one embodiment of the utility model, the Ethernet module includes a voltage regulator N4, a network port transformer TR1, and TR2.

[0098] Pins 11 to 16 of voltage regulator N4 are connected to pins A36, B7 to B10, and B37 of connector XIA, respectively. Pins 19 to 24 of voltage regulator N4 are connected to pins B36, B3 to B6, and A37 of connector XIA, respectively. Pins 2 and 3 of network adapter TR1 are connected to pins A13 and A12 of connector XIA, respectively.

[0099] Pins 5 and 6 of the network port transformer TR1 are connected to pins A10 and A9 of connector XIA, respectively. Pins 8 and 9 of the network port transformer TR1 are connected to pins A7 and A6 of connector XIA, respectively; pins 11 and 12 of the network port transformer TR1 are connected to pins A3 and A2 of connector XIA, respectively.

[0100] Pins 2 and 3 of the network port transformer TR2 are connected to pins 2 and 1 of the voltage regulator N4, respectively. Pins 5 and 6 of the network port transformer TR2 are connected to pins 55 and 54 of the voltage regulator N4, respectively. Pins 8 and 9 of the network port transformer TR2 are connected to pins 52 and 51 of the voltage regulator N4, respectively. Pins 11 and 12 of the network port transformer TR2 are connected to pins 49 and 48 of the voltage regulator N4, respectively.

[0101] In this embodiment, the voltage regulator N4 is a ZX5201, and the network port transformers TR1 and TR2 are both HR682480E. This embodiment provides a PCIe-to-Gigabit Ethernet chip solution. By bringing the PCIe pins of the CPU on the core processor circuit board to the interface expansion board 10, an Ethernet communication function can be designed, meeting 1000M network adaptive requirements. It also supports the TCP / IP protocol and the IEEE 802.3 standard, and is used to connect to the network switch in the vehicle for data interaction and management.

[0102] Please see Figures 1 to 11(b) As shown, this utility model provides a vehicle in which the aforementioned vehicle monitoring system is integrated.

[0103] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this invention, and no reference numerals in the claims should be construed as limiting the scope of the claims.

[0104] The above-described embodiments are merely examples of implementation methods of the utility model. The scope of protection of this utility model is not limited to the above-described embodiments. For those skilled in the art, several modifications and improvements can be made without departing from the concept of this utility model, and these all fall within the scope of protection of this utility model.

Claims

1. A vehicle monitoring system, characterized in that, It includes an interface expansion board, as well as a power module, LVDS circuit module, data transmission module, CAN module, communication module and Ethernet module connected to the interface expansion board; among them, the signal definitions of the core processor circuit board of the vehicle monitoring system are led out to the interface expansion board interface through connector XIA and connector XIB. The power module includes MOSFET N3, fuse F1, transient voltage suppressor diode V5, diode V7, resistors R34 and R35, and capacitors C25 to C28. One end of fuse F1 is connected to the input power supply, and the other end is connected to the D pin of MOSFET N3. One end of transient voltage suppression diode V5 is connected to the D pin of MOSFET N3, and the other end is connected to the cathode of diode V7. The anode of diode V7 is connected to resistor R35 and then to the G pin of MOSFET N3. After capacitors C25, C26, C27, and C28 are connected in parallel, one end of the parallel connection is connected to the S pin of MOSFET N3, and the other end is connected to the cathode of diode V7 and grounded; the two ends of resistor R34 are connected to the D pin and S pin of MOSFET N3 respectively; and the S pin of MOSFET N3 is connected to the power supply pin port of connector XIB.

2. The vehicle monitoring system according to claim 1, characterized in that, The power module includes DC-DC conversion chips U1 and U2, resistors R36, R38 to R41, R43 to R45, inductors L4 and L5, and capacitors C29 to C48. Capacitors C31, C32, and C30 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U1, and the other end grounded; the two ends of resistor R38 are connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U1, respectively; resistor R36 and capacitor C29 are connected in series, and resistor R36 and capacitor C29 are also connected to pins 8 and 7 of DC-DC converter chip U1, respectively; capacitors C34, C35, ... After C36, C37, and C33 are connected in parallel, one end is connected to inductor L4 and connected to the power supply, and the other end is grounded. Inductor L4 is also connected to pin 7 of DC-DC converter chip U1. The two ends of capacitor C38 are connected to pins 9 and 10 of DC-DC converter chip U1, respectively. The two ends of resistor R40 are connected to pins 10 and 11 of DC-DC converter chip U1, respectively. The two ends of resistor R39 are connected to pins 11 and 5 of DC-DC converter chip U1, respectively. Capacitors C42, C40, and C41 are connected in parallel, with one end connected to the power supply pin of connector XIB and pin 1 of DC-DC converter chip U2, and the other end grounded; the two ends of resistor R43 are connected to the power supply pin of connector XIB and pin 12 of DC-DC converter chip U2, respectively; resistor R41 and capacitor C39 are connected in series, and resistor R41 and capacitor C39 are also connected to pins 8 and 7 of DC-DC converter chip U2, respectively; capacitors C44, C45, ... After C46, ​​C47, and C43 are connected in parallel, one end is connected to inductor L5 and connected to the power supply, and the other end is grounded. Inductor L5 is also connected to pin 7 of DC-DC converter chip U2. The two ends of capacitor C48 are connected to pins 9 and 10 of DC-DC converter chip U2, respectively. The two ends of resistor R45 are connected to pins 10 and 11 of DC-DC converter chip U2, respectively. The two ends of resistor R44 are connected to pins 11 and 5 of DC-DC converter chip U2, respectively.

3. The vehicle monitoring system according to claim 1, characterized in that, The LVDS circuit module includes power inductors L15 to L19, positive AND gate logic chips N5 and N6, resistors R85 to R88, capacitors C89 to C95, inductors L12 to L14, and interface X6. Pins 2 and 1 of power inductor L15 are connected to pins A71 and A72 of connector XIB, respectively; pins 3 and 4 of power inductor L15 are connected to pins 14 and 15 of interface X6, respectively. Pins 2 and 1 of power inductor L16 are connected to pins A75 and A76 of connector XIB, respectively; pins 3 and 4 of power inductor L16 are connected to pins 18 and 19 of interface X6, respectively. Pins 2 and 1 of power inductor L17 are connected to pins A73 and A74 of connector XIB, respectively; pins 3 and 4 of power inductor L16 are connected to pins 16 and 17 of interface X6, respectively. Pins 2 and 1 of the power inductor L18 are connected to pins A78 and A79 of connector XIB, respectively, and pins 3 and 4 of the power inductor L18 are connected to pins 20 and 21 of interface X6, respectively. Pins 2 and 1 of power inductor L19 are connected to pins A81 and A82 of connector XIB, respectively, and pins 3 and 4 of power inductor L19 are connected to pins 22 and 23 of interface X6, respectively. Capacitors C90 and C91 are connected in parallel, and capacitors C92 and C93 are connected in parallel; the two ends of inductor L12 are connected to one end of capacitors C91 and C92 respectively, and the two ends of inductor L14 are connected to the other end of capacitors C91 and C92 respectively. Inductor L13 is connected in series with capacitor C94; pins 1 and 2 of the positive AND gate logic chip N5 are connected to one end of resistor R85 and then to connector B79 of connector XIB; the other end of resistor R85 is connected to pin 3 of the positive AND gate logic chip N5 and then grounded; pin 5 of the positive AND gate logic chip N5 is connected in series with capacitor C89 and then grounded; pin 4 of the positive AND gate logic chip N5 is connected to pin 12 of interface X6. Pins 1 and 2 of the positive AND gate logic chip N6 are connected to one end of resistor R86 and then to B83 of connector XIB. The other end of resistor R86 is connected to pin 3 of the positive AND gate logic chip N6 and then grounded. Pin 5 of the positive AND gate logic chip N6 is connected in series with capacitor C95 and then grounded. Pin 4 of the positive AND gate logic chip N6 is connected to pin 11 of interface X6. Resistor R87 is connected to pin 24 of interface X6, and resistor R88 is connected to pin 25 of interface X6.

4. The vehicle monitoring system according to claim 1, characterized in that, The data transmission module includes a USB 3.0 module; wherein the USB 3.0 module includes a USB conversion chip N12, a flash memory chip N13, diode arrays V20 and V21, an interface X8, an overcurrent protection chip U5, a resistor R109, and capacitors C149 to C153; Pins 4, 5, 7, 8, 10, and 11 of the USB converter chip N12 are connected to pins B81, B82, B64, B65, A64, and A65 of the connector XIB, respectively; pin 68 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V21 and pin 9 of the interface X8; pin 67 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V21 and pin 8 of the interface X8. Pin 65 of the USB converter chip N12 is connected to pins 5 and 6 of the diode array V20 and pin 6 of the interface X8; pin 64 of the USB converter chip N12 is connected to pins 4 and 7 of the diode array V20 and pin 5 of the interface X8; pin 62 of the USB converter chip N12 is connected to pins 2 and 9 of the diode array V20 and pin 3 of the interface X8; pin 61 of the USB converter chip N12 is connected to pins 1 and 10 of the diode array V20 and pin 2 of the interface X8. Pins 1 and 2 of flash memory chip N13 are connected to pins 17 and 16 of USB converter chip N12, respectively; pins 6 and 5 of flash memory chip N13 are connected to pins 18 and 19 of USB converter chip N12, respectively. After capacitors C149 and C150 are connected in parallel, one end is connected to pin 5 of overcurrent protection chip U5; the two ends of resistor R109 are connected to pins 5 and 4 of overcurrent protection chip U5 respectively; the two ends of capacitors C151, C152 and C15 are connected in parallel and connected to pins 1 and 2 of overcurrent protection chip U5 respectively; pin 3 of overcurrent protection chip U5 is connected to pin 20 of USB conversion chip N12.

5. The vehicle monitoring system according to claim 1, characterized in that, The data transmission module includes a USB 2.0 module; the USB 2.0 module includes an overcurrent protection chip U3, a diode array V16, power inductors L10 and L11, capacitors C79, C80, C81, C85, and C86, and resistors R81 and R83. One end of capacitors C79 and C80 connected in parallel is connected to pin 5 of overcurrent protection chip U3; the two ends of resistor R81 are connected to pins 5 and 4 of overcurrent protection chip U3, respectively; the two ends of capacitors C81, C85, and C86 connected in parallel are connected to pins 1 and 2 of overcurrent protection chip U3, respectively; resistor R83 is connected to pin 3 of overcurrent protection chip U3. Pins 1 and 2 of power inductor L10 are connected to pins B46 and B45 of connector XIA, respectively; pin 3 of power inductor L10 is connected to pins 1 and 10 of diode array V16; and pin 4 of power inductor L10 is connected to pins 2 and 9 of diode array V16. Pins 1 and 2 of the power inductor L11 are connected to pins A43 and A42 of connector XIA, respectively. Pin 3 of the power inductor L11 is connected to pins 4 and 7 of diode array V16. Pin 4 of the power inductor L11 is connected to pins 5 and 6 of diode array V16.

6. The vehicle monitoring system according to claim 1, characterized in that, The data transmission module includes a SATA3.0 module; the SATA3.0 module includes a hard disk interface X2; pins 33 and 31 of the hard disk interface X2 are connected to pins A16 and A17 of connector XIA, respectively; pins 25 and 33 of the hard disk interface X2 are connected to pins A19 and A20 of connector XIA, respectively.

7. The vehicle monitoring system according to claim 1, characterized in that, The CAN module includes a transceiver N2, a protection diode V4, a power inductor L12, resistors R5 to R8, capacitors C7 to C12, and a Zener diode V3. One end of resistor R7 is connected to the cathode of Zener diode V3 and pin A26 of connector XIA. The anode of Zener diode V3 is connected to the power supply. The other end of resistor R7 is connected to pin 5 of transceiver N2. Pin 3 of transceiver N2 is connected to pin A25 of connector XIA. The two ends of capacitors C9 and C10 connected in parallel are connected to pins 1 and 2 of transceiver N2, respectively; the two ends of capacitors C8 and C7 connected in parallel are connected to pins 16 and 15 of transceiver N2, respectively; pins 1 and 2 of protection diode V4 are connected to pins 12 and 13 of transceiver N2, respectively; pin 3 of protection diode V4 is connected to one end of capacitors C12 and C11; the two ends of resistor R5 are connected to the other ends of capacitors C12 and C11, respectively; one end of resistor R6 is connected to pin 13 of transceiver N2, and the other end is connected to pin 1 of power inductor L12; one end of resistor R8 is connected to pin 12 of transceiver N2, and the other end is connected to pin 2 of power inductor L12.

8. The vehicle monitoring system according to claim 1, characterized in that, The Ethernet module includes voltage regulator N4, network port transformers TR1 and TR2; Pins 11 to 16 of voltage regulator N4 are connected to pins A36, B7 to B10, and B37 of connector XIA, respectively. Pins 19 to 24 of voltage regulator N4 are connected to pins B36, B3 to B6, and A37 of connector XIA, respectively. Pins 2 and 3 of the network port transformer TR1 are connected to pins A13 and A12 of connector XIA, respectively; pins 5 and 6 of the network port transformer TR1 are connected to pins A10 and A9 of connector XIA, respectively; pins 8 and 9 of the network port transformer TR1 are connected to pins A7 and A6 of connector XIA, respectively; and pins 11 and 12 of the network port transformer TR1 are connected to pins A3 and A2 of connector XIA, respectively. Pins 2 and 3 of the network transformer TR2 are connected to pins 2 and 1 of the voltage regulator N4, respectively; pins 5 and 6 of the network transformer TR2 are connected to pins 55 and 54 of the voltage regulator N4, respectively; pins 8 and 9 of the network transformer TR2 are connected to pins 52 and 51 of the voltage regulator N4, respectively; and pins 11 and 12 of the network transformer TR2 are connected to pins 49 and 48 of the voltage regulator N4, respectively.

9. The vehicle monitoring system according to claim 1, characterized in that, The communication module includes transceiver N8, resistors R89 to R95, bidirectional diodes V17 and V18, capacitors C96 to C106, and digital isolator N7. Pins 3 to 6 of digital isolator N7 are connected to pin A38 of connector XIA, pin A101 of connector XIB, pin B38 of connector XIA, and pin A102 of connector XIB, respectively; the two ends of capacitors C101 and C102 connected in parallel are connected to pins 1 and 2 of digital isolator N7, respectively; the two ends of capacitors C99 and C100 connected in parallel are connected to pins 16 and 15 of digital isolator N7, respectively; pins 11 to 14 of digital isolator N7 are connected to pins 12, 9, 11, and 10 of transceiver N8, respectively; the two ends of resistor R93 are connected to pins 10 and 11 of digital isolator N7, respectively. The two ends of capacitor C96 are connected to pins 15 and 16 of transceiver N8, respectively; the two ends of resistor R89 ​​are connected to pin 2 of bidirectional diode V17 and pin 14 of transceiver N8, respectively; the two ends of resistor R90 are connected to pin 1 of bidirectional diode V17 and pin 13 of transceiver N8, respectively; the two ends of resistor R92 and capacitor C105 connected in parallel are connected to pin 3 of bidirectional diode V17 and pin 13 of transceiver N8, respectively; one end of capacitor C97 is connected to pin 2 of transceiver N8, and the other end is grounded; the two ends of capacitor C98 are connected to... Connect pins 1 and 3 of transceiver N8; connect the two ends of capacitor C103 to pins 4 and 5 of transceiver N8 respectively; connect one end of the parallel connection of capacitor C106 and resistor R95 to pin 8 of transceiver N8, and connect the other end in series with capacitor C104 to pin 6 of transceiver N8; connect the two ends of resistor R91 to pin 7 of transceiver N8 and pin 2 of bidirectional diode V18 respectively; connect the two ends of resistor R94 to pin 8 of transceiver N8 and pin 1 of bidirectional diode V18 respectively; ground pin 3 of bidirectional diode V18.

10. A vehicle, characterized in that, The vehicle is equipped with a vehicle monitoring system as described in any one of claims 1-9.

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