Display panel and display device

Abstract

The utility model discloses a display panel and a display device, relates to the technical field of display, and can reduce the power consumption of a display screen. The display panel includes a substrate layer; the driving layer is arranged on one side of the substrate layer, and the driving layer comprises a plurality of pixel unit circuits and a plurality of first power supply signal lines; the pixel unit circuit comprises a plurality of sub-pixel circuits, and different types of sub-pixel circuits in the pixel unit circuit are used for driving sub-pixels with different colors to emit light; the plurality of first power supply signal lines are divided into at least two types, and the first power supply signal lines of different types are used for transmitting first power supply signals of different values; the different types of first power supply signal lines are electrically connected with different types of sub-pixel circuits in the pixel unit circuit.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Currently, with the increasing market share of OLED (Organic Light Emitting Display), screen power consumption has become a crucial indicator for evaluating displays. AMOLED (Active-matrix organic light-emitting diode) display power consumption is generally divided into circuit power consumption and light-emitting device power consumption. However, with advancements in device materials, device power consumption is decreasing year by year, while circuit power consumption accounts for an increasingly larger proportion of total power consumption. Therefore, reducing circuit power consumption is urgently needed. However, based on current driving methods for light-emitting devices, there are significant bottlenecks in reducing circuit power consumption. Utility Model Content

[0003] This application provides a display panel and display device that can reduce the driving power consumption of the display screen driving circuit.

[0004] A first aspect of this application provides a display panel, including:

[0005] Substrate layer;

[0006] A driving layer is disposed on one side of the substrate layer, and the driving layer includes multiple pixel unit circuits and multiple first power signal lines;

[0007] The pixel unit circuit includes multiple sub-pixel circuits, and different types of sub-pixel circuits in the pixel unit circuit are used to drive the emitted light of sub-pixels of different colors.

[0008] The multiple first power signal lines are divided into at least two types, and the different types of first power signal lines are used to transmit first power signals of different values.

[0009] Different types of first power signal lines are electrically connected to different types of sub-pixel circuits in the pixel unit circuit.

[0010] In some embodiments, sub-pixel circuits of the same type from different pixel unit circuits are electrically connected to the same type of first power signal line; and / or,

[0011] The pixel unit circuit contains two different types of sub-pixel circuits that are electrically connected to the same type of first power signal line.

[0012] In some embodiments, the plurality of pixel unit circuits include a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit;

[0013] The multiple first power signal lines include first type power signal lines, second type power signal lines, and third type power signal lines;

[0014] The first type of power signal line is electrically connected to the first sub-pixel circuit, the second type of power signal line is electrically connected to the second sub-pixel circuit, and the third type of power signal line is electrically connected to the third sub-pixel circuit.

[0015] In some embodiments, the plurality of pixel unit circuits include a red sub-pixel circuit, a blue sub-pixel circuit, and a green sub-pixel circuit;

[0016] The multiple first power signal lines include first type power signal lines and second type power signal lines;

[0017] The first type of power signal line is electrically connected to the red sub-pixel circuit and the green sub-pixel circuit; and / or,

[0018] The second type of power signal line is electrically connected to the blue sub-pixel circuit.

[0019] In some embodiments, the display panel further includes:

[0020] Multiple first power signal connection lines are provided, and the sub-pixel circuit is electrically connected to the first power signal connection lines through the first power signal lines.

[0021] Based on the different types of first power signal lines connected, the multiple first power signal connection lines are divided into at least two types;

[0022] The number of types of the first power signal connection line is the same as the number of types of the first power signal line.

[0023] In some embodiments, the length extension direction of the first power signal line intersects with the length extension direction of the first power signal connection line.

[0024] In some embodiments, the display panel further includes:

[0025] Multiple signal line connection structure;

[0026] Multiple first power lines, wherein the first power lines are electrically connected to the first power signal connection line through the signal line connection structure;

[0027] Based on the different types of first power signal connection lines, the connection structures of the multiple signal lines are divided into at least two types;

[0028] The number of types of signal line connection structures is the same as the number of types of the first power signal connection lines;

[0029] And / or,

[0030] Based on the signal line connection structures that connect different types of signals, the multiple first power lines are divided into at least two types;

[0031] The number of types of the first power line is the same as the number of types of the signal line connection structure.

[0032] In some embodiments, the signal line connection structure includes a first connection portion and a second connection portion, wherein the dimension of the first connection portion in a first direction is larger than the dimension of the second connection portion in the first direction, and the first direction is the length extension direction of the first power signal connection line;

[0033] The second connection part is electrically connected to the first power signal connection line, and the first connection part is electrically connected to the first power line.

[0034] In some embodiments, the orthographic projection shapes of the first connection portion and the second connection portion on the substrate layer include polygons.

[0035] In some implementations, one first power signal connection line connects multiple first power signal connection lines of the same type; and / or,

[0036] A first power line is connected to a first power signal line of the same type via the signal connection line structure.

[0037] In some embodiments, the display panel further includes:

[0038] Multiple first power jumpers are provided, and multiple signal line connection structures of the same type are connected to the same first power line through multiple first power jumpers.

[0039] Based on the signal line connection structures that connect different types of signals, the multiple first power jumpers are divided into at least two types;

[0040] The number of types of the first power jumper wire is the same as the number of types of the first power line; and / or,

[0041] The number of types of the first power jumper wire is the same as the number of types of the signal line connection structure.

[0042] In some embodiments, multiple first power signal lines are arranged at equal intervals; and / or,

[0043] Multiple first power signal connection lines are arranged at equal intervals; and / or,

[0044] Multiple signal line connection structures are arranged at equal intervals; and / or,

[0045] Multiple first power lines are arranged at equal intervals; and / or,

[0046] Multiple first power supply jumpers are arranged at equal intervals.

[0047] In some embodiments, the display panel includes a display area and a non-display area, the non-display area surrounding the display area;

[0048] The non-display area includes a first area, a second area, and a third area, wherein the first area is located close to the display area, and the second area is located between the first area and the third area;

[0049] The first power signal line is located in the first area;

[0050] The first power signal connection line and the signal line connection structure are disposed in the second region;

[0051] The first power cord is disposed in the third region, and the display panel corresponding to the second region is bent so that the display panel corresponding to the third region is located on the side of the display panel away from the display side in the display area.

[0052] In some embodiments, the display panel further includes:

[0053] A blocking post is disposed on the side of the substrate layer away from the driving layer, located in the second region;

[0054] The driving layer includes at least one organic insulating layer, the organic insulating layer is provided with a plurality of clearance areas, the clearance areas are provided in the second region, and the organic insulating layer in the clearance areas is hollowed out.

[0055] There is no overlap between the multiple clearance areas, and at least one clearance area is provided between different types of first power signal connection lines;

[0056] The orthogonal projection of the barrier post onto the substrate layer covers the clearance area.

[0057] In some embodiments, the organic insulating layer includes a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer, wherein the first organic insulating layer is disposed on the side of the driving layer away from the substrate layer, and the second organic insulating layer is disposed between the first organic insulating layer and the third organic insulating layer;

[0058] In the non-display area, the orthographic projection of the first organic insulating layer on the substrate layer at least partially overlaps with the orthographic projection of the second organic insulating layer on the substrate layer;

[0059] In the non-display area, the orthographic projection of the second organic insulating layer on the substrate layer at least partially overlaps with the orthographic projection of the third organic insulating layer on the substrate layer.

[0060] A second aspect of this application provides a display device, comprising:

[0061] The display panel as described in the first aspect.

[0062] This application provides a display panel with multiple pixel unit circuits electrically connected to multiple first power signal lines. Based on the different colored sub-pixel circuits in the multiple pixel unit circuits, the multiple first power signal lines are divided into at least two types, so that different types of first power signal lines are electrically connected to the different colored sub-pixels in the pixel unit. One power signal line can connect to two colored sub-pixel circuits or to one colored sub-pixel circuit. Different colored sub-pixel circuits are connected to at least two types of first power signal lines to achieve separate driving of the power signals of different colored sub-pixels. At the same time, the values ​​of the first power signals received by different types of sub-pixel circuits are different. The corresponding values ​​of the first power signals can be provided according to the actual driving voltage required by the sub-pixel circuits, reducing the voltage difference between the anode and cathode signals received by different colored sub-pixels, thereby reducing the power consumption waste caused by large voltage differences in different colored sub-pixels due to the same voltage value, and thus reducing the display power consumption of the display screen. Attached Figure Description

[0063] Figure 1 A schematic partial cross-sectional view of a display panel provided in an embodiment of this application;

[0064] Figure 2 A schematic partial top view of a display panel provided in an embodiment of this application;

[0065] Figure 3 A schematic partial top view of another display panel provided in an embodiment of this application;

[0066] Figure 4 A schematic partial top view of another display panel provided in an embodiment of this application;

[0067] Figure 5 A schematic partial top view of another display panel provided in an embodiment of this application;

[0068] Figure 6 A schematic partial top view of a display panel provided in an embodiment of this application;

[0069] Figure 7 A schematic partial top view of another display panel provided in an embodiment of this application;

[0070] Figure 8 A schematic partial top view of another display panel provided in an embodiment of this application;

[0071] Figure 9 A schematic partial top view of another display panel provided in an embodiment of this application;

[0072] Figure 10 A schematic partial cross-sectional view of another display panel provided in an embodiment of this application;

[0073] Figure 11 A schematic partial top view of a display panel provided in an embodiment of this application;

[0074] Figure 12 A schematic partial top view of another display panel provided in an embodiment of this application;

[0075] Figure 13 This application provides a schematic circuit diagram of a display panel.

[0076] Figure 14 A schematic partial structural diagram of another display panel provided in an embodiment of this application;

[0077] Figure 15 A schematic partial top view of another display panel provided in an embodiment of this application;

[0078] Figure 16 A schematic partial top view of a display panel provided in an embodiment of this application;

[0079] Figure 17 A schematic structural diagram of a display device provided in an embodiment of this application;

[0080] Figure 18 A schematic structural diagram of another display device provided in the embodiments of this application;

[0081] Figure 19 This is a top view of a display device provided in an embodiment of this application. Detailed Implementation

[0082] To better understand the technical solutions provided in the embodiments of this specification, the technical solutions of the embodiments of this specification will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0083] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The term "two or more" includes two or more cases.

[0084] Currently, as OLED's market share increases, screen power consumption has become a crucial indicator for evaluating displays. AMOLED display power consumption is generally divided into circuit power consumption and light-emitting device power consumption. However, with advancements in device materials, device power consumption is decreasing year by year, while circuit power consumption accounts for an increasingly larger proportion of total power consumption. Therefore, reducing circuit power consumption is urgently needed. Based on current driving methods for light-emitting devices, reducing circuit power consumption faces significant bottlenecks.

[0085] Typically, the power supply signal and cathode signal of a pixel design are fixed values. Since the light-emitting devices driven by the pixel circuits of different colors require different driving voltage ranges, when the voltage across the power supply signal and cathode signal of the red, green and blue sub-pixels remains unchanged, the voltage value of the signal required for the saturation region of the red or green sub-pixels is higher than that of the blue pixels, which can easily lead to wasted power consumption of the blue pixels.

[0086] In view of this, embodiments of this application provide a display panel and a display device that can reduce the power consumption of the display screen.

[0087] A first aspect of this application is to provide a display panel. Figure 1 This is a schematic partial cross-sectional view of a display panel provided in an embodiment of this application. Figure 2 This is a schematic partial top view of a display panel provided in an embodiment of this application. Figure 3A schematic partial top view of another display panel provided in an embodiment of this application.

[0088] For example, such as Figure 1 As shown, the display panel includes a substrate layer 100 and a driving layer 200. The driving layer 200 is disposed on one side of the substrate layer 100, and multiple pixel unit circuits and multiple first power signal lines are disposed within the driving layer. The multiple pixel unit circuits may include multiple sub-pixel circuits, and different types of sub-pixel circuits in the pixel unit circuits can be used to drive the emitted light from sub-pixels of different colors. A sub-pixel circuit may include a red sub-pixel circuit R, a green sub-pixel circuit G, and a blue sub-pixel circuit B, where a red sub-pixel circuit R, a green sub-pixel circuit G, and a blue sub-pixel circuit B constitute a pixel unit circuit. Based on the different colored sub-pixel circuits connected, the multiple first power signal lines can be divided into two types: one type of first power signal line electrically connects to a sub-pixel circuit of one color, and the other type of first power signal line can connect to sub-pixel circuits of two colors. Two different colored sub-pixel circuits electrically connected to the same first power signal line will receive different values ​​of the first power signal. First power signal lines transmitting different first power signals can electrically connect sub-pixel circuits of different colors, so the values ​​of the first power signals received by the sub-pixel circuits of different colors can be different. Therefore, multiple first power signal lines can be divided into two scenarios: one type of sub-pixel circuit receives one first power signal, and two types of sub-pixel circuits receive the same first power signal. The value of the first power signal can be a voltage value or a current value, etc. Different types of first power signal lines can provide corresponding values ​​of first power signals according to the first power signal requirements of the connected different color sub-pixels, driving the power signals of different color sub-pixels separately to avoid multiple different color sub-pixels sharing the same value of the first power signal, thus preventing wasted sub-pixel power consumption.

[0089] For example, such as Figure 2As shown, the pixel unit circuit 201 includes a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit. The first sub-pixel circuit can be a red sub-pixel circuit R, the second sub-pixel circuit can be a green sub-pixel circuit G, and the third sub-pixel circuit can be a blue sub-pixel circuit B. The first power signal line can include a first type of power signal line S1 and a second type of power signal line S2. The first type of power signal line S1 is electrically connected to the red sub-pixel circuit R and the green sub-pixel circuit G, and can simultaneously provide a first power signal to both the red and green sub-pixels. The second type of power signal line S2 is electrically connected to the blue sub-pixel circuit B, and provides a first power signal to the blue sub-pixel. The voltage or current value transmitted by the first type of power signal line S1 is different from the voltage or current value transmitted by the second type of power signal line S2. By transmitting different values ​​of first power signals to different types of sub-pixel circuits using different types of first power signals, independent driving of different types of sub-pixel circuits can be achieved. At the same time, the values ​​of the first power signals received by different types of sub-pixel circuits are different. According to the actual driving power requirements of different types of sub-pixel circuits, the corresponding values ​​of the first power signals are provided, reducing the voltage difference between the anode and cathode signals received by different color sub-pixels, thereby reducing power loss caused by unnecessary large voltage differences and reducing the display power consumption of the screen.

[0090] For example, such as Figure 3 As shown, the first power signal line may also include a first type of power signal line S1, a second type of power signal line S2, and a third type of power signal line S3. The first type of power signal line S1 is electrically connected to the red sub-pixel circuit R, providing a first power signal to the R sub-pixel. The second type of power signal line S2 is electrically connected to the green sub-pixel circuit G, providing a first power signal to the G sub-pixel. The third type of power signal line S3 is electrically connected to the blue sub-pixel circuit B, providing a first power signal to the B sub-pixel. The voltage or current values ​​of the first power signal transmitted by the first type of power signal line S1, the second type of power signal line S2, and the third type of power signal line S3 are all different. By transmitting different values ​​of first power signals to different types of sub-pixel circuits through different types of first power signal lines, independent driving of different types of sub-pixel circuits can be achieved. At the same time, the values ​​of the first power signals received by different types of sub-pixel circuits are different. According to the actual driving power requirements of different types of sub-pixel circuits, the corresponding values ​​of the first power signals are provided, reducing the voltage difference between the anode and cathode signals received by different color sub-pixels, thereby reducing the power loss caused by unnecessary large voltage differences and reducing the display power consumption of the screen.

[0091] This application provides a display panel with multiple pixel unit circuits electrically connected to multiple first power signal lines. Based on the different colored sub-pixel circuits in the multiple pixel unit circuits, the multiple first power signal lines are divided into at least two types, so that different types of first power signal lines are electrically connected to the different colored sub-pixels in the pixel unit. One power signal line can connect to two colored sub-pixel circuits or to one colored sub-pixel circuit. Different colored sub-pixel circuits are connected to at least two types of first power signal lines to achieve separate driving of the power signals of different colored sub-pixels. At the same time, the values ​​of the first power signals received by different sub-pixel circuits are different. The first power signal with the corresponding value can be provided according to the actual driving voltage required by the sub-pixel circuit, reducing the voltage difference between the anode and cathode signals received by different colored sub-pixels, thereby reducing the power consumption waste caused by the large voltage difference in different colored sub-pixels due to the same voltage difference, and thus reducing the display power consumption of the display screen.

[0092] In some implementations, sub-pixel circuits of the same type in different pixel unit circuits are electrically connected to a first power signal line of the same type. The sub-pixel circuits of the same type can be sub-pixel circuits used to drive sub-pixels of the same color to emit light, and the first power signal line of the same type can be a power signal line connected to the sub-pixel circuits of the same color.

[0093] For example, the red sub-pixel circuit is electrically connected to the same type of first power signal line, the green sub-pixel is electrically connected to the same type of first power signal line, and the blue sub-pixel is electrically connected to the same type of first power signal line.

[0094] In some implementations, the pixel unit circuit contains two different types of sub-pixel circuits electrically connected to the same type of first power signal line. These two different types of sub-pixel circuits connected to the same type of first power signal line can be a red sub-pixel circuit and a green sub-pixel circuit, a red sub-pixel circuit and a blue sub-pixel circuit, or a green sub-pixel circuit and a blue sub-pixel circuit. The connection can be configured to adapt to different pixel circuit wiring and driving requirements.

[0095] It should be noted that the first power signal lines connected to the sub-pixel circuits in two adjacent pixel unit circuits can be of the same type or different.

[0096] For example, in the first pixel unit circuit, three sub-pixel circuits of different colors are electrically connected to two first power signals. Any two sub-pixels of different colors are electrically connected to the same type of first power signal, while the third sub-pixel is electrically connected to a different type of first power signal line. In the second pixel unit circuit, which is adjacent to the first pixel unit circuit, three sub-pixel circuits of different colors are electrically connected to three different types of first power signals, with each sub-pixel electrically connected to a different type of first power signal line.

[0097] For example, in the first pixel unit circuit, three sub-pixel circuits of different colors are electrically connected to two first power signals. Any two sub-pixels of different colors are electrically connected to the same type of first power signal, while the third sub-pixel is electrically connected to a different type of first power signal. Similarly, in the second pixel unit circuit adjacent to the first pixel unit circuit, the three sub-pixel circuits can also be electrically connected to two first power signals. Any two sub-pixels of different colors in the second pixel unit circuit are electrically connected to the same type of first power signal, while the third sub-pixel is electrically connected to a different type of first power signal.

[0098] For example, the three sub-pixel circuits of different colors in the first pixel unit circuit are electrically connected to three different first power signals, with each sub-pixel electrically connected to a first power signal line. Similarly, the three sub-pixel circuits of different colors in the second pixel unit circuit adjacent to the first pixel unit circuit can also be electrically connected to the three different first power signals, with each sub-pixel electrically connected to a first power signal line. By configuring the connection method between the sub-pixel circuits and the first power signals in adjacent pixel unit circuits, a uniform routing design for the power signal lines can be achieved, while simultaneously allowing for separate driving of different types of sub-pixel circuits, thus reducing driving power consumption.

[0099] In some embodiments, the display panel further includes multiple first power signal connection lines, and the sub-pixel circuit is electrically connected to the first power signal connection lines via the first power signal lines. Multiple first power signal lines of the same type can be electrically connected to the same first power signal connection line. Based on connecting different types of first power signal lines, the multiple first power signal connection lines can be divided into at least two types. The number of types of first power signal connection lines is the same as the number of types of first power signal lines, to achieve a uniform routing design of signal lines in the pixel circuit.

[0100] Figure 4 A schematic partial top view of another display panel provided in an embodiment of this application. Exemplary, such as... Figure 4As shown, the multiple first power signal connection lines include two types: a first type power signal connection line S11 and a second type power signal connection line S12. These multiple first power signal connection lines are disposed on the same layer as the second source / drain electrode layer. The red sub-pixel circuit R and the green sub-pixel circuit G can be electrically connected to the first type power signal connection line S11 via the first type power signal line S11, which can simultaneously provide power signals to both the red and green sub-pixels. The blue sub-pixel circuit B can be electrically connected to the second type power signal connection line S12 via the second type power signal line S2, which provides power signals to the blue sub-pixel. Two sub-pixel circuits of different colors can be electrically connected to a first power signal line of the same type. Multiple first power signal lines of the same type are electrically connected to the same first power signal connection line to achieve separate driving of different types of sub-pixels, thereby achieving different display effects.

[0101] Figure 5 A schematic partial top view of another display panel provided in an embodiment of this application. Exemplary, such as... Figure 5 As shown, the first power signal connection line includes three types: a first-type power signal connection line S11, a second-type power signal connection line S12, and a third-type power signal connection line S13. The red sub-pixel circuit R is electrically connected to the first-type power signal connection line S11 via the first-type power signal line S11; the green sub-pixel circuit G is electrically connected to the second-type power signal connection line S12 via the second-type power signal line S2; and the blue sub-pixel circuit B is electrically connected to the third-type power signal connection line S13 via the third-type power signal line S3. Multiple sub-pixels of the same color are electrically connected to multiple first-type power signal lines of the same type. Multiple first-type power signal lines of the same type can be electrically connected to a single first-type power signal connection line to reduce the space occupied by the first power signal connection line and achieve a uniform routing design of signal lines in the pixel circuit.

[0102] In some embodiments, the length direction of the first power signal line intersects the length direction of the first power signal connection line. The length extension direction of the first power signal line is a first direction X, and the length extension direction of the first power signal connection line is a second direction Y. The first direction X and the second direction Y are perpendicular. The first power signal line in the first direction X intersects the first power signal connection line in the second direction Y. The intersection point of the first power signal line and the first power signal connection line is the via location where the first power signal line and the first power signal connection line are located in the film layer. There can be multiple vias at the via location to avoid the phenomenon of weak overlap between the first power signal line and the first power signal connection line. There is no overlap between the vias of different types of first power signal lines and first power signal connection lines to avoid crosstalk caused by multiple connection holes triggering control simultaneously.

[0103] In some implementations, multiple first power signal lines are arranged at equal intervals from left to right along a first direction X, and multiple first power signal connection lines are arranged at equal intervals from top to bottom along a second direction X, so as to achieve a uniform routing design of signal lines in the pixel circuit.

[0104] In some embodiments, the display panel further includes multiple signal line connection structures and multiple first power lines, the first power lines being electrically connected to first power signal connection lines via the signal line connection structures. Based on the different types of first power signal connection lines being connected, the multiple signal line connection structures are divided into at least two types.

[0105] Figure 6 This is a schematic partial top view of a display panel provided in an embodiment of this application. For example, as shown... Figure 6 As shown, the multiple signal line connection structures include two types: a first type signal line connection structure K1 and a second type signal line connection structure K2. The first type signal line connection structure K1 is electrically connected to a first type power signal connection line S11, which in turn is electrically connected to a first type power signal line S1. The first type power signal line S1 connects two sub-pixel circuits of different colors, which can be a red sub-pixel circuit R and a green sub-pixel circuit G. The second type signal line connection structure K2 is electrically connected to a second type power signal connection line S12, which in turn is electrically connected to a second type power signal line S2. The second type power signal line S2 connects to a blue sub-pixel circuit B. A single power signal connection line of the same type can connect multiple signal line connection structures of the same type, reducing the space occupied by the first power signal connection line, saving wiring space, and achieving a uniform routing design for signal lines in the pixel circuit.

[0106] Figure 7 A schematic partial top view of another display panel provided in an embodiment of this application. Exemplary, such as... Figure 7As shown, the signal line connection structures include three types: Type 1 signal line connection structure K1, Type 2 signal line connection structure K2, and Type 3 signal line connection structure K3. Type 1 signal line connection structure K1 is electrically connected to Type 1 power signal connection line S11, which in turn is connected to Type 1 power signal line S1, which is in turn connected to the red sub-pixel circuit R. Type 2 signal line connection structure K2 is electrically connected to Type 2 power signal connection line S12, which in turn is connected to Type 2 power signal line S2, which is in turn connected to the green sub-pixel circuit G. Type 3 signal line connection structure K3 is electrically connected to Type 3 power signal connection line S13, which in turn is connected to Type 3 power signal line S3, which is in turn connected to the blue sub-pixel circuit B. The number of signal line connection structures is the same as the number of types of the first power signal connection line. A power signal connection line of the same type can connect to one signal line connection structure of the same type, achieving a uniform routing design of signal lines in the pixel circuit.

[0107] For example, refer to Figure 5 and Figure 6 The signal line connection structure includes a first connection portion K01 and a second connection portion K02. The dimension of the first connection portion K01 in the first direction X is larger than the dimension of the second connection portion K02 in the first direction X, which is the length extension direction of the first power signal connection line. Multiple first connection portions K01 have the same dimension in the first direction X, and multiple second connection portions K02 have the same dimension in the second direction Y, so that the signal connection structure occupies the same space, improving the consistency of signal line wiring. The second connection portion K02 of the signal line connection structure is electrically connected to the first power signal connection line, and the first connection portion K01 of the signal line connection structure is electrically connected to the first power line to realize signal transmission.

[0108] In some embodiments, multiple signal line connection structures are arranged at equal intervals from left to right in the first direction X to ensure uniform wiring design and reasonable wiring according to the arrangement of sub-pixel circuits.

[0109] In some embodiments, the display panel further includes first power lines and first power jumpers. Multiple first power lines are provided, and based on different types of signal line connection structures, these multiple first power lines are divided into at least two types. Multiple first power jumpers are provided, and multiple signal line connection structures of the same type are connected to the same first power line through multiple first power jumpers. Based on different types of signal line connection structures, the multiple first power jumpers are divided into at least two types. By using different types of first power lines and first power jumpers, a uniform arrangement of signal lines in the driving layer can be achieved.

[0110] Figure 8A schematic partial top view of another display panel provided in an embodiment of this application. Figure 9 A schematic partial top view of another display panel provided in an embodiment of this application. Exemplary, see reference... Figure 8 and Figure 9 The display panel includes a display area A and a non-display area B. The non-display area B includes a first area B1, a second area B2, and a third area B3. The first area B1 is located close to the display area A, and the second area B2 is located between the first area B1 and the third area B3. Sub-pixel circuits of different colors are located in the display area A. A first power signal line is located in the first area B1 of the non-display area, a first power signal connection line and signal connection structure are located in the second area B2 of the non-display area, and a first power line is located in the third area B3 of the non-display area. The display panel corresponding to the second area B2 is bent to move the display panel corresponding to the third area B3 to the side of the display panel in the display area A away from the display side. This partitioned wiring arrangement saves wiring space.

[0111] In some examples, multiple first power lines are arranged at equal intervals from top to bottom along the second direction Y, and multiple signal line connection structures are arranged at equal intervals from left to right along the first direction X. The number of types of first power lines is the same as the number of types of signal line connection structures. A first power line is electrically connected to a first signal connection line through multiple signal line connection structures of the same type, saving wiring space and achieving uniform routing.

[0112] For example, refer to Figure 8 The first power line is divided into two types: Type 1 power line S21 and Type 2 power line S22. Type 1 power line S21 is electrically connected to Type 1 signal line connection structure K1. Type 1 signal line connection structure K1 is electrically connected to Type 1 power signal connection line S11. Type 1 power signal connection line S11 is electrically connected to Type 1 power signal line S1. Type 1 power signal line S1 is electrically connected to the red sub-pixel circuit R and the green sub-pixel circuit G. Type 2 power line S22 is electrically connected to Type 2 signal line connection structure K2. Type 2 signal line connection structure K2 is electrically connected to Type 2 power signal connection line S12. Type 2 power signal connection line S12 is electrically connected to Type 2 power signal line S2. Type 2 power signal line S2 is electrically connected to the blue sub-pixel circuit B.

[0113] For example, refer to Figure 9The first power line can be divided into three types: Type I power line S21, Type II power line S22, and Type III power line S23. Type I power line S21 is electrically connected to Type I signal line connection structure K1. Type I signal line connection structure K1 is electrically connected to Type I power signal connection line S11. Type I power signal connection line S11 is electrically connected to Type I power signal line S1. Type I power signal line S1 is electrically connected to the red sub-pixel circuit R. Type II power line S22 is electrically connected to Type II signal line connection structure K2. Type II signal line connection structure K2 is electrically connected to Type II power signal connection line S12. Type II power signal connection line S12 is electrically connected to Type II power signal line S2. Type II power signal line S2 is electrically connected to the green sub-pixel circuit G. The third type power line S23 is electrically connected to the third type signal line connection structure K3. The third type signal line connection structure K3 is electrically connected to the third type power signal connection line S13. The third type power signal connection line S13 is electrically connected to the third type power signal line S3. The third type power signal line S3 is electrically connected to the blue sub-pixel circuit B.

[0114] In some examples, multiple first power jumpers are evenly spaced from left to right along a first direction X, and multiple first power lines are evenly spaced from top to bottom along a second direction Y. The first power jumpers in the first direction X intersect with the first power lines in the second direction Y to achieve signal transmission, thereby driving the sub-pixels to emit light. By using multiple first power jumpers and the evenly spaced arrangement of multiple first power lines, a uniform routing design is achieved while driving the sub-pixels separately.

[0115] For example, refer to Figure 8 The first power jumper includes two types: a first-type power jumper K11 and a second-type power jumper K12. The first-type signal line connection structure K1 is electrically connected to the first-type power line S21 via the first-type power jumper K11. The second-type signal line connection structure K2 is electrically connected to the second-type power line S22 via the second-type power jumper K12. Multiple first-type power jumpers of the same type are electrically connected at one end to a first-type power signal connection line via a signal line connection structure of the same type. The number of types of first-type power jumpers is the same as the number of types of signal line connection structures. The first-type power jumpers and signal line connection structures correspond one-to-one to save wiring space and achieve a uniform wiring design.

[0116] For example, refer to Figure 9The first power jumper includes three types: Type I power jumper K11, Type II power jumper K12, and Type III power jumper K13. Type I signal line connection structure K1 is electrically connected to Type I power line S21 via Type I power jumper K11; Type II signal line connection structure K2 is electrically connected to Type II power line S22 via Type II power jumper K12; and Type III signal line connection structure K3 is electrically connected to Type III power line S23 via Type III power jumper K13. The number of types of first power jumpers is the same as the number of types of first power lines. Multiple first power jumpers of the same type are connected to a single first power line of the same type. Each first power jumper corresponds one-to-one with a first power line to save wiring space and achieve a uniform wiring design.

[0117] This application embodiment categorizes the first power line, first power jumper wire, signal line connection structure, first power signal connection line, and first power signal line, and sets the number of types of first power signal connection lines, signal line connection structures, first power jumpers, and first power lines to be the same as the number of types of first power signal lines, thereby achieving uniform routing of sub-pixel signal lines of different colors. Furthermore, by arranging multiple first power signal lines, multiple first power signal connection lines, multiple signal line connection structures, multiple first power lines, and multiple first power jumpers at equal intervals, a uniform routing design is achieved, improving product reliability.

[0118] In some embodiments, the display panel further includes barrier pillars disposed on the side of the substrate layer away from the driving layer. The encapsulation layer 300 includes an organic encapsulation layer prepared by inkjet printing, and the barrier pillars are used to prevent the overflow of organic encapsulation layer material.

[0119] Figure 10 A schematic partial cross-sectional view of another display panel provided in an embodiment of this application. Exemplary, see reference to... Figure 10 The barrier pillars include a first barrier pillar 301 and a second barrier pillar 302, and the orthogonal projections of the first barrier pillar 301 and the second barrier pillar 302 on the substrate are located in the second region B2.

[0120] In some embodiments, the driving layer includes at least one organic insulating layer and at least one source / drain electrode layer. The at least one organic insulating layer may include a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer. The at least one source / drain electrode layer may include a first source / drain electrode layer and a second source / drain electrode layer. An organic insulating layer is disposed between the first source / drain electrode layer and the second source / drain electrode layer. An encapsulation layer is disposed on the side of the organic insulating layer away from the substrate layer to insulate the source / drain electrode layers.

[0121] Example, reference Figure 10 The driving layer 200 may include a first source / drain electrode layer 210, a first inorganic insulating layer 231, a first organic insulating layer 232, a second source / drain electrode layer 220, a second organic insulating layer 230, a third organic insulating layer 240, and a second inorganic insulating layer 250. The first inorganic insulating layer 231 is disposed between the first source / drain electrode layer 210 and the first organic insulating layer 232, the first organic insulating layer 232 is disposed between the first inorganic insulating layer 231 and the second source / drain electrode layer 220, the second organic insulating layer 230 is disposed between the second source / drain electrode layer 220 and the third organic insulating layer 240, and the second inorganic insulating layer 250 is disposed between the third organic insulating layer 240 and the encapsulation layer 300.

[0122] For example, refer to Figure 10 The display panel also includes an encapsulation layer 300, which is used to protect the driving layer and the light-emitting device layer and prevent external water and oxygen from corroding the driving layer.

[0123] For example, refer to Figure 8 and Figure 10 When the driving layer has two source / drain electrode layers, including a first source / drain electrode layer 210, a first organic insulating layer 232, a second source / drain electrode layer 220, and a second organic insulating layer 230, the first power signal line and the first power signal connection line are located in the first region B1. The first power signal line and the first power signal can be set on the same layer as the first source / drain electrode layer 210, and the first power signal line and the first power signal can be set on the same layer as the second source / drain electrode layer 220, so as to utilize different conductive layers for signal line routing and save routing space.

[0124] Figure 11 This is a schematic partial top view of a display panel provided in an embodiment of this application. For example, as shown... Figures 8 to 11As shown, multiple red sub-pixel circuits R can be electrically connected to the same first-type power signal connection line S11 via multiple first-type power signal lines S1. The first-type power signal connection line S11 is electrically connected to a first-type power jumper line K11 via a first-type signal line connection structure K1. The first-type signal line connection structure K1 is located in the first sub-region B11, and the first-type power jumper line K11 is located in the fourth sub-region B21. Multiple green sub-pixel circuits G can be electrically connected to the same second-type power signal connection line S12 via multiple second-type power signal lines S2. The second-type power signal connection line S12 is electrically connected to the second-type power jumper line K12 via a second-type signal line connection structure K2. The second-type signal line connection structure K2 is located in the second sub-region B12, and the second-type power jumper line K12 is located in the fifth sub-region B22. Multiple blue sub-pixel circuits B can be electrically connected to the same third-type power signal connection line S13 via multiple third-type power signal lines S3. The third type of power signal connection line S13 is electrically connected to the third type of power jumper line K13 through the third type of signal line connection structure K3. The third type of signal line connection structure K3 is located in the third sub-region B13, and the third type of power jumper line K13 is located in the sixth sub-region B23. Both the first power signal line and the first power signal can be arranged on the same layer as the first source-drain electrode layer 210, and both the first power signal line and the first power signal can be arranged on the same layer as the second source-drain electrode layer 220, so as to utilize different conductive layers for signal line routing and save wiring space.

[0125] For example, refer to Figure 8 and Figure 11 The first region B1 includes the first sub-region B11, the second sub-region B12, and the third sub-region B13. The second region B2 includes the fourth sub-region B21, the fifth sub-region B22, and the sixth sub-region B23.

[0126] Figure 12 A schematic partial top view of another display panel provided in an embodiment of this application. Exemplary, such as... Figures 9 to 12 As shown, multiple red sub-pixel circuits R and multiple green sub-pixel circuits G can be electrically connected to the same first-type power signal connection line S11 via a first-type power signal line S1. The first-type signal line connection structure K1 is located in the first sub-region B11, and the first-type power jumper K11 is located in the fourth sub-region B21. Multiple blue sub-pixel circuits B can be electrically connected to the same second-type power signal connection line S12 via a second-type power signal line S2. The second-type signal line connection structure K2 is located in the second sub-region B12, and the second-type power jumper K12 is located in the fifth sub-region B22. Both the first power signal line and the first power signal can be arranged on the same layer as the first source-drain electrode layer 210, and both the first power signal line and the first power signal can be arranged on the same layer as the second source-drain electrode layer 220, so as to utilize different conductive layers for signal line routing and save routing space.

[0127] In some examples, the driving layer further includes a third source / drain electrode layer and a fourth organic insulating layer, wherein the third source / drain electrode layer is disposed between the third organic insulating layer 240 and the fourth organic insulating layer, and the fourth organic insulating layer is disposed between the third source / drain electrode layer and the second inorganic insulating layer 250.

[0128] For example, when the driving layer has three source-drain electrode layers, the first power line is disposed on the same layer as the third source-drain electrode layer and is located in display area A. The first power signal connection line is disposed on the same layer as the second source-drain electrode layer and is located in first area B1. The signal line connection structure is disposed on the same layer as the first source-drain electrode layer and is located in first area B1. The first power line is disposed on the same layer as the first source-drain electrode layer and is located in third area B3. The first power jumper wire is disposed on the same layer as the second source-drain electrode layer and is located in second area B2.

[0129] Figure 13 This application provides a schematic circuit diagram of a display panel. For example, refer to... Figure 13 With three source / drain electrode layers in the driving layer, the first power line is disposed on the same layer as the third source / drain electrode layer, located in display area A. The first power signal connection line is disposed on the same layer as the second source / drain electrode layer, located in the first area B1. The signal line connection structure is disposed on the same layer as the first source / drain electrode layer, located in the first area B1. The first power line is disposed on the same layer as the first source / drain electrode layer, located in the third area B3. The first power jumper wire is disposed on the same layer as the second source / drain electrode layer, located in the second area B2.

[0130] Figure 14 This is a schematic partial structural diagram of another display panel provided in an embodiment of this application. (See diagram below.) Figure 14 As shown, the organic insulating layer has multiple clearance areas 233, which are formed by etching the organic insulating layer. The clearance areas 233 are located in the second region, and the organic insulating layer of the clearance areas 233 is perforated. The clearance areas 233 do not overlap, and at least one clearance area is provided between different types of first power signal connection lines. The clearance areas 233 surround the display area to prevent external water and oxygen from seeping into the display area through the organic insulating layer, which could cause the sub-pixels of the display area to malfunction.

[0131] For example, Figure 14 The middle section shows the film structure between two adjacent pixel unit circuits. Figure 14 No conductive layer. Figure 10 This refers to the film structure of the pixel unit circuit. Figure 10 A conductive layer exists within it. Multiple clearance areas are provided between adjacent pixel unit circuits and on the film structure of the pixel unit circuits to better isolate them from external water and oxygen erosion.

[0132] Figure 15 A schematic partial top view of another display panel provided in an embodiment of this application. Figure 16 This is a schematic partial top view of a display panel provided in an embodiment of this application. Exemplary, exemplary, reference. Figure 15 and Figure 16 The water and oxygen erosion channel of the display panel is L. During the etching of the clearance area, there is a step difference between the organic insulating layers between the connected sub-pixel unit circuits. By setting multiple organic insulating layers and multiple conductive layers, the water and oxygen erosion path can be extended. Even if there are organic layer residues in the clearance area, the water and oxygen erosion channel can still be extended to prevent external moisture from entering the display area of ​​the display panel, avoid eroding the sub-pixel circuits, and improve the product reliability of the display panel.

[0133] For example, both the first blocking post 301 and the second blocking post 302 can be disposed between two adjacent clearance areas 233. The orthographic projection of the first blocking post 301 falls within the orthographic projection of the organic insulating layer between the two adjacent clearance areas 233, forming a columnar first blocking post. The orthographic projection of the second blocking post 302 falls within the orthographic projection of the organic insulating layer between the two adjacent clearance areas 233, forming a columnar blocking post to prevent material overflow within the organic encapsulation layer.

[0134] This application embodiment, by setting multiple organic insulating layers, inorganic insulating layers, and multi-layer source and drain electrode layers, can achieve separate driving of sub-pixel circuits on the one hand, and extend the length of water and oxygen channels on the other hand. By setting a clear area, water and oxygen are prevented from entering the sub-pixel circuits through the organic layer, thereby improving the service life of the display panel.

[0135] A second aspect of this application provides a display device. Figure 17 This is a schematic structural diagram of a display device provided in an embodiment of this application. Figure 17 As shown, the display device 2000 includes a display panel 1000 as described in the first aspect.

[0136] Figure 18 This is a schematic structural diagram of another display device provided in an embodiment of this application. Figure 19 This is a top view of a display device provided in an embodiment of this application. For example, as shown... Figure 18 As shown, the display panel includes a display area A and a non-display area B. Area C is the bottom border of the display panel, and area C contains part of display area A and part of display area B. Figure 19 for Figure 18 A magnified view of a portion of region C. (See image below.) Figure 19As shown, multiple pixel unit circuits are disposed within the driving layer in the non-display area. These pixel unit circuits may include a first pixel unit circuit 400, a second pixel unit circuit 500, and a third pixel unit circuit 600. A driving chip 700 is electrically connected to the driving layer via bonding pins. The driving chip 700 is provided with a driving chip signal input terminal 710 and a driving chip signal output terminal 720, with the driving chip signal output terminal 720 electrically connected to the pixel unit circuits. The first pixel unit circuit 400, the second pixel unit circuit 500, and the third pixel unit circuit 600 respectively provide a red sub-pixel circuit R, a blue sub-pixel circuit B, and a green sub-pixel circuit G. The red sub-pixel circuit R, the blue sub-pixel circuit B, and the green sub-pixel circuit G can all be electrically connected to the output terminal 720 of the driving chip via different first power signal lines, first power signal connection lines, signal line connection structures, first power bonding wires, and first power lines. The driving layer also includes a cathode signal line 800, on which the pixel unit circuits are located. The cathode signal line 800 and the driver chip 700 work together to provide driving signals to the pixel unit circuit, so as to drive the sub-pixels of different colors to emit light.

[0137] The display device provided in this application embodiment includes multiple pixel unit circuits electrically connected to multiple first power signal lines. Based on the different color sub-pixel circuits in the multiple pixel unit circuits, the multiple first power signal lines are divided into at least two types, so that different types of first power signal lines are electrically connected to the different color sub-pixels in the pixel unit. One power signal line can connect to two color sub-pixel circuits or to one color sub-pixel circuit. Different color sub-pixel circuits are connected to at least two types of first power signal lines to achieve separate driving of the power signals of different color sub-pixels. At the same time, the values ​​of the first power signals received by different sub-pixel circuits are different. The first power signal with the corresponding value can be provided according to the actual driving voltage required by the sub-pixel circuit, reducing the voltage difference between the anode and cathode signals received by different color sub-pixels, thereby reducing the power consumption waste caused by the large voltage difference in different color sub-pixels due to the same voltage difference, and thus reducing the display power consumption of the display screen.

[0138] The display devices provided in this application embodiment may include televisions, computers, smartphones, smart wearable devices, laptops, and tablets, etc. Smart wearable devices may include smartwatches, AR (augmented reality) devices, and VR (virtual reality) devices, etc.

[0139] It should be noted that the descriptions of each embodiment in the above embodiments have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0140] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

[0141] Although preferred embodiments have been described in this specification, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this specification.

[0142] Obviously, those skilled in the art can make various modifications and variations to this specification without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims and their equivalents, this specification is also intended to include such modifications and variations.

Claims

1. A display panel, characterized in that, include: Substrate layer; A driving layer is disposed on one side of the substrate layer, and the driving layer includes multiple pixel unit circuits and multiple first power signal lines; The pixel unit circuit includes multiple sub-pixel circuits, and different types of sub-pixel circuits in the pixel unit circuit are used to drive the emitted light of sub-pixels of different colors. The multiple first power signal lines are divided into at least two types, and the different types of first power signal lines are used to transmit first power signals of different values. Different types of first power signal lines are electrically connected to different types of sub-pixel circuits in the pixel unit circuit.

2. The display panel according to claim 1, characterized in that, Sub-pixel circuits of the same type from different pixel unit circuits are electrically connected to the same type of first power signal line; and / or, The pixel unit circuit contains two different types of sub-pixel circuits that are electrically connected to the same type of first power signal line.

3. The display panel according to claim 2, characterized in that, The plurality of pixel unit circuits include a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit; The multiple first power signal lines include first type power signal lines, second type power signal lines, and third type power signal lines; The first type of power signal line is electrically connected to the first sub-pixel circuit, the second type of power signal line is electrically connected to the second sub-pixel circuit, and the third type of power signal line is electrically connected to the third sub-pixel circuit.

4. The display panel according to claim 2, characterized in that, The plurality of pixel unit circuits include a red sub-pixel circuit, a blue sub-pixel circuit, and a green sub-pixel circuit; The multiple first power signal lines include first type power signal lines and second type power signal lines; The first type of power signal line is electrically connected to the red sub-pixel circuit and the green sub-pixel circuit; and / or, The second type of power signal line is electrically connected to the blue sub-pixel circuit.

5. The display panel according to claim 3 or 4, characterized in that, Also includes: Multiple first power signal connection lines are provided, and the sub-pixel circuit is electrically connected to the first power signal connection lines through the first power signal lines. Based on the different types of first power signal lines connected, the multiple first power signal connection lines are divided into at least two types; The number of types of the first power signal connection line is the same as the number of types of the first power signal line.

6. The display panel according to claim 5, characterized in that, The length extension direction of the first power signal line intersects with the length extension direction of the first power signal connection line.

7. The display panel according to claim 5, characterized in that, Also includes: Multiple signal line connection structure; Multiple first power lines, wherein the first power lines are electrically connected to the first power signal connection line through the signal line connection structure; Based on the different types of first power signal connection lines, the connection structures of the multiple signal lines are divided into at least two types; The number of types of signal line connection structures is the same as the number of types of the first power signal connection lines; And / or, Based on the signal line connection structures that connect different types of signals, the multiple first power lines are divided into at least two types; The number of types of the first power line is the same as the number of types of the signal line connection structure.

8. The display panel according to claim 7, characterized in that, The signal line connection structure includes a first connection part and a second connection part. The size of the first connection part in a first direction is larger than the size of the second connection part in a first direction. The first direction is the length extension direction of the first power signal connection line. The second connection part is electrically connected to the first power signal connection line, and the first connection part is electrically connected to the first power line.

9. The display panel according to claim 8, characterized in that, The orthographic projection shapes of the first connecting portion and the second connecting portion on the substrate layer include polygons.

10. The display panel according to claim 7, characterized in that, One first power signal connection cable connects to multiple first power signal connection cables of the same type; and / or, A first power line is connected to a first power signal line of the same type via the signal connection line structure.

11. The display panel according to claim 7, characterized in that, Also includes: Multiple first power jumpers are provided, and multiple signal line connection structures of the same type are connected to the same first power line through multiple first power jumpers. Based on the signal line connection structures that connect different types of signals, the multiple first power jumpers are divided into at least two types; The number of types of the first power jumper wire is the same as the number of types of the first power line; and / or, The number of types of the first power jumper wire is the same as the number of types of the signal line connection structure.

12. The display panel according to claim 11, characterized in that, Multiple first power signal lines are arranged at equal intervals; and / or, Multiple first power signal connection lines are arranged at equal intervals; and / or, Multiple signal line connection structures are arranged at equal intervals; and / or, Multiple first power lines are arranged at equal intervals; and / or, Multiple first power supply jumpers are arranged at equal intervals.

13. The display panel according to claim 7, characterized in that, The display panel includes a display area and a non-display area, wherein the non-display area surrounds the display area; The non-display area includes a first area, a second area, and a third area, wherein the first area is located close to the display area, and the second area is located between the first area and the third area; The first power signal line is located in the first area; The first power signal connection line and the signal line connection structure are disposed in the second region; The first power cord is disposed in the third region, and the display panel corresponding to the second region is bent so that the display panel corresponding to the third region is located on the side of the display panel away from the display side in the display area.

14. The display panel according to claim 13, characterized in that, Also includes: A blocking post is disposed on the side of the substrate layer away from the driving layer, located in the second region; The driving layer includes at least one organic insulating layer, the organic insulating layer is provided with a plurality of clearance areas, the clearance areas are provided in the second region, and the organic insulating layer in the clearance areas is hollowed out. There is no overlap between the multiple clearance areas, and at least one clearance area is provided between different types of first power signal connection lines; The orthogonal projection of the barrier post onto the substrate layer covers the clearance area.

15. The display panel according to claim 14, characterized in that... The organic insulating layer includes a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer. The first organic insulating layer is disposed on the side of the driving layer away from the substrate layer, and the second organic insulating layer is disposed between the first organic insulating layer and the third organic insulating layer. In the non-display area, the orthographic projection of the first organic insulating layer on the substrate layer at least partially overlaps with the orthographic projection of the second organic insulating layer on the substrate layer; In the non-display area, the orthographic projection of the second organic insulating layer on the substrate layer at least partially overlaps with the orthographic projection of the third organic insulating layer on the substrate layer.

16. A display device, characterized in that, include: The display panel as described in any one of claims 1 to 15.

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