Super capacitor UPS control system

Abstract

The utility model discloses a super capacitor UPS control system, and belongs to the field of industrial control. By optimizing the structure of the super capacitor UPS control system, efficient, stable and safe power management is realized. According to the system, by reasonably arranging the super capacitor charging management circuit, the current control switch, the intelligent electronic switch and other elements, the defects of a traditional UPS system in the aspects of power supply fluctuation and over-current protection are overcome. The DC input port is designed to be wide-voltage input and can adapt to power supply input in different voltage ranges, and the adaptability and stability of the system in a complex power supply environment are enhanced. The structural design of the system not only simplifies the complex circuit in the traditional UPS, but also improves the electric energy conversion efficiency by automatically adjusting the charging process and boosting control. The intelligent electronic switch is combined with the single-chip microcomputer in a control mode, output can be automatically cut off when current is too large, system damage is prevented, long-time safe operation of equipment is guaranteed, the super-capacitor UPS control system can work stably in various working environments, the service life of the system is prolonged, and maintenance cost is reduced.

Description

Technical Field

[0001] This utility model relates to the field of industrial control, and in particular to a supercapacitor UPS control system. Background Technology

[0002] With the widespread application of embedded industrial control systems, uninterruptible power supplies (UPS) have become a key component for ensuring stable system operation. The role of a UPS is to provide continuous power to ensure the system can safely shut down during power outages, thereby preventing data loss and hardware damage. However, most existing UPS solutions use lead-acid or lithium batteries as energy storage media. These traditional UPS systems suffer from problems such as large size, heavy weight, and difficult maintenance. Furthermore, lithium batteries also pose certain safety risks.

[0003] While lead-acid battery UPS systems offer long battery life, their large size and weight make them unsuitable for the compact design of embedded systems. Furthermore, they require regular maintenance, increasing system upkeep costs. Lithium-ion battery UPS systems offer advantages in size and battery life, but the safety of lithium batteries remains a bottleneck for their widespread adoption, especially in high-temperature environments where they may expand, leak, or even catch fire.

[0004] Therefore, providing a safe, efficient, and maintenance-free UPS solution without compromising system size and performance has become a significant challenge in embedded controller system design. Supercapacitors, as energy storage devices with rapid charging and discharging capabilities, high power density, long lifespan, and good safety, have gradually attracted widespread attention. Compared to traditional batteries, supercapacitors offer higher charging and discharging efficiency and a longer lifespan, and are harmless, maintenance-free, and suitable for high-frequency charging and discharging applications.

[0005] Currently, most UPS systems on the market do not take into account the special needs of embedded control systems, especially in terms of shutdown control after power failure and system self-recovery capabilities. Most traditional UPS circuits cannot directly provide shutdown signals to equipment or automatically restart after power is restored, functions that are crucial for embedded industrial control systems. To meet the high power management requirements of modern embedded systems, designing a high-efficiency, reliable UPS circuit that automatically manages shutdown signals using supercapacitors as its core has become an urgent problem to be solved.

[0006] Therefore, a supercapacitor-integrated UPS control scheme is proposed, which can not only meet the power reliability requirements of embedded control systems, but also avoid the problems of large size, difficult maintenance, and safety hazards of traditional battery UPS, and achieve efficient and maintenance-free power management, which has important technical significance and application prospects. Utility Model Content

[0007] This invention provides a supercapacitor UPS control system that addresses the shortcomings of existing UPS systems in terms of power adaptability, overcurrent protection, and charging management efficiency. The technical solution is as follows:

[0008] This utility model provides a supercapacitor UPS control system, including:

[0009] The supercapacitor charging management circuit interacts with the microcontroller and the supercapacitor bank, and is also connected to the DC input port and the output electronic switch. It is used to perform charging management and boost control on the supercapacitor bank and the microcontroller.

[0010] The supercapacitor bank is used to store electrical energy;

[0011] The microcontroller is also connected to the output electronic switch and is used to monitor and manage the control of the supercapacitor charging management circuit and the output electronic switch.

[0012] The output electronic switch is used to cut off the output of the supercapacitor charging management circuit when triggered by the cut-off signal of the microcontroller. The cut-off signal is generated when the current of the supercapacitor charging management circuit is too large.

[0013] The DC input port is used to connect a constant voltage power supply input.

[0014] Optionally, the supercapacitor bank includes four supercapacitors C102 to C105.

[0015] Optionally, the supercapacitor charging management circuit includes current control switches Q1 to Q3, inductor L3, and filter capacitor to form a management circuit for charging and boosting the supercapacitor bank.

[0016] The supercapacitor charging management circuit also includes a management chip U33, which has a PFI pin for monitoring the input voltage of the supercapacitor charging management circuit and for automatically controlling charging based on the input voltage.

[0017] Optionally, the supercapacitor management circuit implements charging and voltage boosting management of the supercapacitor bank through BUCK-BOOST mode, which corresponds to different operating states of the supercapacitor bank.

[0018] Optionally, the output electronic switch is equipped with an intelligent electronic switch U34 with overcurrent protection function. The intelligent electronic switch U34 is used to cut off the output of the supercapacitor charging management circuit when triggered by the cut-off signal.

[0019] Optionally, the DC input port is designed for a wide voltage range of 12 to 24V.

[0020] Optionally, the system further includes a voltage detection circuit multiplexed with the PFI pin, the voltage detection circuit transmitting information via an I2C bus.

[0021] Optionally, the control logic of the microcontroller includes:

[0022] When the power supply voltage is greater than the set value, the control circuit enters the working mode;

[0023] When the power supply voltage is lower than the set value, the control circuit enters standby mode;

[0024] When the power is off, the control circuit executes the shutdown procedure and sends a shutdown signal to the device;

[0025] After power is restored, the control circuit cuts off the output after a delay and restores the output after a short time to ensure that the electrical equipment can be turned on normally and return to normal working status.

[0026] Optionally, the microcontroller includes a power-off circuit, which includes transistor Q5, resistors R142, R143, R147, an S_OUT signal, and a SHUTDOWN signal. The S_OUT signal is issued by the supercapacitor charging management circuit to trigger the power-off signal.

[0027] The base of transistor Q5 is connected to the S_OUT signal and the base current is limited by resistors R142 and R143; the collector of transistor Q5 is connected to the SHUTDOWN signal, and the emitter of transistor Q5 is grounded.

[0028] The beneficial effects of the technical solution provided by this utility model include at least the following:

[0029] This invention achieves efficient, stable, and safe power management by optimizing the structure of the supercapacitor UPS control system. The system addresses the shortcomings of traditional UPS systems in terms of power fluctuation and overcurrent protection through the rational layout of components such as the supercapacitor charging management circuit, current control switch, and intelligent electronic switch. The DC input port is designed for wide voltage input, adapting to power inputs across different voltage ranges, enhancing the system's adaptability and stability in complex power environments. The system's structural design not only simplifies the complex circuitry of traditional UPS systems but also improves energy conversion efficiency through automatic adjustment of the charging process and boost control. The combination of intelligent electronic switches and microcontroller control automatically cuts off the output when the current is too high, preventing system damage and ensuring long-term safe operation. This allows the supercapacitor UPS control system to operate stably in various working environments, extending the system's lifespan and reducing maintenance costs. Attached Figure Description

[0030] Figure 1 A schematic diagram of the structure of a supercapacitor UPS control system according to an exemplary embodiment of the present invention is shown;

[0031] Figure 2 The present invention illustrates a time-voltage curve during charging and discharging, according to an exemplary embodiment.

[0032] Figure 3 An overall diagram of a supercapacitor management circuit according to an exemplary embodiment of the present invention is shown;

[0033] Figure 4 It shows Figure 3 A partial schematic diagram;

[0034] Figure 5 The diagram illustrates a control circuit diagram in a microcontroller used to implement output cut-off and power-off signals, according to an exemplary embodiment of the present invention. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this utility model clearer, the embodiments of this utility model will be described in further detail below with reference to the accompanying drawings.

[0036] In this article, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0037] Figure 1 A schematic diagram of a supercapacitor UPS control system according to an exemplary embodiment of the present invention is shown below. Figure 1 The supercapacitor UPS control system is described.

[0038] Existing UPS solutions are mostly general-purpose UPSs, which are large in size and have long battery life, but lack a dedicated shutdown signal. This patent is specifically designed for industrial PCs and embedded controllers, with battery life covering the shutdown time, generally 20 to 30 seconds, and includes a shutdown control signal and shutdown logic. Figure 2 The time-voltage curves during charging and discharging show that the circuit completes charging in approximately 10 seconds and can discharge for about 20 seconds. This will be discussed further below.

[0039] This invention provides a supercapacitor UPS control system, including a supercapacitor charging management circuit, a supercapacitor bank, a microcontroller, an output electronic switch, and a DC input port.

[0040] First, the supercapacitor charging management circuit interacts with the microcontroller and the supercapacitor bank, and is also connected to the DC input port and output electronic switch to perform charging management and boost control for the supercapacitor bank and the microcontroller.

[0041] The supercapacitor charging management circuit is equipped with current control switches Q1 to Q3, inductor L3 and filter capacitor to form a management circuit for charging and boosting the supercapacitor bank; the supercapacitor charging management circuit is also equipped with a management chip U33, which has a PFI pin for monitoring the input voltage of the supercapacitor charging management circuit and for automatically controlling charging according to the input voltage.

[0042] like Figure 3 As shown, the key parts of the supercapacitor charging management circuit mainly include current control switches Q1 to Q3, inductor L3, supercapacitors C102 to C105, and management chip U33. These components are used to realize the charging and boost control of the supercapacitor bank.

[0043] Regarding the connections, the DC input port is a wide-voltage design, connected to the supercapacitor charging management circuit. Through this input port, the system receives the power supply voltage (typically DC 12V to 24V) and begins the charging process. The PFI pin of the management chip U33 monitors the power supply input voltage, ensuring that the system starts charging when the voltage is greater than 1.17V. Q1, Q2, Q3, and Q4 are current control switches, responsible for switching the current on and off, regulating the current flow to the supercapacitor bank. Q1 and Q2 work together to form the current regulation path, controlling the magnitude of the charging current. Q3 plays a crucial role; when the input voltage is lower than the set value (e.g., below 1.17V), Q3 starts working, assisting in the voltage boosting process and ensuring the supercapacitor bank can maintain its charging state. Inductor L3 stores energy and helps smooth the current during charging. It plays a crucial role in current transfer between Q1 and Q2, transferring energy from the input power supply to the supercapacitor bank while achieving stable current output. Supercapacitors C102 to C105 are used for energy storage. The remaining capacitors in the circuit are filter capacitors that smooth current fluctuations, reduce noise during power input, ensure voltage stability during charging, and reduce voltage spikes caused by current fluctuations.

[0044] The management chip U33 is the core of the entire charging management circuit. It controls the current flow and automatically controls the charging process based on the power supply voltage detected by the PFI pin. When the input voltage is greater than the set value (e.g., exceeding 1.17V), U33 initiates charging through Q1 and Q2, transferring the current to the supercapacitor bank for energy storage. When the voltage is lower than the set value, U33 enters boost mode through Q2 and Q3, boosting the current to the specified value to ensure the normal operation of downstream equipment. Pins VOUTSP (pin 31) and VOUTSN (pin 30) are used to control the output voltage, V2V5 is used to adjust the input voltage, and CAPFD (capacitor detection) is used to monitor the status of the supercapacitor.

[0045] Functionally, the U33 management chip uses its built-in voltage monitoring function (PFI pin) and current control mechanism to determine whether the input voltage meets the requirements. It adjusts the charging current by controlling the switching states of Q1 and Q2. Q3 assists in boosting the voltage when the power supply voltage is low, providing charging support for the supercapacitor bank.

[0046] Switches Q1 and Q2 control the flow of current to the supercapacitor bank, ensuring charging when the input voltage is high. Q1 is responsible for directing the input current to inductor L3, while Q2 is responsible for supplying current to the supercapacitor bank through the inductor.

[0047] When the input voltage is low (below 1.17V), Q3, in conjunction with Q2, enters boost mode to ensure that the current is boosted to the appropriate voltage so that the supercapacitor bank can continue to charge.

[0048] L3, the inductor's function is to ensure a stable current flow by storing and releasing energy. It plays a crucial role in energy conversion between Q1 and Q2, contributing to improved efficiency during the charging process.

[0049] C102 to C105 are filter capacitors that smooth the current, ensure the stability of the input current, reduce the impact of noise and voltage spikes, and ensure voltage stability during charging.

[0050] During charging, when the input voltage is greater than the set value (e.g., 1.17V), U33 initiates the charging process through Q1 and Q2. Current flows into L3 through Q1, and then from L3 to the supercapacitor bank for charging. When the input voltage is less than the set value (e.g., below 1.17V), the system enters boost mode through Q2 and Q3 to ensure that the supercapacitor bank can continue charging and reach the target voltage.

[0051] In addition, Figure 3The circuit also includes other components, such as current control resistors R116 and R117. R116 filters the current during charging and ensures voltage stability, typically working in conjunction with inductors and Q1 and Q2 to regulate the current and prevent excessive current. R117 provides necessary voltage feedback to ensure that the management chip U33 can correctly monitor the circuit status, further guaranteeing the stability of current regulation during charging and boosting.

[0052] Capacitors C90, C91, and C92 are used for filtering and stabilizing current, reducing voltage fluctuations at the power input and output, and ensuring stable charging of the supercapacitor bank. Capacitors C100 and C101 are also related to the power output, helping to smooth the voltage and prevent voltage spikes from affecting the system.

[0053] Current control resistors such as R103, R104, and R105 work in conjunction with current control switches to help regulate the charging current and prevent excessive current from damaging the battery or other components.

[0054] Diode D4 is a protective element used to prevent reverse current. It ensures that current can only flow in one direction, thereby protecting other parts of the circuit.

[0055] The BAT+ interface is connected to the supercapacitor, and BAT+ is connected to the positive terminal of the supercapacitor. Through the regulation of management chips U33 and Q1~Q3, the capacitor bank is ensured to be charged within the appropriate voltage range.

[0056] also, Figure 3 The circuitry includes an I2C communication interface (pins SCL and SDA) for exchanging data with external devices, helping to adjust and monitor the status of the charging management circuitry.

[0057] Optionally, the supercapacitor management circuit uses BUCK-BOOST mode to manage the charging and boosting of the supercapacitor bank. BUCK-BOOST mode corresponds to different operating states of the supercapacitor bank. In BUCK mode (buck mode), when the input voltage is higher than the set value, the circuit operates in BUCK mode, and current flows through Q1 and Q2 to L3, then through the L3 filter capacitor to charge the supercapacitor bank. In this mode, the current is stable, and the supercapacitor bank charges gradually. In BOOST mode (boost mode), when the input voltage is lower than the set value (e.g., below 1.17V), the system automatically switches to BOOST mode, Q3 participates in the operation, boosting the current to the set voltage to ensure that the charging of the supercapacitor bank is not affected by input voltage fluctuations.

[0058] The system also includes a voltage detection circuit that reuses the PFI pin. The voltage detection circuit transmits information via the I2C bus. The voltage detection circuit is used to detect the voltage of the supercapacitor bank and to trigger the microcontroller to cut off the output of the supercapacitor charging management circuit when the voltage of the supercapacitor bank is lower than a set value.

[0059] In summary, this is achieved through Figure 3 It can be understood that, through the control of the management chip U33, in conjunction with current control switches Q1-Q3, inductor L3, and filter capacitors C90-C105, the system ensures stable charging of the supercapacitor under different input voltage conditions. Furthermore, diode D4 and the current control resistor provide system protection against reverse current and overcurrent, ensuring the safety of the battery and circuitry. The supercapacitor charging management circuit interacts with the microcontroller and the supercapacitor bank, and is connected to the DC input port and output electronic switch. It is mainly used for charging management and boost control of the supercapacitor bank and the microcontroller. Current control switches Q1-Q3, inductor L3, and supercapacitors C102-C105 constitute the charging and boost management circuit. The management chip U33 plays a core role in this circuit, monitoring the input voltage in real time through the PFI pin to ensure that the system starts the charging process when the voltage is greater than 1.17V. Q1 and Q2 are responsible for current regulation, and Q3 assists in boosting the voltage, ensuring continuous charging of the supercapacitor bank. Therefore, the supercapacitor charging management circuit is responsible for ensuring stable charging of the supercapacitor bank even under power fluctuations or unstable input voltage. Through automatic voltage boost and current regulation, it optimizes the charging efficiency and safety of the supercapacitor bank. Combined with other components of the patent (such as the output electronic switch and overcurrent protection circuit), this circuit can automatically shut down the output in the event of a power failure, protecting the circuit from damage.

[0060] Secondly, the supercapacitor bank, used to store electrical energy, consists of four supercapacitors, C102 to C105. This supercapacitor bank provides stable power support for the system, especially in the event of a power outage, continuously supplying power to the industrial computer and embedded controller.

[0061] Secondly, the microcontroller is also connected to the output electronic switch to monitor and manage the control of the supercapacitor charging management circuit and the output electronic switch. Through interaction with the supercapacitor charging management circuit and the output electronic switch, the microcontroller is responsible for monitoring the operating status of the entire UPS system. It controls the charging current and voltage based on changes in the input voltage and issues a cut-off signal when necessary. When the power supply voltage is too high or the capacitor voltage is below the set value, the microcontroller will issue a control signal to cut off the circuit or enter standby mode.

[0062] Optionally, the control logic of the microcontroller includes: when the power supply voltage is greater than the set value, the control circuit enters the working mode; when the power supply voltage is lower than the set value, the control circuit enters the standby mode; when the power is cut off, the control circuit executes the shutdown procedure and sends a shutdown signal to the device; after the power is restored, the control circuit delays and cuts off the output, and restores the output after a short time, in order to ensure that the electrical equipment can be turned on normally and restore its normal working state.

[0063] Secondly, an output electronic switch is used to cut off the output of the supercapacitor charging management circuit when triggered by a cut-off signal from the microcontroller. The cut-off signal is generated when the current in the supercapacitor charging management circuit is too high.

[0064] Optionally, the key components of the output electronic switch include intelligent electronic switch U34, R144, and Q4. Intelligent electronic switch U34 has overcurrent protection. It is used to cut off the output of the supercapacitor charging management circuit upon triggering a cutoff signal, protecting the circuit from overcurrent damage. U34 has overcurrent protection and can automatically cut off the output current when the current is too high.

[0065] Secondly, the DC input port is designed for wide voltage input, suitable for power input in the range of DC 12V to 24V, ensuring stable operation of the system under different power supply environments.

[0066] The input port receives external DC power (such as 12V or 24V) and supplies it to the system's charging management circuit, supercapacitor bank, and other circuit modules. The input port connects to the supercapacitor charging management circuit: the DC input port is connected to the supercapacitor charging management circuit, which monitors the input voltage and controls the charging process through a management chip (such as U33). The input port is typically connected to the system via a power protection circuit to prevent damage caused by reverse connection or excessive voltage. This protection circuit may include components such as diodes and fuses to ensure power supply safety.

[0067] Filter capacitors (such as C102 to C105) are placed between the power input port and the internal circuitry to remove high-frequency noise from the power input and ensure stable voltage input. These filter capacitors help smooth the input current and reduce the impact of voltage fluctuations on the circuit. This power supply filtering design not only improves power supply stability but also helps reduce noise interference, ensuring that the system can operate normally under various power supply environments.

[0068] The DC input port is also designed with overvoltage protection circuitry. If the input voltage exceeds the set range (e.g., exceeding 24V), the system will automatically trigger the protection mechanism to prevent circuit damage. To prevent reverse connection voltage at the input port, reverse connection protection is implemented using diodes or other protective devices to ensure that the circuit is not damaged when the input power supply is reversed.

[0069] The DC input port is designed with standard connection terminals (such as DC plugs, terminal blocks, etc.) for easy power connection. The terminal design considers current carrying capacity to ensure safe and stable power transmission under high current conditions. The DC input port can also be connected to a current sampling resistor or current sensor to monitor the input current in real time. By sampling the current, the system can detect the normal operating status of the power supply and provide real-time feedback to the microcontroller or management chip for adjusting current control during charging.

[0070] For supercapacitor charging management circuits, such as Figure 4 The diagram shows a portion of a supercapacitor charging management circuit, involving charging control and battery management. This circuit implements charging and voltage control of the supercapacitor bank, ensuring stable charging under different operating conditions and automatically adjusting according to the power supply status.

[0071] Q4 controls U34, an intelligent high-side switch (BTS6143D) responsible for powering the boosted voltage, i.e., the UPS output switch. The BATCTRL pin (control pin) allows U34 to regulate the battery charging process, ensuring stability and safety during battery charging. Capacitors C111 and C110 are connected to the power output path, acting as filters and current stabilizers. These capacitors help smooth the output voltage, reducing the impact of power fluctuations on the battery charging process and ensuring stable charging of the supercapacitor bank.

[0072] Current control resistors R139 and R140 control the current flow path, ensuring that the current flowing to the supercapacitor bank remains within safe limits. Together with the Q4 transistor and inductor, they help stabilize the current and prevent overcurrent. R141 provides voltage feedback, helping the U34 chip accurately monitor and regulate the battery's state of charge. The PE port is a protection signal interface used to trigger the system's overcurrent or overvoltage protection mechanisms. When the system detects that the current or voltage exceeds a preset threshold, the PE port can trigger protective measures, cutting off the power output to prevent damage to the battery or circuitry.

[0073] Figure 4 The main function of the circuit shown is to control the charging and battery management of the supercapacitor bank, ensuring stable charging under different power supply conditions. Through the control of the management chip U34, the current flow and battery charging state are precisely regulated. Simultaneously, transistor Q4 controls the battery charging process via the BATCTRL signal, while capacitors C111 and C110 ensure a stable voltage output through filtering, preventing power fluctuations from affecting the charging process.

[0074] In terms of voltage monitoring and current control, resistors R139, R140, and R141 work in conjunction with other circuit components to help the management circuit achieve precise current control, ensuring that the supercapacitor bank will not be overloaded or affected by unstable current during charging.

[0075] Figure 4 The circuit is a core component of the supercapacitor charging management circuit. It works in conjunction with other circuit components, output electronic switches, a microcontroller, and overcurrent protection circuits to ensure stable power supply and protection for the entire system in the event of abnormal power supply voltage or changes in load demand, through intelligent control.

[0076] The management chip U34 ensures that the battery charging process is not affected by external voltage fluctuations, maintaining the battery's optimal charging state through intelligent adjustment of charging current and voltage. Transistor Q4, acting as a switching element, works in conjunction with the BATCTRL signal to control the charging state of the supercapacitor bank, preventing damage to the battery from excessive current or unstable voltage. Capacitors C111 and C110, through filtering, ensure stable output current and avoid fluctuations. Through the coordination of these circuit components and structures, this invention achieves precise control of power input and output in a supercapacitor UPS control system, thereby improving system stability and safety, avoiding overcharging or over-discharging problems, and ensuring efficient charging and long-term stable operation of the supercapacitor bank.

[0077] In addition, such as Figure 5 As shown, in the supercapacitor UPS control system of this utility model, Figure 5 The circuit shown is a control circuit diagram in a microcontroller used to implement output cut-off and power-off signals. This circuit, in cooperation with other parts of the system, ensures that the system can automatically enter a power-off mode in case of unstable power supply voltage, overcurrent, or other abnormal conditions, to protect the supercapacitor bank and other components from damage.

[0078] Specifically Figure 5 The circuitry includes transistor Q5, resistors R142, R143, R147, and the SHUTDOWN signal.

[0079] The S_OUT signal originates from the microcontroller and is emitted by the supercapacitor charging management circuit. It is used to trigger a power-off signal. This signal is connected to the base of Q5 via resistors R142 and R143. Changes in the S_OUT signal control the operating state of Q5; when the S_OUT signal is active, it triggers Q5 to conduct.

[0080] Q5 is an NPN transistor with its base connected to the S_OUT signal and its base current limited by resistors R142 and R143. The collector of Q5 is connected to the SHUTDOWN signal, and its emitter is grounded. The operating state of Q5 is determined by its base current; when the S_OUT signal is activated, Q5 turns on, triggering the SHUTDOWN signal. Q5's function is to provide a path to activate the SHUTDOWN signal upon receiving the S_OUT signal, thus triggering the system shutdown operation.

[0081] R142 and R143 control the base current of transistor Q5, enabling its stable operation. Resistor R143 ensures the limitation of the base current, so that Q5 only conducts when needed. R147 is related to the SHUTDOWN signal, responsible for ensuring that when Q5 is turned on, the state of the SHUTDOWN signal can be transmitted to subsequent control circuits or the load system, thereby triggering the system's shutdown operation.

[0082] The SHUTDOWN signal is one of the core control signals of this circuit. When Q5 is turned on, the SHUTDOWN signal is activated to notify the system to enter the shutdown process, cutting off the output current and ensuring that the system is not affected by power abnormalities or overcurrent. The circuit controls the switching state of Q5 through the S_OUT signal, thereby triggering the SHUTDOWN signal when necessary. Specifically, the system will automatically trigger this signal to notify the system to enter the shutdown process in the event of power failure, voltage abnormality, or other faults (collectively referred to as power failure), and after a certain delay or when the capacitor bank voltage drops below a certain level, the power output will be cut off through Q4.

[0083] In the supercapacitor UPS control system of this utility model, Figure 5 The circuitry works closely with the supercapacitor charging management circuit, microcontroller, and DC input port. When the supercapacitor charging management circuit detects unstable power supply voltage or excessive current, the microcontroller sends an S_OUT signal, which controls the base current of Q5 through resistors R142 and R143, thereby activating the SHUTDOWN signal and notifying the system to enter the shutdown process. This circuit design enables the system to respond quickly to power failures and automatically enter the shutdown state, improving the automation level and reliability of the UPS system.

[0084] When the DC input port is connected to a power source, the system begins charging the supercapacitor bank through the supercapacitor charging management circuit. If excessive current or voltage instability is detected, the system will issue an S_OUT signal via the microcontroller. The S_OUT signal activates transistor Q5 through resistors R142 and R143. After Q5 is turned on, the SHUTDOWN signal is triggered. The SHUTDOWN signal triggers the system's shutdown operation, cutting off the output current and protecting the device from damage caused by overcurrent or power supply abnormalities.

[0085] With this design, the UPS control system of this invention can automatically respond when the power supply is unstable or there is a power outage, provide short-term backup power, and notify the system to enter the normal shutdown process, thereby ensuring the long-term stable operation of the equipment.

[0086] Figure 5 The circuit controls the operating state of Q5 through the S_OUT signal, which in turn triggers the SHUTDOWN signal, realizing intelligent shutdown control of the system. This structure is closely integrated with the supercapacitor charging management circuit and microcontroller control in this patented solution, and can automatically cut off the output current when the current is too high or the power supply is abnormal, ensuring the safety and reliability of the system. Among them, Q5 is used to notify the system to shut down, and Q4-U34 are used to cut off the output.

[0087] In summary, the supercapacitor UPS control system provided by this invention features structural innovations based on traditional UPS control systems. These innovations are mainly reflected in the design of the supercapacitor charging management circuit, the layout of the current control switch, and the wide voltage range design of the power input port. These innovations make the entire system more compact, more stable, and adaptable to various power environments.

[0088] Firstly, the design of the supercapacitor charging management circuit, through the rational layout of current control switches Q1 and Q4, inductor L3, and capacitors C102 and C105, makes the charging and boosting processes more efficient. In particular, the cooperation between management chip U33 and Q1-Q3 enables the system to intelligently adjust the charging current according to changes in the input voltage, improving the reliability and flexibility of power management. Q1 and Q2 control the direction of the charging current, while Q3 assists in boosting the voltage when the input voltage is low, ensuring that the supercapacitor bank always receives sufficient power.

[0089] Secondly, the power input port adopts a wide voltage design, supporting power input within the range of DC 12V to 24V, enabling the system to adapt to a wider range of power conditions and solving the adaptability problem of traditional UPS systems in environments with large voltage fluctuations or unstable power supplies. To improve the stability of the power input, the system is also designed with a power protection circuit, providing reverse connection protection and overvoltage protection through components such as diodes and fuses, ensuring the safety of the system when connected to power.

[0090] Furthermore, the introduction of intelligent overcurrent protection is another major innovation in the structural design of this invention. Through the intelligent electronic switch U34 and related current control components, the system can monitor the current in real time and automatically cut off the output current when the current is too high, effectively protecting the circuit from overcurrent damage. This protection design not only enhances the system's safety but also reduces the probability of failures caused by current overload.

[0091] These structural systems not only provide efficient power management during stable operation but also operate reliably in environments with unstable power supplies and fluctuating input voltages, greatly improving the system's adaptability, stability, and safety. Simultaneously, precise control of the supercapacitor bank extends its service life and reduces the frequency of maintenance and replacement.

[0092] It should be understood that the "and / or" mentioned in this article describes the relationship between the objects in the case, indicating that there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the objects before and after it are in an "or" relationship.

[0093] The above description is only an exemplary embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A supercapacitor UPS control system, characterized in that, include: The supercapacitor charging management circuit interacts with the microcontroller and the supercapacitor bank, and is also connected to the DC input port and the output electronic switch. It is used to perform charging management and boost control on the supercapacitor bank and the microcontroller. The supercapacitor bank is used to store electrical energy; The microcontroller is also connected to the output electronic switch and is used to monitor and manage the control of the supercapacitor charging management circuit and the output electronic switch. The output electronic switch is used to cut off the output of the supercapacitor charging management circuit when triggered by the cut-off signal of the microcontroller. The cut-off signal is generated when the current of the supercapacitor charging management circuit is too large. The DC input port is used to connect a constant voltage power supply input.

2. The supercapacitor UPS control system according to claim 1, characterized in that, The supercapacitor bank includes four supercapacitors C102 to C105.

3. The supercapacitor UPS control system according to claim 1, characterized in that, The supercapacitor charging management circuit includes current control switches Q1 to Q3, inductor L3, and filter capacitor to form a management circuit for charging and boosting the supercapacitor bank. The supercapacitor charging management circuit also includes a management chip U33, which has a PFI pin for monitoring the input voltage of the supercapacitor charging management circuit and for automatically controlling charging based on the input voltage.

4. The supercapacitor UPS control system according to claim 3, characterized in that, The supercapacitor management circuit implements charging and voltage boosting management of the supercapacitor bank through the BUCK-BOOST mode, which corresponds to different operating states of the supercapacitor bank.

5. The supercapacitor UPS control system according to claim 1, characterized in that, The output electronic switch is equipped with an intelligent electronic switch U34 with overcurrent protection function. The intelligent electronic switch U34 is used to cut off the output of the supercapacitor charging management circuit when triggered by the cut-off signal.

6. The supercapacitor UPS control system according to claim 1, characterized in that, The DC input port is designed for a wide voltage range of 12 to 24V.

7. The supercapacitor UPS control system according to claim 1, characterized in that, The system also includes a voltage detection circuit that is multiplexed with the PFI pin, and the voltage detection circuit transmits information via an I2C bus.

8. The supercapacitor UPS control system according to any one of claims 1 to 6, characterized in that, The control logic of the microcontroller includes: When the power supply voltage is greater than the set value, the control circuit enters the working mode; When the power supply voltage is lower than the set value, the control circuit enters standby mode; When the power is off, the control circuit executes the shutdown procedure and sends a shutdown signal to the device; After power is restored, the control circuit cuts off the output after a delay and restores the output after a short time to ensure that the electrical equipment can be turned on normally and return to normal working status.

9. The supercapacitor UPS control system according to any one of claims 1 to 6, characterized in that, The microcontroller includes a power-off circuit, which includes transistor Q5, resistors R142, R143, R147, an S_OUT signal, and a SHUTDOWN signal. The S_OUT signal is issued by the supercapacitor charging management circuit to trigger the power-off signal. The base of transistor Q5 is connected to the S_OUT signal and the base current is limited by resistors R142 and R143; the collector of transistor Q5 is connected to the SHUTDOWN signal, and the emitter of transistor Q5 is grounded.

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