Capacitive coupling communication system
By processing power line signals through the receiving circuit, filtering and shaping circuit, and voltage comparison circuit of the capacitive coupling communication system, the problems of complex design and electromagnetic interference of the inductive coupling communication system are solved, and high-quality signal transmission is achieved.
Patent Information
- Application Number
- CN202422324921.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-23
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2034-09-23
AI Technical Summary
Existing inductively coupled communication systems in oil drilling are complex to design, costly, and susceptible to electromagnetic interference, which affects signal transmission quality.
A capacitively coupled communication system is adopted, which processes the AC square wave signal on the power line through a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit to achieve signal filtering, shaping, and comparison, and output a precise square wave pulse signal.
It simplifies circuit design, reduces manufacturing costs, reduces electromagnetic interference, and improves signal integrity, transmission quality, and stability.
Smart Images

Figure CN223843777U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of downhole communication technology for oil drilling instruments, and in particular to a capacitive coupling communication system. Background Technology
[0002] In related technologies, power line communication modules are commonly used in oil drilling operations to superimpose communication waveforms onto the power supply voltage, forming power line communication. A common signal transmission and reception method is inductive coupling transmission. While inductive coupling transmission is suitable for high-frequency signal transmission, the inductor requires precise circuit matching and tuning to ensure accurate data transmission. Therefore, its design complexity and manufacturing cost are high, and the inductor is prone to interference with surrounding electromagnetic equipment, affecting the quality of signal transmission. Utility Model Content
[0003] Therefore, it is necessary to provide a capacitively coupled communication system that can be applied to power line carrier communication to address the above-mentioned technical problems.
[0004] A capacitively coupled communication system, wherein the signal receiving module of the capacitively coupled communication system comprises a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit;
[0005] The receiving circuit includes a first capacitor connected to the power line;
[0006] The filtering and shaping circuit includes a first resistor, a second capacitor, and a Zener diode. One end of the first resistor is connected to the first capacitor, and the other end of the first resistor is connected in series with the second capacitor. The second capacitor is connected in parallel with the Zener diode and grounded.
[0007] The voltage comparison circuit includes a comparator, with pin 1 of the comparator connected to the output of the filter shaping circuit, and pin 2 of the comparator connected to a reference voltage.
[0008] In the above scheme, a second resistor is also connected between pin 1 of the comparator and the first resistor.
[0009] In the above scheme, one end of the third resistor is connected to one end of the fourth resistor and connected to the second resistor. The other end of the third resistor is connected to the first power supply, and the other end of the fourth resistor is grounded.
[0010] In the above scheme, pin 2 of the comparator is connected to one end of the fifth resistor and one end of the sixth resistor; the other end of the fifth resistor is connected to the second power supply; and the other end of the sixth resistor is grounded.
[0011] In the above scheme, pin 2 of the comparator is connected to one end of the fifth resistor and one end of the sixth resistor through the seventh resistor.
[0012] In the above scheme, the third power supply is connected in series with the eighth resistor and then connected to the output terminal of the comparator.
[0013] In the above scheme, pin 2 of the comparator is connected to the ninth resistor and then connected to the output terminal of the comparator.
[0014] In the above scheme, the capacitively coupled communication system further includes a signal transmitting module. In the signal transmitting module, the drain of the first MOS transistor is connected to the fourth power supply; the source of the first MOS transistor is connected to the drain of the second MOS transistor and connected to one end of the third capacitor; the source of the second MOS transistor is connected to the drain of the third MOS transistor and grounded through the tenth resistor; the source of the third MOS transistor is connected to the drain of the fourth MOS transistor and connected to the other end of the third capacitor and one end of the fourth capacitor; the fourth MOS transistor is connected to the fifth power supply.
[0015] The gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are respectively connected to the controller and receive the gate control signal output by the controller;
[0016] The two ends of the third capacitor generate AC square wave signals under different gate control signals;
[0017] The other end of the fourth capacitor is connected to the power line and the sixth power source, transmitting the AC square wave signal to the power line.
[0018] In the above scheme, a fifth capacitor is connected between the tenth resistor and the third power supply.
[0019] In the above scheme, the tenth resistor is an adjustable resistor.
[0020] The signal receiving module of the aforementioned capacitively coupled communication system consists of a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit. The receiving circuit includes a coupling capacitor connected to the power line, enabling the reception of AC square wave signals from the power line via capacitive coupling. The filtering and shaping capacitor filters and shapes the received AC square wave signal, removing interference signals and shaping it into a square wave signal with a positive half-axis. The voltage comparison circuit compares the input AC square wave signal with a reference voltage, adjusts the AC square wave signal, and ultimately outputs a more accurate and regular square wave pulse signal, improving signal integrity, transmission quality, and stability, thus enhancing the stability and reliability of the capacitively coupled communication system. Attached Figure Description
[0021] Figure 1 This is a circuit diagram of the signal receiving module of a capacitively coupled communication system in one embodiment;
[0022] Figure 2 This is a schematic diagram of the circuit structure of the signal transmitting module of a capacitively coupled communication system in one embodiment;
[0023] Figure 3 This is a pulse timing diagram of a MOS transistor in one embodiment.
[0024] Reference numerals in the attached diagram: Resistor R1, Resistor R2, Resistor R3, Resistor R4, Resistor R5, Resistor R6, Resistor R7, Resistor R8, Resistor R9, Resistor R10, Capacitor C1, Capacitor C2, Capacitor C3, Capacitor C4, Capacitor C5, Zener diode D1, MOSFET U1, MOSFET U2, MOSFET U3, MOSFET U4, Comparator U5, Power supply VCC1, Power supply VCC2, Power supply VCC3, Power supply VCC4, Power supply VCC5, Power supply VIN, Power supply VCC6. Detailed Implementation
[0025] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.
[0026] The following is a detailed description of the implementation details of the technical solution of the present utility model embodiment.
[0027] like Figure 1 As shown, Figure 1 The circuit diagram of the signal receiving module of a capacitively coupled communication system is shown. According to their functions, the internal circuitry of the signal receiving module can be divided into: a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit.
[0028] The receiving circuit includes a first capacitor C1 connected to the power line. The first capacitor C1 transmits the AC square wave signal from the power line to the signal receiving module. In practical applications, the AC square wave signal first enters the first capacitor C1. This signal may contain both DC and AC components. The first capacitor C1 allows the AC signal to pass through while blocking the transmission of the DC component. Therefore, the first capacitor C1 isolates the DC component in the AC square wave signal, ensuring that subsequent circuits within the signal receiving module only receive the AC square wave signal, thus achieving effective transmission of the AC square wave signal.
[0029] Based on this, the receiving circuit realizes signal transmission between the signal receiving module and the power line through capacitive coupling. This eliminates the need to consider circuit matching and tuning issues for high-frequency signals in the capacitive coupling communication system, resulting in a simple structure that is easy to miniaturize and integrate. Furthermore, the capacitor radiates fewer electromagnetic waves when it is working, making it less likely to interfere with surrounding electromagnetic devices. Ambient electromagnetic waves only affect the capacitance of the capacitor and do not directly affect the signal waveform of the capacitive coupling, thus making it less susceptible to interference from surrounding electromagnetic devices.
[0030] In practical applications, although capacitively coupled signals are less prone to interference from surrounding electromagnetic devices, parasitic capacitance can form between any two conductors in high-frequency circuits. This is particularly detrimental to capacitively coupled systems because parasitic capacitance introduces additional noise and signal attenuation, reducing signal integrity. Furthermore, capacitive coupling is highly sensitive to surrounding electric fields and is easily affected by stray electric fields, impacting signal transmission quality and stability. Therefore, filtering and shaping circuits and voltage comparison circuits are introduced into the signal receiving module to overcome parasitic capacitance and stray electric field interference.
[0031] The output of the receiving circuit is connected to the input of the filtering and shaping circuit, allowing the AC square wave signal to enter the filtering and shaping circuit for filtering and shaping. The filtering and shaping circuit consists of a first resistor R1, a second capacitor C2, and a Zener diode D1. The connections of each component are as follows: one end of the first resistor R1 is connected to the first capacitor C1, allowing the AC square wave signal to be transmitted to the filtering and shaping circuit; the other end of the first resistor R1 is connected in series with the second capacitor C2; the second capacitor C2 is connected in parallel with the Zener diode D1 and grounded; that is, one end of the second capacitor C2 and the cathode of the Zener diode D1 are connected to the other end of the first resistor R1, and the other end of the second capacitor C2 and the anode of the Zener diode D1 are grounded.
[0032] In the filtering and shaping circuit, the first resistor R1 and the second capacitor C2 form an RC filter. The RC filter limits the rate of change of the signal through the first resistor R1 and smooths the signal through the second capacitor C2, removing high-frequency noise and small-amplitude interference. This filters out small interference signals in the AC square wave signal. The first resistor R1 and the Zener diode D1 are responsible for shaping the AC square wave signal into a positive half-axis square wave signal. The Zener diode D1 allows current to flow in only one direction. When the AC square wave signal passes through the Zener diode D1, the negative half-cycle signal is blocked, and only the positive half-cycle signal can pass through, thus shaping the AC square wave signal into a positive half-axis square wave signal. This process ensures that subsequent circuits only process positive signals and avoid the influence of negative signals on the circuit. In the filtering and shaping circuit, the Zener diode D1 is a Zener diode that can regulate the output voltage to a specified voltage range. This means that when the amplitude of the input signal exceeds a certain threshold, the Zener diode D1 will conduct, limiting the output voltage and preventing subsequent circuits from being damaged by excessive voltage. With the combined action of the first resistor R1 and the second capacitor C2, the rectified signal can be further smoothed. The second capacitor C2 charges and stores energy during the rectification process. When the input signal drops, the second capacitor C2 releases the stored energy to help maintain the voltage of the output signal, forming a smoother positive half-axis square wave signal.
[0033] Then, the positive half-axis square wave signal output by the filtering and shaping circuit is transmitted to the voltage comparison circuit, which includes comparator U5. Pin 1 of comparator U5 is connected to the output of the filtering and shaping circuit, and the positive half-axis square wave signal from the filtering and shaping circuit is transmitted to comparator U5 from pin 1. Pin 2 of comparator U5 is connected to the reference voltage. Comparator U5 compares the positive half-axis square wave signal with the reference voltage. Based on the comparison result, comparator U5 outputs a square wave signal. If the voltage of the positive half-axis square wave signal is higher than the reference voltage, a high-level signal is output; if the voltage of the positive half-cycle square wave signal is lower than the reference voltage, a low-level signal is output.
[0034] In practical applications, comparator U5 is powered by a single power supply. Figure 1 The seventh power supply VCC6 is used to provide power voltage for comparator U5.
[0035] In this embodiment, the receiving circuit, filtering and shaping circuit, and voltage comparison circuit in the signal receiving module process the AC square wave signal on the power line to achieve filtering, shaping, and other processing of the AC square wave signal. This enables the signal receiving module to provide a more accurate and regular square wave pulse signal, ensuring that the square wave signal output by the signal receiving module meets the input requirements of the downstream module.
[0036] In one embodiment, in the voltage comparison circuit, a second resistor R2 is connected between pin 1 of comparator U5 and the first resistor R1. That is, the positive half-axis square wave signal output from the filter and shaping circuit is first transmitted to the second resistor R2, and then enters comparator U5 from pin 1. Here, the second resistor R2 mainly limits the current flowing through the circuit to prevent excessive current from damaging comparator U5. Simultaneously, in the event of a circuit fault or short circuit, the second resistor R2 can limit the increase in current, preventing overload damage to other components. In practical applications, the operating voltage of the circuit, the expected maximum current, and the input requirements of subsequent circuits need to be considered when setting the resistance value of the second resistor R2, so that the second resistor R2 can effectively protect the circuit without affecting signal transmission.
[0037] In one embodiment, the voltage comparison circuit further includes a third resistor R3 and a fourth resistor R4. One end of the third resistor R3 is connected to one end of the fourth resistor R4 and is connected to the second resistor R2. That is, one end of the third resistor R3 and one end of the fourth resistor R4 are connected between the second resistor R2 and the first resistor R1, so that the second resistor R2, the third resistor R3, and the fourth resistor R4 are all connected to the first resistor R1. The other end of the third resistor R3 is connected to the first power supply VCC1, and the other end of the fourth resistor R4 is grounded.
[0038] In this circuit, the third resistor R3, the fourth resistor R4, and the connected first power supply VCC1 form a voltage divider circuit. The function of this voltage divider circuit is to divide the first power supply VCC1 to generate an input voltage suitable for pin 1 of comparator U5. The input voltage at pin 1 of comparator U5 can be calculated using the following formula:
[0039]
[0040] Since the voltage of the power line may fluctuate, the voltage input to comparator U5 is biased and adjusted by the voltage of the connection point between the first capacitor C1 and the power line through the voltage divider circuit. This ensures that the input voltage of pin 1 of comparator U5 is within the operating voltage range of comparator U5, thus ensuring that the square wave signal input to pin 1 of comparator U5 is stable and can be compared with the reference voltage at a stable voltage level.
[0041] In one embodiment, the voltage comparison circuit further includes a fifth resistor R5 and a sixth resistor R6. Pin 2 of comparator U5 is connected to one end of the fifth resistor R5 and one end of the sixth resistor R6. The other end of the fifth resistor R5 is connected to the second power supply VCC2, and the other end of the sixth resistor R6 is grounded. In this circuit, the fifth resistor R5, the sixth resistor R6, and the second power supply VCC2 form a voltage divider circuit. The main function of this circuit is to divide the second power supply VCC2 to generate a stable reference voltage for use by pin 2 of comparator U5. The reference voltage of the voltage divider U5 can be calculated using the following formula:
[0042]
[0043] In practical applications, the voltage divider effect of the fifth resistor R5 and the sixth resistor R6 ensures that the reference voltage remains stable when comparator U5 is working, thereby guaranteeing the accuracy of the comparison result of comparator U5.
[0044] In one embodiment, pin 2 of comparator U5 is connected to one end of the fifth resistor R5 and one end of the sixth resistor R6 via the seventh resistor R7. The main function of the seventh resistor R7 is to limit the current flowing through the circuit and prevent excessive current from damaging subsequent components (such as comparator U5).
[0045] In one embodiment, in the voltage comparison circuit, the first power supply VCC1 is connected in series with the eighth resistor R8 and connected to the output terminal of comparator U5. In this circuit, the eighth resistor R8 is connected to the first power supply VCC1 to form a bias voltage source. The eighth resistor R8 is directly connected to the output terminal of comparator U5 to ensure that the output signal of comparator U5 can be biased and adjusted through the eighth resistor R8, so that the output signal of comparator U5 is within an appropriate voltage range, which helps to improve the stability of the output signal of comparator U5.
[0046] In one embodiment, in the voltage comparison circuit, pin 2 of comparator U5 is connected to the ninth resistor R9 and then to the output of comparator U5, thus forming a feedback loop. This feedback mechanism enables comparator U5 to operate in closed-loop mode, thereby improving the stability and response speed of comparator U5. The resistance value of the ninth resistor R9 directly affects the bandwidth of comparator U5. By adjusting the resistance value of the ninth resistor R9, the frequency response characteristics of comparator U5 can be changed, thereby optimizing the circuit performance.
[0047] In the above embodiments, the signal receiving module in the capacitively coupled communication system consists of a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit. The receiving circuit receives AC square wave signals from the power line through capacitive coupling. The receiving AC square wave signals are then processed by the filtering and shaping circuit and the voltage comparison circuit to output accurate and regular square wave pulse signals. This avoids the impact of noise and signal attenuation generated in capacitively coupled communication on signal reception, ensuring signal integrity, transmission quality, and stability.
[0048] In one embodiment, the capacitively coupled communication system includes a signal transmitting module in addition to the signal receiving module. The signal transmitting module is used to transmit signals to the power line via capacitive coupling, thereby achieving signal transmission through the power line.
[0049] like Figure 2 As shown, Figure 2 A schematic diagram of the circuit structure of the signal transmitting module of a capacitively coupled communication system is shown. The signal transmitting module includes four MOSFETs (U1, U2, U3, and U4). The drain of the first MOSFET U1 is connected to the fourth power supply VCC4. The source of the first MOSFET U1 is connected to the drain of the second MOSFET U2 and connected to one end of the third capacitor C3. The source of the second MOSFET U2 is connected to the drain of the third MOSFET U3 and grounded through resistor R1. The source of the third MOSFET U3 is connected to the drain of the fourth MOSFET U4 and connected to the other end of the third capacitor C3 and one end of the fourth capacitor C4. The source of the fourth MOSFET U4 is connected to the fifth power supply VCC5.
[0050] In this circuit configuration, one end of the third capacitor C3 can be connected to the fourth power supply VCC4 through the first MOSFET U1, or grounded through the second MOSFET U2; the other end of the third capacitor C3 can be grounded through the third MOSFET U3, or connected to the fifth power supply VCC5 through the fourth MOSFET U4. Therefore, by selecting the MOSFETs that need to be turned on at both ends of the third capacitor C3, the circuit connected to both ends of the third capacitor C3 can be changed, thus changing the polarity of the third capacitor C3 and generating an AC square wave signal.
[0051] In this circuit, the gates of the first MOSFET U1, the second MOSFET U2, the third MOSFET U3, and the fourth MOSFET U4 are connected to the controller and receive gate control signals output by the controller. These gate control signals control the conduction state of the first MOSFET U1, the second MOSFET U2, the third MOSFET U3, and the fourth MOSFET U4. In practical applications, the first MOSFET U1 and the fourth MOSFET U4 are PMOS transistors, and the second MOSFET U2 and the third MOSFET U3 are NMOS transistors. When the control signals for the first MOSFET U1 and the second MOSFET U2 are low, and the control signals for the third MOSFET U3 and the fourth MOSFET U4 are high, the first MOSFET U1 and the third MOSFET U3 are not conducting, while the second MOSFET U2 and the fourth MOSFET U4 are conducting. At this time, one end of the third capacitor C3 is grounded through the conducting second MOSFET U2 and resistor R1, and the other end is connected to the fifth power supply VCC5 through the conducting fourth MOSFET U4. When the control signals of the first MOSFET U1 and the second MOSFET U2 are high, and the control signals of the third MOSFET U3 and the fourth MOSFET U4 are low, the first MOSFET U1 and the third MOSFET U3 are turned on, while the second MOSFET U2 and the fourth MOSFET U4 are not turned on. At this time, one end of the third capacitor C3 is connected to the fourth power supply VCC4 through the turned-on first MOSFET U1, and the other end is grounded through the turned-on third MOSFET U3 and resistor R1.
[0052] The controller alternately sends gate control signals, causing the polarity of the three capacitors C3 to switch alternately, thereby generating an AC square wave signal superimposed on the two ends of the three capacitors C3.
[0053] In the process of generating an AC square wave signal, such as Figure 3 As shown, Figure 3 A pulse timing diagram of a MOS transistor is shown. The frequency of the encoded signal is... The amplitude of the AC square wave signal is The charging time of the third capacitor C3 (from amplitude 0 to amplitude) Or from the amplitude (to amplitude 0) The duty cycle of the first MOSFET U1 and the fourth MOSFET U4 is The duty cycle of the signals of the second MOSFET U2 and the third MOSFET U3 is ,but:
[0054]
[0055] Furthermore, the turn-off delays of the first MOSFET U1, the second MOSFET U2, the third MOSFET U3, and the fourth MOSFET U4 are all less than [a certain value]. The turn-off delay refers to the time delay required for the MOSFET to transition from the on state to the off state after the control signal changes state (e.g., from high to low). This time is the time interval from the instant the control signal changes until the MOSFET completely stops conducting. If the turn-off delay is less than... This ensures that the MOSFET operates at a certain frequency. The switching can be completed in a timely manner, thereby ensuring that the AC square wave signal across the third capacitor C3 can be formed smoothly without significant lag or distortion.
[0056] exist Figure 3 In the pulse timing diagram, the midpoint of the high level of the first MOS transistor U1 and the second MOS transistor U2 is aligned with the midpoint of the low level of the third MOS transistor U3 and the fourth MOS transistor U4 (the timing points are the same), and the midpoint of the low level of the first MOS transistor U1 and the second MOS transistor U2 is aligned with the midpoint of the high level of the third MOS transistor U3 and the fourth MOS transistor U4.
[0057] In practical applications, the charging and discharging times of the third capacitor C3 should ideally be the same. If there is a difference between the charging and discharging times of the third capacitor C3, the longer time should be used as the charging and discharging time. The charging and discharging time of the third capacitor C3 needs to meet the above requirements. The requirements are specified, or the signal duty cycles of the first MOSFET U1, the second MOSFET U2, the third MOSFET U3, and the fourth MOSFET U4 are adjusted to meet the above requirements. Limited requirements.
[0058] The other end of the fourth capacitor C4 is connected to the power line and the sixth power supply VIN. Thus, the fourth capacitor C4 couples the AC square wave signal generated by the third capacitor C3 to the power line, and the power line then transmits the AC square wave signal along with the power supplied by the sixth power supply VIN. It should be noted that because the MOSFET has an internal body diode, turning on the sixth power supply VIN will not affect the operation of the fourth power supply VCC4 and the fifth power supply VCC5; therefore, the power supply voltage of the power line will not affect the operation of the signal transmitting module.
[0059] In one embodiment, a fifth capacitor C5 is connected between the fourth power supply VCC4 and the tenth resistor R10 in the signal transmission module. The fifth capacitor C5 can provide instantaneous current when the power supply voltage fluctuates, which helps to smooth the power supply and reduce power supply noise. At the same time, it can also effectively filter high-frequency noise, which helps to reduce noise propagation on the power supply line and ensure a stable power supply.
[0060] In one embodiment, the tenth resistor R10 in the signal transmitting module is an adjustable resistor. When the resistance of the tenth resistor R10 increases, the voltage across the fifth capacitor C5 decreases, thereby reducing the amplitude of the AC square wave signal across the third capacitor C3. When the resistance of the tenth resistor R10 decreases, the voltage across the fifth capacitor C5 increases, thereby increasing the amplitude of the AC square wave signal across the third capacitor C3. Thus, by adjusting the resistance of the tenth resistor R10, the amplitude of the AC square wave signal output by the third capacitor C3 can be set, enabling the signal transmitting module to generate an AC square wave signal with the required amplitude.
[0061] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0062] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0063] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A capacitively coupled communication system, characterized in that, The signal receiving module of the capacitively coupled communication system consists of a receiving circuit, a filtering and shaping circuit, and a voltage comparison circuit. The receiving circuit includes a first capacitor (C1) connected to the power line. The filtering and shaping circuit includes a first resistor (R1), a second capacitor (C2), and a Zener diode (D1). One end of the first resistor (R1) is connected to the first capacitor (C1), and the other end of the first resistor (R1) is connected in series with the second capacitor (C2). The second capacitor (C2) is connected in parallel with the Zener diode (D1) and grounded. The voltage comparison circuit includes a comparator (U5), pin 1 of which is connected to the output of the filter shaping circuit, and pin 2 of which is connected to a reference voltage.
2. The capacitively coupled communication system according to claim 1, characterized in that, A second resistor (R2) is also connected between pin 1 of the comparator (U5) and the first resistor (R1).
3. The capacitively coupled communication system according to claim 2, characterized in that, One end of the third resistor (R3) is connected to one end of the fourth resistor (R4) and connected to the second resistor (R2). The other end of the third resistor (R3) is connected to the first power supply (VCC1), and the other end of the fourth resistor (R4) is grounded.
4. The capacitively coupled communication system according to claim 1, characterized in that, Pin 2 of the comparator (U5) is connected to one end of the fifth resistor (R5) and one end of the sixth resistor (R6); the other end of the fifth resistor (R5) is connected to the second power supply (VCC2); and the other end of the sixth resistor (R6) is grounded.
5. The capacitively coupled communication system according to claim 4, characterized in that, Pin 2 of the comparator (U5) is connected to one end of the fifth resistor (R5) and one end of the sixth resistor (R6) via the seventh resistor (R7).
6. The capacitively coupled communication system according to claim 1, characterized in that, The third power supply (VCC3) is connected in series with the eighth resistor (R8) and then connected to the output of the comparator (U5).
7. The capacitively coupled communication system according to claim 1, characterized in that, Pin 2 of the comparator (U5) is connected to the ninth resistor (R9) and is connected to the output terminal of the comparator (U5).
8. The capacitively coupled communication system according to claim 1, characterized in that, The capacitively coupled communication system further includes a signal transmitting module. In the signal transmitting module, the drain of the first MOS transistor (U1) is connected to the fourth power supply (VCC4); the source of the first MOS transistor (U1) is connected to the drain of the second MOS transistor (U2) and connected to one end of the third capacitor (C3); the source of the second MOS transistor (U2) is connected to the drain of the third MOS transistor (U3) and grounded through the tenth resistor (R10); the source of the third MOS transistor (U3) is connected to the drain of the fourth MOS transistor (U4) and connected to the other end of the third capacitor (C3) and one end of the fourth capacitor (C4); the fourth MOS transistor (U4) is connected to the fifth power supply (VCC5). The gates of the first MOS transistor (U1), the second MOS transistor (U2), the third MOS transistor (U3), and the fourth MOS transistor (U4) are respectively connected to the controller and receive the gate control signal output by the controller; The two ends of the third capacitor (C3) generate AC square wave signals under different gate control signals; The other end of the fourth capacitor (C4) is connected to the power line and the sixth power source (VIN) to transmit the AC square wave signal to the power line.
9. The capacitively coupled communication system according to claim 8, characterized in that, The fifth capacitor (C5) is connected between the tenth resistor (R10) and the third power supply (VCC3).
10. The capacitively coupled communication system according to claim 9, characterized in that, The tenth resistor (R10) is an adjustable resistor.