LED chip

By designing a structure in the LED chip that expands the transparent conductive layer and contracts the current blocking layer, the problem of wire breakage during wire bonding is solved, thus improving the reliability and efficiency of wire bonding.

CN223859589UActive Publication Date: 2026-01-30JIANGXI CHANGELIGHT CO LTD
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Patent Information

Application Number
CN202520142569.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-01-21
Publication Date
2026-01-30
Estimated Expiration
2035-01-21

AI Technical Summary

Technical Problem

During the packaging and wire bonding process of existing LED chips, the leads are easily broken at the connection shoulder, resulting in unstable connections.

Method used

The transparent conductive layer is designed to extend outward along the shoulder where the pad and lead are connected, and a gap is formed there. The current blocking layer contracts at the shoulder to avoid direct contact between the pad and the transparent conductive layer, thus improving the contact interface at the shoulder.

Benefits of technology

It improves the reliability of the wire bonding, avoids the problem of the lead being broken at the connection shoulder, and enhances the stability and efficiency of the wire bonding.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an LED chip, which comprises a substrate and an epitaxial layer, the epitaxial layer comprises an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer, the chip further comprises a current blocking layer arranged on the P-type semiconductor layer, a transparent conducting layer arranged on the current blocking layer, and a P-type electrode arranged on the transparent conducting layer, the P-type electrode comprises a bonding pad part and a lead part connected with the bonding pad part; wherein the transparent conductive layer expands outwards in the direction of the connecting shoulder of the bonding pad part and the lead part, so that the part, at the connecting shoulder, of the bonding pad part is prevented from being in direct contact with the transparent conductive layer. According to the utility model, the problem in the prior art that the lead wire is easy to be broken by welding at the connecting shoulder part when the welding wire is packaged in the LED manufacturing process is solved.
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Description

TECHNICAL FIELD

[0001] The utility model relates to a light emitting chip technical field, specifically related to a LED chip. BACKGROUND

[0002] With the gradual development of LED, LED lighting has completely replaced the traditional illumination light source, following the pace of technological innovation, intelligent manufacturing scale, automation, digitization, the current LED market competition is fierce, each LED packaging plant pursues high cost performance, high production efficiency, high quality, the precision and efficiency requirement of packaging wire is higher and higher, the wire reliability requirement is higher and higher.

[0003] The conventional LED chip, the pad and the lead connection shoulder in the P-type electrode are the film layer stacking mode of the current blocking layer / transparent conductive layer / pad, and the lead is easily welded off at the connection shoulder during packaging wire. UTILITY MODEL CONTENTS

[0004] In view of the deficiency of prior art, the utility model aims at providing a LED chip, which aims at solving the problem that the lead is easily welded off at the connection shoulder during packaging wire in the prior art.

[0005] One aspect of the utility model provides a LED chip, the chip includes a substrate and an epitaxial layer, the epitaxial layer includes an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer,

[0006] The chip further includes a current blocking layer arranged on the P-type semiconductor layer, a transparent conductive layer arranged on the current blocking layer, and a P-type electrode arranged on the transparent conductive layer, the P-type electrode includes a pad portion and a lead portion for connecting the pad portion;

[0007] Wherein, the transparent conductive layer expands outward along the direction of the connection shoulder between the pad portion and the lead portion, to avoid the direct contact between the part of the pad portion at the connection shoulder and the transparent conductive layer.

[0008] Further, the above-mentioned LED chip, wherein: the transparent conductive layer forms a notch extending in the direction of the lead portion at the connection shoulder, so that the transparent conductive layer expands outward along the direction of the connection shoulder between the pad portion and the lead portion.

[0009] Further, the above-mentioned LED chip, wherein: the notch includes a circular arc portion arranged away from the pad portion and a lower edge portion respectively extending outward from both ends of the circular arc portion.

[0010] Further, the LED chip as claimed in the preceding, wherein: the current blocking layer is contracted along the direction of the connecting shoulder between the pad portion and the lead portion, so that the part of the current blocking layer at the connecting shoulder is vacant.

[0011] Further, the LED chip as claimed in the preceding, wherein: the part of the current blocking layer and the transparent conductive layer towards the side of the connecting shoulder is in the same vertical plane.

[0012] Further, the LED chip as claimed in the preceding, wherein: the transparent conductive layer is made of ITO, IZO or other transparent conductive material.

[0013] Further, the LED chip as claimed in the preceding, wherein: the thickness of the current blocking layer is 2100A-4100A.

[0014] Further, the LED chip as claimed in the preceding, wherein: the thickness of the transparent conductive layer is 600A-1100A.

[0015] Another object of the present application is to provide a preparation method of the LED chip, which is used for preparing the LED chip as claimed in the preceding, and the preparation method comprises:

[0016] providing a substrate and making an epitaxial layer on the substrate, wherein the epitaxial layer comprises an N-type semiconductor layer, a multi-quantum well region and a P-type semiconductor layer;

[0017] sequentially making a current blocking layer, a transparent conductive layer and a P-type electrode on the P-type semiconductor layer; wherein the transparent conductive layer is outwardly expanded along the direction of the connecting shoulder between the pad portion and the lead portion, so as to avoid the direct contact between the part of the pad portion at the connecting shoulder and the transparent conductive layer.

[0018] Further, the preparation method of the LED chip as claimed in the preceding, wherein: the step of sequentially making the current blocking layer, the transparent conductive layer and the P-type electrode on the P-type semiconductor layer comprises:

[0019] designing a photoetching plate for the outward expansion of the transparent conductive layer at the connecting shoulder between the pad portion and the lead portion, and obtaining the transparent conductive layer pattern through the photoetching plate;

[0020] etching and removing the transparent conductive layer pattern to obtain the transparent conductive layer.

[0021] The LED chip shown in the utility model expands the transparent conductive layer along the direction of the connecting shoulder of the pad part of the P-type electrode and the lead part, so as to avoid the direct contact between the pad part of the P-type electrode and the transparent conductive layer at the connecting shoulder, improve the pad contact film layer interface at the connecting shoulder, and avoid the problem that the shoulder of the lead part is easily welded off during the packaging welding.

[0022] The additional aspects and advantages of the utility model will be partly given in the following description, partly will become obvious from the following description, or be understood through the practice of the utility model. BRIEF DESCRIPTION OF DRAWINGS

[0023] The above and / or additional aspects and advantages of the utility model will become apparent and more readily appreciated from the following description of the embodiments, with reference to the following drawings, in which:

[0024] Figure 1 It is a plane schematic view of the structure of one kind of LED chip in an embodiment of the utility model;

[0025] Figure 2 It is a plane schematic view of the structure of another kind of LED chip in an embodiment of the utility model;

[0026] Figure 3 It is a flow schematic view of the preparation method of the LED chip in the second embodiment of the utility model; DETAILED DESCRIPTION

[0027] In order to make the purpose, features and advantages of the utility model more obvious and easy to understand, the specific implementation of the utility model will be described in detail below with reference to the drawings. The drawings show several embodiments of the utility model. However, the utility model can be realized in many different forms, and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the utility model more thorough and comprehensive.

[0028] Embodiment one

[0029] In order to solve the problem that the lead is easily welded off at the connecting shoulder during the packaging welding in the prior art, the first embodiment of the utility model provides an LED chip, which comprises a substrate and an epitaxial layer, wherein the epitaxial layer comprises an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer. Specifically, the material of the substrate can be understood by those skilled in the art, and will not be described here.

[0030] At the same time, as shown in FIG. 1, the lead part of the LED chip is provided with a shoulder, and the shoulder is connected with the pad part of the P-type electrode. Figure 1As shown, the chip also includes a current blocking layer 10 disposed on a P-type semiconductor layer, a transparent conductive layer 20 disposed on the current blocking layer 10, and a P-type electrode 30 disposed on the transparent conductive layer 20. The P-type electrode includes a pad portion 31 and a lead portion 32 for connecting to the pad portion 31. In practice, through a large number of experimental verifications and simulated packaging wire bonding batch data, as well as big data pattern statistics, it was finally found that the root cause of the breakage at the shoulder of the lead portion 32 was that the pad portion 31 was in direct contact with the transparent conductive layer 20, resulting in a poor contact interface and causing the lead portion 32 to be easily broken. Therefore, in this embodiment of the invention, the situation is improved by changing the contact between the pad portion 31 and the transparent conductive layer 20. Specifically, the transparent conductive layer 20 expands outward along the direction of the connection shoulder between the pad portion 31 and the lead portion 32 to avoid direct contact between the portion of the pad portion 31 at the connection shoulder and the transparent conductive layer 20. More specifically, the transparent conductive layer 20 forms a notch 201 extending towards the lead portion 32 at the connection shoulder, thereby allowing the transparent conductive layer 20 to expand outward along the direction of the connection shoulder between the pad portion 31 and the lead portion 32, that is, removing part of the transparent conductive layer 20 at the shoulder connection between the pad portion 31 and the lead portion 32. For example, the notch 201 includes an arc portion disposed away from the pad portion 31 and a lower edge portion extending outward from both ends of the arc portion, to avoid stress concentration.

[0031] As an example and not a limitation, in specific implementations, the transparent conductive layer 20 is made of ITO, IZO or other transparent conductive materials, and the thickness of the transparent conductive layer 20 is 600A to 1100A, such as 600A, 800A, etc., and the thickness of the current blocking layer 10 is 2100A to 4100A, such as 2100A, 3000A, etc.

[0032] In addition, in some optional embodiments of this utility model, in order to further improve the film layer interface under the pad portion 31, such as... Figure 2 As shown, the current blocking layer 10 contracts along the shoulder connecting the pad portion 31 and the lead portion 32, leaving a gap in the current blocking layer 10 at the shoulder. That is, the portions of the transparent conductive layer 20 and the current blocking layer 10 at the shoulder of the pad portion 31 are removed simultaneously. In a specific implementation, the cross-sections of the portions of the current blocking layer 10 and the transparent conductive layer 20 facing the shoulder are in the same vertical plane. This ensures that the gaps below the shoulder of the pad portion 31 are aligned between the transparent conductive portion and the current blocking portion.

[0033] In summary, the LED chip proposed in the above embodiments of the present application expands the transparent conductive layer outward along the direction of the connecting shoulder between the pad part and the lead part of the P-type electrode, so as to avoid the direct contact between the pad part of the P-type electrode and the transparent conductive layer at the connecting shoulder, improve the pad contact film layer interface at the connecting shoulder, and avoid the problem that the shoulder of the lead part is easily welded off during the packaging welding.

[0034] Embodiment two

[0035] Please refer to Figure 3 The second embodiment of the present application provides a preparation method of the LED chip, which is used for preparing the LED chip in the first embodiment, and the preparation method comprises steps S10-S11.

[0036] Step S10, providing a substrate and making an epitaxial layer on the substrate, wherein the epitaxial layer comprises an N-type semiconductor layer, a multi-quantum well region and a P-type semiconductor layer.

[0037] Step S11, sequentially making a current blocking layer, a transparent conductive layer and a P-type electrode on the P-type semiconductor layer.

[0038] In the present application, the transparent conductive layer is expanded outward along the direction of the connecting shoulder between the pad part and the lead part, so as to avoid the direct contact between the pad part and the transparent conductive layer at the connecting shoulder.

[0039] Further, the step of sequentially making the current blocking layer, the transparent conductive layer and the P-type electrode on the P-type semiconductor layer comprises:

[0040] designing a photoetching plate for expanding the transparent conductive layer at the connecting shoulder between the pad part and the lead part, and obtaining the transparent conductive layer layer through the photoetching plate;

[0041] etching and removing the transparent conductive layer layer to obtain the transparent conductive layer.

[0042] Specifically, the epitaxial layer is cleaned, and a MESA photoetching pattern is prepared by uniform glue exposure and development, and the MESA region is etched by ICP, and then the photoresist is removed; then a current blocking layer is obtained by depositing a SiO2 blocking layer on the surface of the wafer source by a PECVD machine, wherein the thickness is 2100A-4100A, then a transparent conductive layer is deposited on the surface of the substrate by a sputtering process, and the thickness is 600-1100A, the transparent conductive layer is annealed by a rapid annealing furnace, wherein the annealing temperature is 500-650 DEG C, the annealing time is 1-10 min, and then the preparation of the P-type electrode is carried out, the P-type electrode includes a pad part and a lead part, and generally, an insulating layer is deposited before the preparation of the P-type electrode, in the specific implementation, a corresponding mask is made by using photoresist as a mask, and then the current blocking layer, the transparent conductive layer, the insulating layer and the like are realized by photoetching, etching and photoresist removal.

[0043] More specifically, in order to realize the transparent conductive layer vacancy below the connecting shoulder between the pad part and the lead part, when the transparent conductive layer is made, a photoetching plate corresponding to the structure of the transparent conductive layer is designed, and then the transparent conductive layer layer is obtained by photoetching, and then the transparent conductive layer is obtained by etching and photoresist removal, and in order to realize the transparent conductive layer and the current blocking layer vacancy below the connecting shoulder between the pad part and the lead part, the photoetching plate of the current blocking layer is designed first, and then the current blocking layer layer is obtained by current blocking layer photoetching, and then the current blocking layer is obtained by current blocking layer etching and photoresist removal; then the photoetching plate corresponding to the structure of the transparent conductive layer is designed, and then the transparent conductive layer layer is obtained by photoetching, and then the transparent conductive layer is obtained by etching and photoresist removal.

[0044] In summary, the preparation method of the LED chip in the above embodiment of the present application expands the transparent conductive layer in the direction of the connecting shoulder between the pad part and the lead part of the P-type electrode, so as to avoid the direct contact between the part of the pad part at the connecting shoulder and the transparent conductive layer, improve the pad contact film layer interface at the connecting shoulder, and avoid the problem that the shoulder of the lead part is easily welded off during the packaging of the welding wire. The problem that the lead wire is easily welded off at the connecting shoulder during the packaging of the welding wire in the prior art is solved.

[0045] The above-mentioned embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it cannot be understood as the limitation of the patent scope of the present application. It should be pointed out that, for ordinary skilled persons in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the protection scope of the present application patent should be subject to the appended claims.

Claims

1. An LED chip, the chip comprising a substrate and an epitaxial layer, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer, characterized in that: the chip further comprises a current blocking layer disposed on the P-type semiconductor layer, a transparent conductive layer disposed on the current blocking layer, and a P-type electrode disposed on the transparent conductive layer, the P-type electrode comprising a pad portion and a lead portion for connecting with the pad portion; wherein the transparent conductive layer is outwardly expanded along the direction of the connecting shoulder between the pad portion and the lead portion, so as to avoid the direct contact between the part of the pad portion at the connecting shoulder and the transparent conductive layer. The transparent conductive layer is formed with a notch extending towards the lead portion at the connecting shoulder, so as to make the transparent conductive layer outwardly expanded along the direction of the connecting shoulder between the pad portion and the lead portion. The notch comprises a circular arc portion away from the pad portion and a lower edge portion outwardly extended from both ends of the circular arc portion, respectively.

2. The LED chip of claim 1, wherein: The current blocking layer is shrunk along the direction of the connecting shoulder between the pad portion and the lead portion, so as to make the part of the current blocking layer at the connecting shoulder vacant.

3. The LED chip of claim 2, wherein: The parts of the current blocking layer and the transparent conductive layer towards the side of the connecting shoulder are in the same vertical plane.

4. The LED chip of claim 1, wherein: The transparent conductive layer is made of ITO, IZO or other transparent conductive materials.

5. The LED chip of claim 4, wherein: The thickness of the current blocking layer is 2100A-4100A.

6. The LED chip of any of claims 1-5, wherein: The thickness of the transparent conductive layer is 600A-1100A.

7. The LED chip of any of claims 1-5, wherein: ​ 8. The LED chip of any of claims 1-5, wherein: ​