Display device and electronic device

Abstract

The utility model relates to a display device and an electronic device. The display device may include a display layer, and a light control layer disposed on the display layer, the light control layer may include a first bank, a metal layer at least partially disposed on the first bank and exposing a top surface of the first bank, and a second bank at least partially disposed on the metal layer and exposing the top surface of the first bank.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0011140, filed on January 24, 2024, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to a display device, a method of manufacturing a display device, and an electronic device including a display device. Background Technology

[0004] Recently, with the increasing interest in information display, research and development of display devices are ongoing. Utility Model Content

[0005] The embodiments provide a display device in which light emission efficiency can be improved, a method of manufacturing a display device, and an electronic device including a display device.

[0006] The embodiments also provide a display device in which process efficiency can be improved, a method for manufacturing a display device, and an electronic device including a display device.

[0007] The embodiments also provide a display device in which damage to the layers forming the display device is prevented, a method of manufacturing the display device, and an electronic device including the display device.

[0008] According to one aspect of this disclosure, a display device is provided, the display device may include: a display layer, and a light control layer disposed on the display layer, the light control layer may include a first dike, a metal layer that may have at least a portion disposed on the first dike and can expose the top surface of the first dike, and a second dike that may have at least a portion disposed on the metal layer and can expose the top surface of the first dike.

[0009] The light control layer may include a light control structure, at least a portion of which may be disposed in the region surrounded by the first dike. The light control structure may include a color conversion layer comprising quantum dots and a light scattering layer comprising scatterers.

[0010] The display device may further include: a first sub-pixel region to which light of a first color can be provided; a second sub-pixel region to which light of a second color can be provided; and a third sub-pixel region to which light of a third color can be provided. The color conversion layer may include a first color conversion layer disposed in the first sub-pixel region and a second color conversion layer disposed in the second sub-pixel region. The light scattering layer may be disposed in the third sub-pixel region.

[0011] The display device may further include a color filter layer, the color filter layer including a first color filter overlapping the first sub-pixel region, a second color filter overlapping the second sub-pixel region, and a third color filter overlapping the third sub-pixel region. The display layer may include a light-emitting element that provides light including the light component of the third color.

[0012] Each of the first and second dikes may be translucent. The metal layer may be a reflective metal layer.

[0013] The metal layer can be completely covered by the second dike in the plan view.

[0014] The side surface of the metal layer can be exposed by the second dike.

[0015] The metal layer may include a structure that is recessed relative to the second dike.

[0016] The display device may further include a spacer disposed on the top surface of the first embankment. The spacer and the second embankment may be formed of the same material.

[0017] The display device may further include a lower cover layer that passivates the second dam and the light control structure. The lower cover layer may contact a portion of the top surface of the first dam that can be exposed by the metal layer.

[0018] The first dike and the second dike can be physically separated from each other.

[0019] The display device may further include: a first sub-pixel region to which light of a first color can be provided; a second sub-pixel region to which light of a second color can be provided; and a third sub-pixel region to which light of a third color can be provided. In a planar view, the first sub-pixel region may not overlap with the first sub-pixel region and the second sub-pixel region, and the first sub-pixel region may overlap with the third sub-pixel region.

[0020] The first color can be red, the second color can be green, and the third color can be blue.

[0021] The first dam may include a scatterer.

[0022] According to another aspect of this disclosure, a method for manufacturing a display device may be provided, the method comprising: manufacturing a display layer and forming a light control layer on the display layer, wherein the formation of the light control layer may comprise: patterning a first dam, forming a substrate metal layer covering the first dam, patterning a second dam and spacers covering the substrate metal layer, removing at least a portion of the substrate metal layer that may be exposed by the second dam, and forming a light control structure in a region surrounded by the first dam.

[0023] The metal layer including the reflective surface can be formed by removing at least a portion of the base metal layer. Each of the first and second dikes may include a light-transmitting material. The metal layer may include a reflective material.

[0024] The method may further include forming a lower capping layer that passivates the second dike and the light control structure. In the formation of the lower capping layer, the metal layer may be completely covered by the second dike in a plan view.

[0025] The display device may include: a first sub-pixel region to which light of a first color can be provided; a second sub-pixel region to which light of a second color can be provided; and a third sub-pixel region to which light of a third color can be provided. The formation of the light control structure may include forming a first color conversion layer including a first quantum dot in the first sub-pixel region, forming a second color conversion layer including a second quantum dot in the second sub-pixel region, and forming a light scattering layer including a scatterer in the third sub-pixel region.

[0026] The method may further include forming a lower capping layer that passivates the second dam and the light control structure. The display device may include: a first sub-pixel region to which light of a first color can be provided; a second sub-pixel region to which light of a second color can be provided; and a third sub-pixel region to which light of a third color can be provided. The first dam may include a diffuser, and the first dam may overlap with the third sub-pixel region in a planar view.

[0027] The lower capping layer and the first dam can be in contact with each other in the third sub-pixel region.

[0028] According to an aspect of this disclosure, an electronic device is provided, which may include: a processor configured to transmit input control signals; a display device configured to output image information; and a power module configured to supply power to the display device. The display device may include: a display layer and a light control layer disposed on the display layer, the light control layer including: a first dike; a metal layer having at least a portion disposed on the first dike and exposing the top surface of the first dike; and a second dike having at least a portion disposed on the metal layer and exposing the top surface of the first dike. Attached Figure Description

[0029] An additional understanding of the embodiments of this disclosure will become more apparent from the detailed description of the embodiments with reference to the accompanying drawings, in which:

[0030] Figure 1 This is a schematic plan view illustrating a display device according to an embodiment of the present disclosure;

[0031] Figure 2 This is a schematic plan view illustrating pixels according to embodiments of the present disclosure;

[0032] Figure 3 This is a schematic cross-sectional view illustrating a display device according to an embodiment of the present disclosure;

[0033] Figure 4 This is a schematic cross-sectional view illustrating a display layer according to an embodiment of the present disclosure;

[0034] Figure 5 and Figure 6 It is along Figure 2 The schematic cross-sectional view taken by line A-A' shown in the figure;

[0035] Figure 7 This is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure;

[0036] Figure 8 This is a flowchart illustrating the detailed steps of forming a light control layer on a display layer according to an embodiment of the present disclosure; and

[0037] Figures 9 to 23 This is a schematic cross-sectional view illustrating the process steps of a method for manufacturing a display device according to an embodiment of the present disclosure.

[0038] Figure 24 This is a block diagram of an electronic device according to an embodiment.

[0039] Figure 25 Schematic diagrams illustrating various embodiments of an electronic device. Detailed Implementation

[0040] For purposes of explanation, and to provide a thorough understanding of the various embodiments or implementations of this disclosure, numerous specific details are set forth in the following description. As used herein, “embodiment” and “implementation” are interchangeable terms serving as non-limiting examples of the apparatus or methods disclosed herein. However, it will be apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. These various embodiments are not necessarily exclusive, nor are they intended to limit this disclosure. For example, a particular shape, configuration, and characteristic of one embodiment may be used or implemented in another embodiment.

[0041] Unless otherwise expressly stated, the embodiments shown are to be understood as providing features of this disclosure. Therefore, unless otherwise expressly stated, features, components, modules, layers, films, panels, areas and / or aspects (hereinafter individually or collectively referred to as “elements”) of various embodiments may be combined, separated, interchanged and / or rearranged in other ways without departing from the present invention.

[0042] The use of crosshairs and / or shading in the accompanying drawings is generally provided to clearly define the boundaries between adjacent elements. Therefore, unless explicitly stated otherwise, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for a particular material, material properties, size, scale, commonalities between the elements shown, and / or any other characteristics, properties, etc., of the elements. Furthermore, the size and relative dimensions of elements may be exaggerated in the drawings for clarity and / or descriptive purposes. When embodiments can be implemented differently, the specific process sequence may be performed in a different order than described. For example, two consecutively described processes may be performed substantially simultaneously, or in the reverse order of their description. Additionally, the same reference numerals and / or reference characters denote the same elements.

[0043] When an element or layer is referred to as being "on" another element or layer, "connected to," or "coupled to" another element or layer, the element may be directly on, connected to, or coupled to the other element or layer, or an intermediary element or layer may be present. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly coupled to" another element or layer, an intermediary element or layer is not present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without an intermediary element. Furthermore, the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to the three axes of a Cartesian coordinate system (such as the x-axis, y-axis, and z-axis) and can be interpreted in a broader sense. For example, the first direction DR1, the second direction DR2, and the third direction DR3 can be perpendicular to each other, or they can be different directions that are not perpendicular to each other.

[0044] For the purposes of this disclosure, "at least one of A and B" can be interpreted as only A, only B, or any combination of A and B. Furthermore, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.

[0046] Spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side” (e.g., as in “sidewall”) used herein are for descriptive purposes and thus to describe the relationship between one element (or elements) and another element (or elements) shown in the accompanying drawings. In addition to the orientations depicted in the drawings, spatial relative terms are intended to cover different orientations of the equipment during use, operation, and / or manufacture. For example, if the equipment in the drawings is flipped, an element described as “below” or “under” other elements or features will then be oriented “above” other elements or features. Thus, the term “below” can cover both above and below orientations. Furthermore, the equipment can be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and therefore, the spatial relative terms used herein are interpreted accordingly.

[0047] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” as used herein are intended to include the plural forms as well. Furthermore, when used in this specification, the terms “comprises,” “comprising,” and / or “includes,” indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than as terms of degree, and therefore to describe the inherent deviations in measurements, calculated values, and / or provided values ​​that would be recognized by one of ordinary skill in the art.

[0048] Various embodiments described herein are illustrated with reference to cross-sectional and / or exploded views, which serve as schematic diagrams of examples and / or intermediate structures. Therefore, variations in the shapes shown in the illustrations will be expected due to factors such as manufacturing techniques and / or tolerances. Consequently, the embodiments disclosed herein should not be construed as limited to the specific shapes of the areas shown, but will include deviations in shape caused, for example, by manufacturing processes. In this way, the areas shown in the figures can be schematic in nature, and the shapes of these areas may not reflect the actual shapes of the areas of the device, and are therefore not intended to be limiting.

[0049] In accordance with the conventions of the art, some embodiments are described and illustrated in the accompanying drawings using the terminology of functional blocks, components, and / or modules. Those skilled in the art will understand that these blocks, components, and / or modules are physically implemented by electronic (or optical) circuitry such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, and wiring connections, which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Where blocks, components, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can be selectively driven by firmware and / or software. It is also contemplated that each block, component, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware performing some functions and processors (e.g., one or more programmed microprocessors and associated circuitry) performing other functions. Furthermore, without departing from the scope of the present invention, each block, component, and / or module of some embodiments may be physically separated into two or more interacting and discrete blocks, components, and / or modules. Furthermore, without departing from the scope of this invention, some of the blocks, components, and / or modules of certain embodiments may be physically combined into more complex blocks, components, and / or modules.

[0050] Unless otherwise defined or implied herein, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless expressly defined herein, terms (such as those defined in common dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and in this disclosure, and should not be interpreted in an idealized or overly formal sense.

[0051] Figure 1 This is a schematic plan view illustrating a display device according to an embodiment of the present disclosure. Figure 2 This is a schematic plan view illustrating pixels according to an embodiment of the present disclosure.

[0052] Reference Figure 1 and Figure 2 The display device DD may include a substrate layer BSL and pixels PXL disposed on the substrate layer BSL. Although not shown in the figures, the display device DD may also include driving circuitry (e.g., scan driver and data driver) for driving the pixels PXL, lines, and pads.

[0053] The display device DD (or substrate layer BSL) may include a display area DA and a non-display area NDA. The non-display area NDA may refer to an area other than (or outside) the display area DA. The non-display area NDA may surround at least a portion of the display area DA.

[0054] The substrate layer (BSL) can form the substrate surface of the display device (DD). The substrate layer (BSL) can be a rigid or flexible substrate or film. For example, the substrate layer (BSL) can include a glass material. In another example, the substrate layer (BSL) can include a silicon material. In another example, the substrate layer (BSL) can include polyimide. However, this disclosure is not limited thereto.

[0055] In some embodiments, the substrate layer BSL can be the lower substrate BSUB. For example, as the lower substrate BSUB, the substrate layer BSL can be used to form the display layer DL (see [link to documentation]). Figure 3 ) and the light control layer LCL (see Figure 3 ) matrix substrate.

[0056] The display area DA can refer to the area where pixels PXL are set. The non-display area NDA can refer to the area where pixels PXL are not set. The driving circuits, wires, and pads that can be electrically connected to the pixels PXL in the display area DA can be located in the non-display area NDA.

[0057] According to an embodiment, pixel PXL (or sub-pixel SPX) can be configured according to a stripe arrangement structure or... Arrangement of structures, etc. However, this disclosure is not limited thereto, and various embodiments can be applied in this disclosure.

[0058] According to an embodiment, a pixel PXL (or sub-pixel SPX) may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be a sub-pixel SPX. At least one first sub-pixel SPX1, at least one second sub-pixel SPX2, and at least one third sub-pixel SPX3 may form a pixel portion capable of emitting light of various colors.

[0059] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can emit light of a single color. For example, the sub-pixels SPX can form a sub-pixel region SPXA in which the first sub-pixel SPX1 is formed to provide light of a first color, a second sub-pixel region SPXA2 in which the second sub-pixel SPX2 is formed to provide light of a second color, and a third sub-pixel region SPXA3 in which the third sub-pixel SPX3 is formed to provide light of a third color.

[0060] In some embodiments, the first sub-pixel SPX1 may be a red sub-pixel emitting red (e.g., a first color) light, the second sub-pixel SPX2 may be a green sub-pixel emitting green (e.g., a second color) light, and the third sub-pixel SPX3 may be a blue sub-pixel emitting blue (e.g., a third color) light. The red sub-pixel can provide light in the wavelength range of approximately 600 nm to approximately 750 nm. The green sub-pixel can provide light in the wavelength range of approximately 480 nm to approximately 560 nm. The blue sub-pixel can provide light in the wavelength range of approximately 370 nm to approximately 460 nm.

[0061] According to an embodiment, the number of second sub-pixels SPX2 can be greater than the number of first sub-pixels SPX1 and the number of third sub-pixels SPX3. However, the color, type, and / or number of the first sub-pixels SPX1, second sub-pixels SPX2, and third sub-pixels SPX3 constituting each pixel portion are not limited to the specific examples.

[0062] In some embodiments, the display device DD may further include a spacer CS. The spacer CS may not overlap with the sub-pixel region SPXA in the plan view. The spacer CS may be adjacent to the sub-pixel region SPXA, and the position of the spacer CS is not limited to specific examples.

[0063] The plane defined in this specification may be a plane extending in the first direction DR1 and the second direction DR2, and may be defined relative to the plane on which the substrate layer BSL may be disposed. In some embodiments, the third direction DR3 may be the thickness direction of the substrate layer BSL. The third direction DR3 may be the light emission direction of the display device DD.

[0064] Figure 3 This is a schematic cross-sectional view illustrating a display device according to an embodiment of the present disclosure. Figure 4 This is a schematic cross-sectional view illustrating a display layer according to an embodiment of the present disclosure.

[0065] Reference Figure 3 and Figure 4 The display device DD may include a display layer DL, a light control layer LCL, a fill layer FIL, and a color filter layer CFL.

[0066] The display layer (DL) can be configured to emit light. The display layer (DL) can form a substrate on which a light control layer (LCL) can be disposed.

[0067] The display layer DL may include a pixel circuit layer PCL containing a substrate layer BSL and a light-emitting element layer LEL containing light-emitting elements LD, thereby forming a pixel PXL (see [link to documentation]). Figure 2 ).

[0068] A substrate layer (BSL) can be formed thereon on which pixel circuits (PXCs) can be disposed. The pixel circuits (PXCs) can be disposed on the substrate layer (BSL) and configured to drive light-emitting elements (LDs). The pixel circuit layer (PCL) can include a conductive layer and an insulating layer, and the conductive layer can form the pixel circuits (PXCs). The pixel circuits (PXCs) can include components capable of driving sub-pixels (SPXs) (see...). Figure 2 (or light-emitting element LD) circuit elements. The circuit elements may include driving transistors, and may also include additional transistors and capacitors.

[0069] The light-emitting element layer (LEL) can be disposed on the pixel circuit layer (PCL). In some embodiments, the light-emitting element layer (LEL) may include a light-emitting element (LD).

[0070] For example, see Figure 4 The light-emitting element LD can include an organic light-emitting diode (OLED) containing organic materials. Figure 4 The illustration schematically shows an embodiment in which the light-emitting element LD can be an OLED, and schematically shows the display layer DL, including the pixel circuit layer PCL and the light-emitting element layer LEL, as a cross-sectional structure of the display device DD in the display area DA.

[0071] In some embodiments, the light-emitting element layer (LEL) may further include a pixel-defining layer (PDL), an element-on-capping layer (CPL_D), and an encapsulation layer (TFE).

[0072] In some embodiments, the light-emitting element (LD) may be disposed on the pixel circuit layer (PCL). The light-emitting element (LD) may include components contained in the first sub-pixel SPX1 (see...). Figure 2 The first light-emitting element in the second sub-pixel SPX2 (see...) Figure 2 The second light-emitting element in the third sub-pixel SPX3 (see...) Figure 2 The third light-emitting element in ).

[0073] In some embodiments, the light-emitting element (LD) may include a first electrode EL1, a light-emitting portion EL, and a second electrode EL2. In some embodiments, the light-emitting portion EL may be disposed in the region defined by the pixel defining layer (PDL). One surface of the light-emitting portion EL may be electrically connected to the first electrode EL1, and the other surface of the light-emitting portion EL may be electrically connected to the second electrode EL2.

[0074] The first electrode EL1 can be the anode electrode of the light-emitting part EL, and the second electrode EL2 can be the cathode electrode of the light-emitting part EL. In some embodiments, the first electrode EL1 and the second electrode EL2 can include conductive materials. For example, the conductive material can include at least one selected from the group consisting of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). In another example and some embodiments, the conductive material can include at least one selected from the group consisting of silver nanowires (AgNW), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc antimony oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), tin oxide (SnO2), carbon nanotubes, and graphene. However, this disclosure is not limited thereto.

[0075] The light-emitting part EL can emit light based on the electrical signals provided from the anode electrode (e.g., the first electrode EL1) and the cathode electrode (e.g., the second electrode EL2).

[0076] The light-emitting element (EL) may include a multilayer structure. For example, the EL may include multiple light-emitting structures, each comprising a hole transport section, a light-emitting layer (or light-generating layer), and an electron transport section. Each of the layers forming the EL may include an organic material. In some embodiments, each of the layers forming the EL may further include a metal compound, an inorganic material (such as quantum dots), or a combination thereof.

[0077] The hole transport section may include a multilayer structure having multiple layers comprising different materials. In an example, the hole transport section may include at least one of a hole injection layer and a hole transport layer. In some embodiments, the hole transport section may also include a light-emitting auxiliary layer and an electron blocking layer, etc. For example, the hole transport section may have a multilayer structure such as a hole injection layer / hole transport layer, a hole injection layer / hole transport layer / light-emitting auxiliary layer, a hole injection layer / light-emitting auxiliary layer, a hole transport layer / light-emitting auxiliary layer, an electron blocking layer / hole injection layer / hole transport layer, multiple hole transport layers that may be sequentially arranged and include different materials, or a hole injection layer / hole transport layer / electron blocking layer, etc. However, this disclosure is not limited to the specific examples.

[0078] The light-emitting layer of the light-emitting unit (EL) may include a material capable of emitting light of one color. In some embodiments, the light-emitting unit (EL) may emit light of a third color (e.g., blue). The light-emitting layer may include a substrate and a dopant. The substrate of the light-emitting layer may be a light-emitting material capable of trapping charge carriers (electrons and holes) for light generation and capable of inducing the efficient generation of excitons. The dopant of the light-emitting layer may include phosphorescent dopant and fluorescent dopant. In some embodiments, examples of dopant are not particularly limited. In some embodiments, the dopant may include organic materials. Dopant may also include metal complexes, etc.

[0079] The electron transport section may include a multilayer structure having multiple layers comprising different materials. The electron transport section may include at least one of an electron injection layer and an electron transport layer. In some embodiments, the electron transport section may further include an electron control layer, an electron buffer layer, and a hole blocking layer, etc. For example, the electron transport section may have a multilayer structure of an electron transport layer / electron injection layer, a hole blocking layer / electron transport layer / electron injection layer, an electron control layer / electron transport layer / electron injection layer, or an electron buffer layer / electron transport layer / electron injection layer, etc. However, this disclosure is not limited to specific examples.

[0080] A pixel defining layer (PDL) can be disposed on the pixel circuit layer (PCL) to define the location of the light-emitting portion (EL). The pixel defining layer (PDL) may include organic materials. For example, the pixel defining layer (PDL) may include at least one selected from the group consisting of acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. However, this disclosure is not limited thereto. In embodiments, the pixel defining layer (PDL) may include inorganic materials. For example, the pixel defining layer (PDL) may include silicon oxide (SiO2). x ) and silicon nitride (SiN) x At least one of the following. In some embodiments, the pixel defining layer PDL may include silicon oxide (SiO2). x The layers include silicon nitride (SiN) and other materials. x () is a multi-layered structure in which the layers can be stacked on top of each other.

[0081] The component capping layer CPL_D can be disposed across the second electrode EL2. The component capping layer CPL_D can cap the second electrode EL2. The component capping layer CPL_D can include inorganic materials.

[0082] The encapsulation layer TFE can be disposed throughout the light-emitting element LD (e.g., the second electrode EL2). The encapsulation layer TFE can eliminate the step difference caused by the light-emitting element LD and the pixel defining layer PDL. The encapsulation layer TFE may include multiple insulating layers covering the light-emitting element LD. In some embodiments, the encapsulation layer TFE may have a structure in which inorganic and organic layers can be stacked alternately on top of each other. In some embodiments, the encapsulation layer TFE may be a thin-film encapsulation layer.

[0083] In another example, the light-emitting element LD may be an inorganic light-emitting diode comprising inorganic materials. In another example, the display device DD may include a structure in which the light-emitting element LD, comprising inorganic materials, can be aligned between a plurality of electrodes spaced apart from each other. In yet another example, the display device DD may include a structure in which the light-emitting element LD can be transferred as a micro-LED (light-emitting diode) onto a pixel circuit layer PCL based on a transfer method. The transfer method may be one of a transfer method using a stamp, a transfer method using a laser, a transfer method using electrostatic force, and a transfer method using an adhesive. However, this disclosure is not limited thereto.

[0084] Combination Figure 5 The light control layer LCL can be disposed on the display layer DL (e.g., the light-emitting element layer LEL). For example, the light control layer LCL can be disposed on the upper side of the display layer DL relative to the display direction (e.g., third-direction DR3).

[0085] In some embodiments, the light control layer LCL may include a layer capable of changing the color of the applied light, and a layer capable of scattering the applied light.

[0086] A filler layer (FIL) may be disposed between the light control layer (LCL) and the color filter layer (CFL). In some embodiments, the filler layer (FIL) may include a filler material and is disposed between the light control layer (LCL) and the color filter layer (CFL) during the process of bonding the light control layer (LCL) and the color filter layer (CFL) together.

[0087] The color filter layer (CFL) can be disposed on the light control layer (LCL). For example, the color filter layer (CFL) can be disposed on the upper side of the light control layer (LCL) relative to the display direction (e.g., third-party DR3).

[0088] In some embodiments, the color filter layer CFL may include an upper UPL (see...). Figure 5 ) and color filter CF (see Figure 5 The color filter CF can be disposed on the bottom of the upper UPL and allows light of one color to selectively pass through the color filter CF. In some embodiments, the upper UPL can be an upper substrate for disposing of the color filter CF. However, this disclosure is not limited thereto.

[0089] Reference Figure 5 and Figure 6 Describe the structural features of the display devices DD and DD' that enable full-color display. Figure 5 and Figure 6 In the following text, any parts that overlap with the above content will be briefly described or will not be repeated.

[0090] Figure 5 and Figure 6 It is along Figure 2 The diagram shows a schematic cross-section taken by line A-A'. Figure 5 This is a schematic cross-sectional view illustrating a display device according to an embodiment of the present disclosure. Figure 6 This is a schematic cross-sectional view illustrating a display device according to an embodiment of the present disclosure.

[0091] First, refer to Figure 5 A display device DD according to an embodiment of the present disclosure is described.

[0092] In some embodiments, the light-emitting element (LD) in the display layer DL can emit light including a third color component. For example, the light-emitting element LD can emit light of a third color. The light-emitting element LD can emit light including a second color component and a third color component.

[0093] The light control layer (LCL) can be disposed on the display layer (DL), which includes the light-emitting element (LD). For example, the light control layer (LCL) can be disposed on the encapsulation layer (TFE).

[0094] The optical control layer LCL may include a first dam BNK1, a metal layer MT, a second dam BNK2, an optical control structure LCS, and a lower capping layer CPL_Q.

[0095] The first barrier BNK1 can be set on the display layer DL. The first barrier BNK1 can also be set (e.g., directly) on the encapsulation layer TFE.

[0096] The first dam BNK1 can be set in a portion of the display layer DL. The first dam BNK1 can be patterned and can expose a portion of the display layer DL.

[0097] The first dam BNK1 may protrude in the thickness direction of the substrate layer BSL (e.g., the third direction DR3). The first dam BNK1 may surround a region and form a space in which the light control structure LCS can be set.

[0098] In some embodiments, the first dam BNK1 may not overlap with the sub-pixel region SPXA in the planar view. For example, the first dam BNK1 may be positioned between the sub-pixel regions SPXA in the planar view.

[0099] The first dam BNK1 may include a side surface facing the light control structure LCS. The side surface of the first dam BNK1 may form a substrate on which a metal layer MT may be disposed.

[0100] The first dike BNK1 may be spaced apart from the second dike BNK2. The first dike BNK1 may not contact the second dike BNK2. At least a portion of the first dike BNK1 may not overlap with the second dike BNK2 in a plan view. The top surface of the first dike BNK1 may be exposed by the metal layer MT and the second dike BNK2. In some embodiments, at least a portion of the first dike BNK1 may be adjacent to (e.g., directly adjacent to) the lower capping layer CPL_Q (e.g., in contact with the lower capping layer CPL_Q).

[0101] The first dam BNK1 may include a light-transmitting material (e.g., a transparent material). The first dam BNK1 may not include a light-blocking material. For example, the first dam BNK1 may include an organic material. In some embodiments, the first dam BNK1 may include an acrylic material. However, this disclosure is not limited thereto.

[0102] In some embodiments, since the first embankment BNK1 adjacent to the light control structure LCS may include a light-transmitting material instead of a light-blocking material, the risk of light loss from the light-emitting element LD can be reduced, and thus the light emission efficiency can be improved.

[0103] A metal layer MT can be disposed on the first barrier BNK1. The metal layer MT can cover the side surface of the first barrier BNK1. A portion of the metal layer MT can be disposed on the encapsulation layer TFE. Therefore, the metal layer MT can face the light control structure LCS and form a light recycling structure. Thus, the light emission efficiency of the display device DD can be improved.

[0104] The metal layer MT may include a reflective material (e.g., a reflective metallic material). For example, the metal layer MT may include at least one selected from the group consisting of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). However, this disclosure is not limited thereto.

[0105] The metal layer MT may expose the top surface of the first dike BNK1. The metal layer MT may be partially disposed on the top surface of the first dike BNK1. The metal layer MT may be covered by the second dike BNK2. The metal layer MT may overlap with the second dike BNK2 in a plan view. The metal layer MT may be completely covered by the second dike BNK2 in a plan view. The metal layer MT may include a structure recessed (or recessed) relative to the second dike BNK2 at the top surface of the first dike BNK1. Therefore, the top surface of the metal layer MT may not be exposed.

[0106] The risk of damage to the metal layer MT during the manufacturing process of the display device DD can be reduced. For example, in the case of manufacturing a light control layer LCL, a lower capping layer CPL_Q can be formed to passivate some components of the light control layer LCL. Due to the voltage environment formed for depositing (e.g., chemical vapor deposition (CVD)) the lower capping layer CPL_Q, arcing may occur on the metal layer MT, and there is a risk of peeling off the metal layer MT. However, according to embodiments of this disclosure, the top surface of the metal layer MT may not be exposed by the second dam BNK2, which can reduce arcing and the risk of peeling off the metal layer MT.

[0107] The second dike BNK2 can be disposed on the metal layer MT. The second dike BNK2 can be adjacent to the first dike BNK1, and the metal layer MT is disposed between the first dike BNK1 and the second dike BNK2. The second dike BNK2 can be passivated by the lower capping layer CPL_Q.

[0108] The second dam BNK2 can be set in a portion of the display layer DL. The second dam BNK2 can be patterned, exposing a portion of the display layer DL and a portion of the top surface of the first dam BNK1.

[0109] The second embankment BNK2 can surround a region and form a space in which the light control structure LCS can be set.

[0110] In some embodiments, the second dam BNK2 may not overlap with the sub-pixel region SPXA in the planar view. For example, the second dam BNK2 may be positioned between the sub-pixel regions SPXA in the planar view.

[0111] The second dam BNK2 can completely cover the top surface of the metal layer MT. In some embodiments, the second dam BNK2 can expose the side surfaces of the metal layer MT. The bottom surface of the second dam BNK2 can be exposed in a region adjacent to the metal layer MT. The second dam BNK2 may include a pointed structure protruding relative to the top surface of the metal layer MT. Thus, as described above, a structure in which the top surface of the metal layer can be completely covered can be formed.

[0112] The second dike BNK2 can expose the top surface of the first dike BNK1. For example, the second dike BNK2 can expose the top surface of the first dike BNK1 that can be exposed by the metal layer MT.

[0113] The second dam BNK2 may include a light-transmitting material (e.g., a transparent material). The second dam BNK2 may not include a light-blocking material. For example, the second dam BNK2 may include an organic material. In some embodiments, the second dam BNK2 may include an acrylic material. However, this disclosure is not limited thereto.

[0114] In some embodiments, since the second embankment BNK2 adjacent to the light control structure LCS may include a light-transmitting material instead of a light-blocking material, the risk of light loss from the light-emitting element LD can be reduced, and thus the light emission efficiency can be improved.

[0115] The second dam BNK2 can be formed using the same process as the spacer CS, and both the second dam BNK2 and the spacer CS can comprise the same material. Therefore, this simplifies the process steps and reduces process costs.

[0116] The optical control structure LCS can be located in the region surrounded by the first dam BNK1. The optical control structure LCS can be located in the region surrounded by the second dam BNK2. The optical control structure LCS can be located in the region facing the metal layer MT. The optical control structure LCS can be located in a plan view without overlapping with the spacer CS.

[0117] In some embodiments, the optical control structure LCS may be directly adjacent to the metal layer MT (e.g., in contact with the metal layer MT). In some embodiments, a portion of the optical control structure LCS may be adjacent to the metal layer MT between the second dam BNK2 and the encapsulation layer TFE. The optical control structure LCS may be passivated by the lower capping layer CPL_Q.

[0118] The light control structure LCS may include a first color conversion layer CCL1, a second color conversion layer CCL2, and a light scattering layer SCL. The first color conversion layer CCL1, the second color conversion layer CCL2, and the light scattering layer SCL may be spaced apart from each other in a planar diagram.

[0119] The light control structure LCS can overlap with each sub-pixel region SPXA in the planar diagram. For example, the first color conversion layer CCL1 can overlap with the first sub-pixel region SPXA1 in the planar diagram. The second color conversion layer CCL2 can overlap with the second sub-pixel region SPXA2 in the planar diagram. The light scattering layer SCL can overlap with the third sub-pixel region SPXA3 in the planar diagram.

[0120] The first color conversion layer CCL1 may include first color conversion particles for converting light (e.g., a third color light) supplied from the light-emitting element LD into light of a first color. For example, the first color conversion layer CCL1 may include first quantum dots for converting third color light into first color light. The first quantum dots may absorb third color light and emit first color light by changing the wavelength of the third color light according to energy level transitions. The first quantum dots may be dispersed and provided in a matrix layer (including organic materials).

[0121] The second color conversion layer CCL2 may include second color conversion particles for converting light (e.g., third-color light) supplied from the light-emitting element LD into second-color light. For example, the second color conversion layer CCL2 may include second quantum dots for converting third-color light into second-color light. The second quantum dots may absorb third-color light and emit second-color light by changing the wavelength of the third-color light according to energy level transitions. The second quantum dots may be dispersed and provided in a matrix layer (including organic materials).

[0122] A light scattering layer (SCL) can be configured to scatter applied light. The SCL can improve light emission efficiency (e.g., brightness) and improve the viewing angle characteristics of the display device (DD). The SCL may include a scatterer. The scatterer can be dispersed and provided in a matrix layer (including organic materials). The scatterer may include light scattering particles. For example, the scatterer may include light-scattering particles selected from silicon dioxide (SiO₂). x (e.g., silica beads or hollow silica), titanium dioxide (TiO2) x Zirconium oxide (ZrO) x ), aluminum oxide (Al) x O y Indium oxide (In) x O y ), zinc oxide (ZnO) x ), Tin oxide (SnO) x ) and antimony oxide (Sb x O y At least one of the groups consisting of ). However, this disclosure is not limited thereto.

[0123] The spacer CS can be disposed on the first dam BNK1. The spacer CS can be disposed on the metal layer MT disposed on the first dam BNK1. The spacer CS can be disposed in a planar view without overlapping with the sub-pixel region SPXA. The spacer CS can be passivated by the lower capping layer CPL_Q.

[0124] The spacer CS can be configured to be higher than the first color conversion layer CCL1, the second color conversion layer CCL2, and the light scattering layer SCL relative to the substrate on which the light control layer LCL can be disposed (e.g., the uppermost layer of the display layer DL). For example, the spacer CS can protrude in the thickness direction of the substrate layer BSL (e.g., the third direction DR3).

[0125] The spacer CS can create a separation distance between the light control layer LCL and other components of the color filter layer CFL. The filler layer FIL can be disposed between the color filter layer CFL and the light control layer LCL, thereby preventing damage to each layer of the display device DD during manufacturing.

[0126] The spacer CS can be manufactured using the same process as the second dam BNK2. The spacer CS and the second dam BNK2 can comprise the same material. For example, the spacer CS and the second dam BNK2 can be manufactured using the same photolithography process. Therefore, the process steps for forming the spacer CS can be simplified, thereby reducing process costs.

[0127] The lower capping layer CPL_Q can be disposed on a portion of the top surface of the light control structure LCS, the first dam BNK1, the second dam BNK2, the side surface of the metal layer MT, and the spacer CS to passivate each component.

[0128] The lower capping layer CPL_Q can be an inorganic layer and can include silicon nitride (SiN) as a component. x ), aluminum nitride (AlN) x Titanium nitride (TiN) x ), silicon dioxide (SiO) x ), aluminum oxide (Al) x O y Titanium oxide (TiO) x ), silicon dioxide (SiO2) x C y ) and silicon oxynitride (SiO) x N y At least one of the groups consisting of ). However, this disclosure is not limited thereto.

[0129] In some embodiments, the lower capping layer CPL_Q may contact a portion of the top surface of the first dike BNK1 that can be exposed by the metal layer MT. At least a portion of the lower capping layer CPL_Q may be adjacent (e.g., directly adjacent) to the side surface of the metal layer MT that can be exposed by the second dike BNK2.

[0130] The filler layer (FIL) can be disposed between the light control layer (LCL) and the color filter layer (CFL). The filler layer (FIL) can also be disposed between the upper capping layer (CPL_U) and the lower capping layer (CPL_Q). The filler layer (FIL) can include various transparent organic materials, but examples of transparent organic materials are not particularly limited.

[0131] The color filter layer CFL may include an upper capping layer CPL_U, an optical layer LRL, a color filter CF, and an upper UPL.

[0132] The upper capping layer CPL_U can be disposed between the optical layer LRL and the fill layer FIL. The upper capping layer CPL_U can extend over the sub-pixel region SPXA and be disposed as a non-sub-pixel region other than (or outside of) the sub-pixel region SPXA. The upper capping layer CPL_U can passivate the optical layer LRL. The upper capping layer CPL_U can include at least one of the examples described above with reference to the lower capping layer CPL_Q.

[0133] The optical layer LRL can be set between the color filter layer CFL and the upper capping layer CPL_U. The optical layer LRL can extend across the subpixel region SPXA and the non-subpixel region, which is the area outside the subpixel region SPXA.

[0134] The optical layer LRL can have a refractive index greater than that of each of the layers forming the color filter CF. The optical layer LRL can have a refractive index smaller than that of each of the first color conversion layer CCL1 and the second color conversion layer CCL2, and form a light recycling structure.

[0135] The optical layer LRL can comprise various materials to have a refractive index. For example, the optical layer LRL can comprise various resins and hollow silica. In another example, the optical layer LRL can comprise zirconium oxide (ZrO2). x However, this disclosure is not limited thereto.

[0136] In some embodiments, the optical layer LRL can be designated as a low refractive index layer.

[0137] The color filter layer CFL can be placed on the bottom of the upper UPL. The color filter layer CFL can also be placed between the upper UPL and the optical layer LRL.

[0138] The color filter layer CFL may include color filters CF, and the color filters CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0139] A first color filter CF1 may be disposed in a first sub-pixel region SPXA1. The first color filter CF1 may include a color filter material (e.g., a dye or pigment) that selectively transmits light of a first color (e.g., red) through the first color filter CF1.

[0140] A second color filter CF2 may be disposed in the second sub-pixel region SPXA2. The second color filter CF2 may include a color filter material (e.g., a dye or pigment) that selectively transmits light of a second color (e.g., green) through the second color filter CF2.

[0141] A third color filter CF3 may be disposed in a third sub-pixel region SPXA3. The third color filter CF3 may include a filter material (e.g., a dye or pigment) that selectively transmits light of a third color (e.g., blue) through the third color filter CF3.

[0142] In some embodiments, non-subpixel regions where the colored light can be unobserved can be formed between subpixel regions SPXA. In some embodiments, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can overlap each other in the non-subpixel regions in the planar diagram, and a light-blocking structure LBS can be formed in the non-subpixel regions.

[0143] In the first sub-pixel region SPXA1, light emitted from the light-emitting element LD can be provided as light of the first color while being transmitted through the first color conversion layer CCL1. Light transmitted through the first color conversion layer CCL1 can also be provided as light of the first color while being transmitted through the first color filter CF1. Therefore, the first sub-pixel SPX1 can be configured to provide light of the first color.

[0144] In the second sub-pixel region SPXA2, light emitted from the light-emitting element LD can be provided as light of the second color while being transmitted through the second color conversion layer CCL2. Light transmitted through the second color conversion layer CCL2 can also be provided as light of the second color while being transmitted through the second color filter CF2. Therefore, the second sub-pixel SPX2 can be configured to provide light of the second color.

[0145] In the third sub-pixel region SPXA3, light emitted from the light-emitting element LD can be provided as light of the same color as the emitted light. Light transmitted through the light-scattering layer SCL can be provided as light of the third color while being transmitted through the third color filter CF3. Therefore, the third sub-pixel SPX3 can be configured to provide light of the third color.

[0146] The upper UPL can be disposed on the color filter layer CFL. In some embodiments, the upper UPL can be a substrate member used to form other layers forming the color filter layer CFL. For example, the upper UPL can be an upper substrate. In some embodiments, the upper UPL can include a glass substrate. However, this disclosure is not limited thereto.

[0147] Next, we will refer to Figure 6 A display device DD' according to an embodiment of the present disclosure is described. Figure 6 In the above reference Figure 5 Those parts that are repeated in the description will be briefly described or will not be repeated.

[0148] Reference Figure 6 The difference between the display device DD' according to the embodiment of the present disclosure and the display device DD according to the above embodiment is that the first embankment BNK1' overlaps with the third sub-pixel region SPXA3 in the plan view.

[0149] At least a portion of the first dam BNK1' may be disposed within the third sub-pixel region SPXA3. At least a portion of the top surface of the first dam BNK1' may be exposed by the metal layer MT and the second dam BNK2 and overlap with the third sub-pixel region SPXA3.

[0150] The first dam BNK1' can be a light-transmitting dam structure including a scatterer. For example, the first dam BNK1' can include a scatterer containing light-scattering particles. The scatterer can include silica (SiO2) selected from silicon dioxide (SiO2). x (e.g., silica beads or hollow silica), titanium dioxide (TiO2) x Zirconium oxide (ZrO) x ), aluminum oxide (Al) x O y Indium oxide (In) x O y ), zinc oxide (ZnO) x ), Tin oxide (SnO) x ) and antimony oxide (Sb x O y At least one of the groups consisting of ). However, this disclosure is not limited thereto.

[0151] In some embodiments, the first dam BNK1' may be disposed in the third sub-pixel region SPXA3 and scatter light provided from the light-emitting element LD. Therefore, the above references can be omitted. Figure 5 The light scattering layer SCL described is formed and the process steps can be simplified.

[0152] Next, we will refer to Figures 7 to 23 A method for manufacturing display devices DD and DD' according to embodiments of the present disclosure is described. Figures 7 to 23 The following will briefly describe or will not repeat the parts that are repeated above.

[0153] Display devices DD and DD' according to embodiments of the present disclosure can be manufactured by forming a display layer DL and a light control layer LCL or LCL' on a substrate layer BSL or a lower substrate BSUB, forming a color filter layer CFL on an upper layer UPL or an upper substrate, and bonding the two formed structures together. (See also: [link to relevant documentation]) Figure 5 and Figure 6 However, this disclosure is not limited thereto. In some embodiments, display devices DD and DD' according to embodiments of this disclosure can be manufactured by forming a light control layer LCL or LCL' on the upper UPL.

[0154] Figure 7 This is a flowchart illustrating a method for manufacturing a display device according to an embodiment of the present disclosure. Figure 8 This is a flowchart illustrating the detailed steps of forming a light control layer on a display layer according to an embodiment of the present disclosure. Figures 9 to 23 This is a schematic cross-sectional view illustrating the process steps of a method for manufacturing a display device according to an embodiment of the present disclosure.

[0155] Figures 9 to 16 The above reference is shown schematically. Figure 5 The method for manufacturing a display device DD according to an embodiment is described. Figures 17 to 23 The above reference is shown schematically. Figure 6 The method for manufacturing a display device DD' according to an embodiment is described.

[0156] First, refer to Figures 7 to 16 A method for manufacturing a display device DD according to embodiments of the present disclosure is described.

[0157] Reference Figure 7 Manufacturing a display device DD according to an embodiment of the present disclosure (see also) Figure 5 The method may include step S100 of manufacturing a display layer, step S200 of forming a light control layer on the display layer, and step S300 of setting a color filter layer on the light control layer.

[0158] Reference Figure 8 The step S200 of forming a light control layer on the display layer may include the step S2100 of patterning a first dam, the step S2200 of forming a substrate metal layer, the step S2300 of patterning a second dam and a spacer, the step S2400 of removing at least a portion of the substrate metal layer, the step S2500 of forming a light control structure, and the step S2600 of forming a lower capping layer.

[0159] Reference Figure 7 and Figure 9In step S100 of manufacturing the display layer, the layer forming the display layer DL can be disposed on the lower substrate BSUB (e.g., substrate layer BSL).

[0160] In some embodiments, the conductive or insulating layer on the lower substrate BSUB (e.g., the substrate layer BSL) can be formed based on conventional processes used for manufacturing semiconductor devices. For example, the conductive or insulating layer on the substrate layer BSL can be formed by photolithography, etched by various processes (wet etching and dry etching, etc.), and deposited by various processes (sputtering and chemical vapor deposition, etc.). However, this disclosure is not limited to the specific examples.

[0161] In this step S100 and in combination Figure 4 Pixel circuits (PXCs) can be patterned on the substrate layer (BSL) to form a pixel circuit layer (PCL), and light-emitting elements (LDs) can be disposed on the pixel circuit layer (PCL). In some embodiments and in this step S100, the light-emitting elements (LDs) can be disposed on the substrate layer (BSL) (e.g., the pixel circuit layer (PCL)) using various processes. In some embodiments, an encapsulation layer (TFE) can be formed at approximately the uppermost portion of the display layer (DL).

[0162] In this step S100 and in combination Figure 4 The light-emitting element (LD) can include an organic light-emitting diode (OLED). The LD can be fabricated on a substrate layer (BSL) using a deposition process.

[0163] Reference Figure 7 , Figure 8 and Figure 10 In step S200, which forms a light control layer on the display layer, step S2100, which forms a patterned first embankment, can be performed.

[0164] In this step S2100, a first barrier BNK1 can be formed on the display layer DL (e.g., the encapsulation layer TFE). The first barrier BNK1 can be patterned by a photolithography process. For example, to form the first barrier BNK1, a light-transmitting material (e.g., a transparent material) can be deposited, and a layer including the deposited light-transmitting material can be etched to fabricate the first barrier BNK1.

[0165] In this step S2100, the first dam BNK1 can be disposed in a portion of the display layer DL (e.g., the encapsulation layer TFE), and since subsequent processes can be performed, the area for the sub-pixel region SPXA can be approximately defined. For example, in this step S2100, a first opening OP1 surrounded by the first dam BNK1 can be formed. The first opening OP1 can overlap with each of the plurality of sub-pixel regions SPXA in a plan view. For ease of description, the positions of the first sub-pixel regions SPXA1 to the third sub-pixel region SPXA3 are schematically shown in the following figures.

[0166] Reference Figure 7 , Figure 8 and Figure 11 In step S200, which forms a light control layer on the display layer, step S2200, which forms a base metal layer, can be performed.

[0167] In this step S2200, a base metal layer MT_B can be formed (e.g., deposited). Therefore, the base metal layer MT_B can be completely disposed in the sub-pixel region SPXA and the region adjacent to the sub-pixel region SPXA. The base metal layer MT_B can cover the first dam BNK1 and the encapsulation layer TFE.

[0168] In this step S2200, at least a portion of the base metal layer MT_B may be disposed in the first opening OP1. The base metal layer MT_B may cover (e.g., completely cover) the top surface of the first embankment BNK1. In some embodiments, the base metal layer MT_B may include reflective metal.

[0169] Reference Figure 7 , Figure 8 and Figure 12 In step S200, which forms a light control layer on the display layer, step S2300, which patterns the second embankment and the spacer, can be performed.

[0170] In this step S2300, the second dam BNK2 can be patterned in a region that does not overlap with the sub-pixel region SPXA. The second dam BNK2 can be patterned using a photolithography process. The spacer CS can be formed using the same photolithography process as the second dam BNK2. For example, to form the second dam BNK2 and the spacer CS, a light-transmitting material (e.g., a transparent material) can be deposited, and a layer including the deposited light-transmitting material can be etched to fabricate the second dam BNK2 and the spacer CS.

[0171] In this step S2300, the second embankment BNK2 can be patterned to surround the first opening OP1, and a second opening OP2 can be formed that exposes at least a portion of the substrate metal layer MT_B.

[0172] Compared to the second embankment BNK2, the spacer CS manufactured in this step S2300 can protrude relative to the substrate layer BSL, and the spacer CS is adjacent to the second opening OP2 (e.g., directly adjacent). For example, the spacer CS can be completely surrounded by the second opening OP2.

[0173] Reference Figure 7 , Figure 8 and Figure 13 In step S200, which forms a light control layer on the display layer, step S2400, which removes at least a portion of the substrate metal layer, can be performed.

[0174] In this step S2400, the substrate metal layer MT_B can be etched (see...). Figure 12 At least a portion of the sub-pixel region SPXA may be provided, and a metal layer MT may be provided that does not overlap with the sub-pixel region SPXA. In this step S2400, the metal layer MT may form a reflective surface facing the sub-pixel region SPXA.

[0175] In this step S2400, the portion of the base metal layer MT_B that overlaps with the first opening OP1 in the plan view can be removed. In some embodiments, the encapsulation layer TFE that overlaps with the first opening OP1 in the plan view can be exposed.

[0176] In this step S2400, the portion of the base metal layer MT_B that overlaps with the second opening OP2 in the plan view can be removed. In some embodiments, the first embankment BNK1 that overlaps with the second opening OP2 in the plan view can be exposed.

[0177] In this step S2400, the metal layer MT can be maintained in a state where the metal layer MT is not exposed in the plan view. For example, at least a portion of the substrate metal layer MT_B that can be covered by the second dike BNK2 or the spacer CS in the plan view can be removed, and the metal layer MT can be completely covered by the second dike BNK2 or the spacer CS.

[0178] Reference Figure 7 , Figure 8 and Figure 14 In step S200, which forms a light control layer on the display layer, step S2500, which forms a light control structure, can be performed.

[0179] In this step S2500, a first color conversion layer CCL1, a second color conversion layer CCL2, and a light scattering layer SCL can be formed. For example, the first color conversion layer CCL1, the second color conversion layer CCL2, and the light scattering layer SCL can be respectively disposed in the corresponding sub-pixel region SPXA. The first color conversion layer CCL1, the second color conversion layer CCL2, and the light scattering layer SCL can be formed by inkjet printing or photolithography. However, this disclosure is not limited thereto.

[0180] Reference Figure 7 , Figure 8 and Figure 15 In step S200, which forms a light control layer on the display layer, step S2600, which forms a lower capping layer, can be performed.

[0181] In this step S2600, a lower capping layer CPL_Q may be deposited (e.g., by chemical vapor deposition (CVD)). The lower capping layer CPL_Q may passivate the light control layer LCL formed in the previous step. For example, the lower capping layer CPL_Q may passivate the light control structure LCS, the second dam BNK2, and the spacer CS. In some embodiments, the lower capping layer CPL_Q may be in contact with the first dam BNK1.

[0182] In some embodiments, the metal layer MT can be completely covered by the second embankment BNK2 in the plan view. Therefore, and as described above, when the deposition process for forming the lower capping layer CPL_Q is performed in this step S2600, the risk of arcing and peeling of the metal layer MT can be reduced.

[0183] Reference Figure 7 and Figure 16 Step S300, which involves setting a color filter layer on the light control layer, can be performed.

[0184] In step S300, a color filter CF, an optical layer LRL, and an upper capping layer CPL_U can be sequentially disposed on the upper UPL forming the upper substrate, thus providing a color filter layer CFL. A filler layer FIL can be disposed between the color filter layer CFL and the light control layer LCL, allowing the color filter layer CFL and the light control layer LCL to be bonded to each other. In step S300, a spacer CS can be adjacent to the upper capping layer CPL_U (e.g., directly adjacent).

[0185] In this step S300, the color filter CF can be patterned on the upper UPL using a photolithography process. Therefore, the first color filter CF1 to the third color filter CF3 can be patterned to overlap with the first sub-pixel region SPXA1 to the third sub-pixel region SPXA3, respectively, and a light-blocking structure LBS can be formed in the non-sub-pixel region. An optical layer LRL can be formed on the color filter CF, and since an upper capping layer CPL_U can be formed on the optical layer LRL, the other layers of the color filter layer CFL can be passivated.

[0186] Reference Figure 7 , Figure 8 and Figures 17 to 23 A method for manufacturing a display device DD' according to an embodiment of the present disclosure is described.

[0187] Similar to the method for manufacturing a display device described above, the method for manufacturing a display device DD' according to embodiments of this disclosure may include a step S100 of manufacturing a display layer, a step S200 of forming a light control layer on the display layer, and a step S300 of providing a color filter layer on the light control layer. Step S200 of forming the light control layer on the display layer may include a step S2100 of patterning a first barrier, a step S2200 of forming a substrate metal layer, a step S2300 of patterning a second barrier and spacers, a step S2400 of removing at least a portion of the substrate metal layer, a step S2500 of forming a light control structure, and a step S2600 of forming a lower capping layer. However, parts that are repeated above will be briefly described or will not be repeated.

[0188] Reference Figure 7 , Figure 8 and Figure 17 In the step S2100 of patterning the first dam, at least a portion of the first dam BNK1' can be formed in the region used to form the third sub-pixel region SPXA3.

[0189] In some embodiments, after a layer including a scatterer can be formed to pattern the first dam BNK1', the formed layer can be patterned. The first dam BNK1' may not be located in the region where the first sub-pixel region SPXA1 and the second sub-pixel region SPXA2 can be formed.

[0190] Reference Figure 7 , Figure 8 and Figure 18 In step S2200 of forming the base metal layer, a base metal layer MT_B can be formed covering the portion of the first embankment BNK1 in the third sub-pixel region SPXA3.

[0191] Reference Figure 7 , Figure 8 and Figure 19 In the step S2300 of patterning the second dam, at least a portion of the metal layer MT_B in the third sub-pixel region SPXA3 can be exposed, thereby patterning the second dam BNK2 that forms the second opening OP2.

[0192] In this step S2300, at least a portion of the second embankment BNK2 can be set to be adjacent to (e.g., directly adjacent to) the third sub-pixel region SPXA3 in the plan view, and can be not set in the third sub-pixel region SPXA3.

[0193] Reference Figure 7 , Figure 8 and Figure 20 In step S2400, when removing at least a portion of the base metal layer, the base metal layer MT_B can be removed (see [reference]). Figure 19At least a portion of the third sub-pixel region SPXA3 may be provided, and a metal layer MT may be provided.

[0194] In this step S2400, at least a portion of the top surface of the first embankment BNK1' in the third sub-pixel region SPXA3 can be exposed.

[0195] Reference Figure 7 , Figure 8 and Figure 21 In step S2500 of forming the light control structure, a first color conversion layer CCL1 and a second color conversion layer CCL2 can be formed.

[0196] In this step S2500, no additional light scattering structure (e.g., light scattering layer SCL) may be formed in the third sub-pixel region SPXA3 (see [link to article]). Figure 14 Therefore, it can simplify the process steps and reduce the process cost.

[0197] Reference Figure 7 , Figure 8 and Figure 22 In step S2600, when forming the lower capping layer, the lower capping layer CPL_Q can passivate the other layers of the light control layer LCL'.

[0198] In this step S2600, the lower capping layer CPL_Q can contact the first embankment BNK1' in the third sub-pixel region SPXA3.

[0199] According to embodiments of this disclosure, as described above, the metal layer MT can be completely covered by the second embankment BNK2 in the plan view, and thus, in the case of forming the lower capping layer CPL_Q, the risk of arcing and peeling of the metal layer MT can be reduced.

[0200] Reference Figure 7 and Figure 23 In step S300, where a color filter layer is disposed on the light control layer, a filler layer FIL can be disposed between the light control layer LCL' and the color filter layer CFL. Therefore, a display device comprising a structure in which the color filter layer CFL can be disposed on the light control layer LCL' can be provided.

[0201] The display device according to the embodiments is applicable to various types of electronic devices. In the embodiments, the electronic device includes the above-described display device, and may also include other modules or devices with additional functions besides the display device.

[0202] Figure 24 This is a block diagram of an electronic device according to an embodiment. (Refer to...) Figure 24 The electronic device 10 may include a display module 11, a processor 12, a memory 13, and a power module 14.

[0203] The processor 12 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0204] The memory 13 can store data and / or information used to operate the processor 12 or the display module 11. When the processor 12 executes an application stored in the memory 13, image data signals and / or input control signals can be transmitted to the display module 11. The display module 11 can process the provided signals and output image information on the display screen.

[0205] The power module 14 may include a power supply module (such as a power adapter or battery device) and a power conversion module. The power conversion module converts the power supplied by the power supply module and generates power to operate the electronic device 10.

[0206] At least one of the aforementioned components of electronic device 10 may be included in the display device according to the embodiments described above. Furthermore, in terms of functionality, some independent modules included in one module may be included in the display device, and other modules may be provided separately from the display device. For example, display module 11 is included in the display device, while processor 12, memory 13, and power module 14 are not included in the display device but are provided separately in electronic device 10.

[0207] Figure 25 Schematic diagrams illustrating various embodiments of an electronic device.

[0208] Reference Figure 25 The various types of electronic devices used in the embodiments of the display device may include electronic devices that display images (such as smartphones 10_1a, tablet PCs 10_1b, laptops 10_1c, televisions (TVs) 10_1d, and desktop monitors 10_1e), wearable electronic devices that include display modules (such as smart glasses 10_2a, head-mounted displays (HMDs) 10_2b, and smartwatches 10_2c), and automotive electronic devices 10_3 that include display modules (such as central information displays (CIDs) installed on the dashboard, center panel, and instrument panel of a car, as well as interior rearview mirror displays).

[0209] According to this disclosure, it is possible to provide a display device in which light emission efficiency can be improved, a method for manufacturing a display device, and an electronic device including the display device.

[0210] According to this disclosure, it is possible to provide a display device in which process efficiency can be improved, a method for manufacturing a display device, and an electronic device including a display device.

[0211] According to this disclosure, a display device, a method of manufacturing a display device, and an electronic device including a display device can be provided, wherein damage to the layers forming the display device is prevented.

[0212] Example embodiments have been disclosed herein, and although specific terminology may be used, they are intended to be used and interpreted in a general and descriptive sense only and are not for limiting purposes. In some instances, unless specifically indicated otherwise, it will be apparent to those skilled in the art at the time of filing this application that features, characteristics, and / or elements relating to a particular embodiment may be used alone or in combination with features, characteristics, and / or elements relating to other embodiments. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of this disclosure as set forth in the appended claims.

Claims

1. A display device, characterized in that, The display device includes: Display layer; and A light control layer is disposed on the display layer, the light control layer comprising: First dike; A metal layer, at least a portion of which is disposed on the first dike and exposes the top surface of the first dike; and A second dike, at least a portion of which is disposed on the metal layer, and the second dike exposes the top surface of the first dike.

2. The display device according to claim 1, characterized in that, The optical control layer includes an optical control structure. At least a portion of the light control structure is arranged in the area surrounded by the first dike, and The optical control structure includes: Color conversion layer, including quantum dots; and Light scattering layer, including scatterers, The display device further includes: The first sub-pixel region is provided with light of the first color; The second sub-pixel region, to which light of the second color is supplied; and The third sub-pixel region is provided with light of the third color, and the color conversion layer includes: A first color conversion layer is disposed in the first sub-pixel region; and The second color conversion layer is set in the second sub-pixel region. The light scattering layer is disposed in the third sub-pixel region. The display device further includes: Color filter layer, the color filter layer comprising: The first color filter overlaps with the first sub-pixel region; A second color filter overlaps with the second sub-pixel region; and The third color filter overlaps with the third sub-pixel region, and The display layer includes a light-emitting element that provides light including the light component of the third color.

3. The display device according to claim 1, characterized in that, Each of the first and second dikes is translucent, and The metal layer is a reflective metal layer.

4. The display device according to claim 1, characterized in that, The metal layer is completely covered by the second dike in the plan view.

5. The display device according to claim 1, characterized in that, The side surface of the metal layer is exposed by the second dike.

6. The display device according to claim 1, characterized in that, The metal layer includes a structure that is recessed relative to the second dike.

7. The display device according to claim 1, characterized in that, The display device further includes: Spacers are disposed on the top surface of the first dike. The spacer and the second embankment are made of the same material.

8. The display device according to claim 2, characterized in that, The display device further includes: The lower capping layer passivates the second embankment and the light control structure. The lower capping layer is in contact with a portion of the top surface of the first dike that is exposed by the metal layer.

9. The display device according to claim 1, characterized in that, The first dike and the second dike are physically separated from each other.

10. The display device according to claim 1, characterized in that, The display device further includes: The first sub-pixel region is provided with light of the first color; The second sub-pixel region, to which light of the second color is supplied; and The third sub-pixel region is provided with light of the third color. The first embankment does not overlap with the first sub-pixel region and the second sub-pixel region in the planar view. The first embankment overlaps with the third sub-pixel region in the planar view. The first color is red. The second color is green. The third color is blue, and The first dam includes a scatterer.

11. An electronic device, characterized in that, The electronic device includes: The processor is configured to transmit input control signals; A display device configured to output image information; and A power module is configured to supply power to the display device. The display device includes: Display layer; and A light control layer is disposed on the display layer, the light control layer comprising: First dike; A metal layer, at least a portion of which is disposed on the first dike and exposes the top surface of the first dike; and A second dike, at least a portion of which is disposed on the metal layer, and the second dike exposes the top surface of the first dike.

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