Phased-array antenna master control module based on ZYNQ

Abstract

The utility model discloses a phased array antenna master control module based on ZYNQ. The phased array antenna master control module based on ZYNQ comprises an SPI NOR FLASH memory, an eMMC memory and a ZYNQ chip. A GTX interface of a PL end of a ZYNQ chip is connected with a remote control terminal through an optical module, and is connected with an antenna unit through an LVDS bus; after a radar system is initialized, the ZYNQ chip receives a control signal sent by a remote control terminal and controls the antenna unit to work according to the control signal, the phase and amplitude of the antenna are adjusted, beam and directional scanning is achieved, and the phased-array antenna master control module based on the ZYNQ chip achieves communication with a phased-array antenna peripheral assembly through LVDS, UART and the like. The system is low in overall implementation difficulty, high in reuse degree and convenient to upgrade and maintain.

Description

Technical Field

[0001] This utility model relates to the field of phased array antenna technology, and in particular to a phased array antenna main control module based on ZYNQ. Background Technology

[0002] A phased array antenna is an antenna that changes its directional pattern by controlling the feed phase of the radiating elements in the array. When applied to radar systems, it can improve the flexibility of beam control. Current phased array antenna control mainly relies on CPU processors and FPGAs. CPU processors offer simple software control design and are easy to upgrade and maintain, but they suffer from high overall power consumption and heat generation. FPGAs offer good control performance, but they have long development cycles, high development difficulty, and poor portability, making it impossible to simultaneously meet the control requirements of phased array antennas. Utility Model Content

[0003] The main purpose of this invention is to provide a phased array antenna main control module based on ZYNQ, which aims to solve the problems of high overall power consumption and heat generation, long development cycle and high difficulty, and poor portability of phased array antenna control units based on CPU processors and FPGAs.

[0004] To achieve the above objectives, this utility model proposes a ZYNQ-based phased array antenna main control module, which includes: an SPI NOR FLASH memory, an eMMC memory, and a ZYNQ chip.

[0005] The ZYNQ chip is connected to the SPI NOR FLASH memory and the eMMC memory. The LVDS bus interface of the ZYNQ chip is connected to the antenna unit. The ZYNQ chip communicates with the remote control terminal through an optical module.

[0006] The ZYNQ chip is used to receive control signals sent by the remote control terminal, and to control the antenna unit according to the control signals, adjusting the phase and amplitude of the antenna unit.

[0007] In one embodiment, the ZYNQ-based phased array antenna main control module includes a serial transceiver, and the UART interface of the ZYNQ chip is connected to external devices through the serial transceiver.

[0008] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a DDR3 memory module, which is connected to the ZYNQ chip.

[0009] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a power supply module, which is connected to the power interface of the ZYNQ chip and is used to provide operating power to the ZYNQ chip.

[0010] In one embodiment, the power module includes a DC-DC step-down circuit, which is used to step down the external power supply before supplying it to the ZYNQ chip.

[0011] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a network PHY chip, a serial transceiver, a first level conversion circuit, and a second level conversion circuit, wherein the network PHY chip, the serial transceiver, the first level conversion circuit, and the second level conversion circuit are connected to the ZYNQ chip.

[0012] In this utility model's technical solution, the GTX interface of the ZYNQ chip's PL end is connected to a remote control terminal via an optical module and to the antenna unit via an LVDS bus. After the radar system is initialized, the ZYNQ chip receives control signals sent by the remote control terminal and controls the antenna unit to work according to these control signals, adjusting the antenna's phase and amplitude to achieve beam and directional scanning. The phased array antenna main control module based on the ZYNQ chip communicates with the peripheral components of the phased array antenna via LVDS, UART, etc. Its overall implementation is low-difficulty, highly reusable, and easy to upgrade and maintain. Attached Figure Description

[0013] Figure 1 This is an overall block diagram of the main control module of the phased array antenna based on ZYNQ according to this utility model. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0015] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0016] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0017] In the description of this utility model, it should be understood that the terms "upper", "lower", "inner", "outer", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the utility model product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art. They are only used to facilitate the description of this utility model and to simplify the description, and are not intended to indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0018] Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0019] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, terms such as "set" and "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0020] The control of existing phased array antennas mainly relies on CPU processors and FPGAs. CPU processors are simple to implement in terms of software control design and are easy to upgrade and maintain, but they have problems such as high overall power consumption and heat generation. FPGAs have good control performance, but they have problems such as long development cycle, high development difficulty and poor portability, and cannot simultaneously meet the control requirements of phased array antennas.

[0021] To address the aforementioned problems, this invention proposes a phased array antenna main control module based on ZYNQ. The specific embodiments of this invention will be described in detail below with reference to the accompanying drawings.

[0022] like Figure 1 As shown, the main control module of the phased array antenna based on ZYNQ includes: SPI NOR FLASH memory, eMMC memory and ZYNQ chip;

[0023] The ZYNQ chip is connected to the SPI NOR FLASH memory and the eMMC memory. The LVDS bus interface of the ZYNQ chip is connected to the antenna unit. The ZYNQ chip communicates with the remote control terminal through an optical module.

[0024] The ZYNQ chip is used to receive control signals sent by the remote control terminal, and to control the antenna unit according to the control signals, adjusting the phase and amplitude of the antenna unit.

[0025] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a DDR3 memory module, which is connected to the ZYNQ chip.

[0026] In this embodiment, SPI NOR FLASH (Serial Peripheral Interface NOR Flash) memory and eMMC (Embedded Multi Media Card) memory can be used to store the embedded system and logic program of the ZYNQ chip. SPI NOR FLASH memory has the characteristics of long read / write life, small size, fast response speed, low power consumption and high reliability, while eMMC memory has the advantage of high-speed transmission. Two DDR3 SDRAM (Double-Data-Rate Three Synchronous Dynamic Random Access Memory) chips can be set up for use by the PS-side processor of the ZYNQ chip. Compared with DDR2 SDRAM, DDR3 SDRAM has the advantages of lower power consumption and heat generation, higher operating frequency and better versatility.

[0027] In this embodiment, ZYNQ stands for Zynq-7000 All Programmable SoC. The Zynq-7000 series is a fully programmable system-on-a-chip from Xilinx, consisting of two parts: PS (Processing System) and PL (Programmable Logic). ZYNQ integrates an ARM dual-core Cortex-A9 processor and a Xilinx 7 series FPGA architecture. In other words, ZYNQ is actually a system-on-a-chip. Therefore, it not only has the advantages of ASIC in terms of power consumption, performance, and compatibility, but also the advantages of FPGA hardware programmability. At the same time, it integrates the software programmability of the processor with the hardware programmability of the FPGA to improve system performance, flexibility, and scalability.

[0028] In this embodiment, the GTX interface of the ZYNQ chip's PL terminal is connected to the remote control terminal via an optical module and to the antenna unit via an LVDS bus. The PL terminal's GPIO interface controls the transmitting and receiving modules of the antenna unit. After the radar system initialization is complete, the ZYNQ chip receives the control signal sent by the remote control terminal and controls the antenna unit to work according to the control signal, adjusting the phase and amplitude of the antenna to achieve beam and directional scanning. The phased array antenna main control module based on the ZYNQ chip communicates with the peripheral components of the phased array antenna via LVDS, UART, etc. Its overall implementation is low-difficulty, highly reusable, and easy to upgrade and maintain.

[0029] In one embodiment, the ZYNQ-based phased array antenna main control module includes a serial transceiver, and the UART interface of the ZYNQ chip is connected to external devices through the serial transceiver.

[0030] In this embodiment, the ZYNQ chip is connected to the external panel interface via a serial transceiver. The serial transceiver can use RS485 to achieve communication with external devices. It has the advantages of strong anti-interference capability and long transmission distance, which makes it easy for the ZYNQ chip to monitor the working status of external devices, such as power consumption, temperature, voltage, current and other status information.

[0031] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a power supply module, which is connected to the power interface of the ZYNQ chip and is used to provide operating power to the ZYNQ chip.

[0032] In one embodiment, the power module includes a DC-DC step-down circuit, which is used to step down the external power supply before supplying it to the ZYNQ chip.

[0033] In this embodiment, the external power supply connected to the power module can be a battery power supply or a municipal power supply. The DC-DC step-down circuit steps down the external power supply to output a working power supply of 3.3V, 2.5V, 1.8V, 1.2V or 1.0V to provide the required working voltage for the ZYNQ chip.

[0034] In one embodiment, the ZYNQ-based phased array antenna main control module further includes a network PHY chip, a serial transceiver, a first level conversion circuit, and a second level conversion circuit, wherein the network PHY chip, the serial transceiver, the first level conversion circuit, and the second level conversion circuit are connected to the ZYNQ chip.

[0035] In this embodiment, the GMAC interface on the PS side of the ZYNQ chip is brought out to the connector via the RGMII bus and connected to the network PHY chip for network debugging and remote access; the UART interface on the PS side of the ZYNQ chip is brought out to the connector via the serial transceiver chip for system startup debugging and operating system log output; the JTAG interface on the PS side of the ZYNQ chip is brought out to the connector via the first level conversion chip, and the JTAG interface on the PL side of the ZYNQ chip is brought out to the connector via the second level conversion chip for hardware debugging during development.

[0036] In summary, the phased array antenna main control module based on ZYNQ of this utility model has low overall implementation difficulty and high reusability. Furthermore, the performance and storage space of the ZYNQ PS-side processor can meet the usage requirements, solving the problems of high development difficulty and long cycle. In addition, the phased array antenna main control module based on ZYNQ has improved the system's rapid upgrade and maintenance capabilities.

[0037] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A phased array antenna main control module based on ZYNQ, characterized in that, The ZYNQ-based phased array antenna main control module includes: SPI NOR FLASH memory, eMMC memory, and ZYNQ chip; The ZYNQ chip is connected to the SPI NOR FLASH memory and the eMMC memory. The LVDS bus interface of the ZYNQ chip is connected to the antenna unit. The ZYNQ chip communicates with the remote control terminal through an optical module. The ZYNQ chip is used to receive control signals sent by the remote control terminal, and to control the antenna unit according to the control signals, adjusting the phase and amplitude of the antenna unit.

2. The ZYNQ-based phased array antenna main control module according to claim 1, characterized in that, The ZYNQ-based phased array antenna main control module includes a serial transceiver, and the UART interface of the ZYNQ chip is connected to external devices through the serial transceiver.

3. The ZYNQ-based phased array antenna main control module according to claim 1, characterized in that, The ZYNQ-based phased array antenna main control module also includes a DDR3 memory module, which is connected to the ZYNQ chip.

4. The ZYNQ-based phased array antenna main control module according to claim 1, characterized in that, The ZYNQ-based phased array antenna main control module also includes a power supply module, which is connected to the power interface of the ZYNQ chip and is used to provide operating power to the ZYNQ chip.

5. The ZYNQ-based phased array antenna main control module according to claim 4, characterized in that, The power module includes a DC-DC step-down circuit, which is used to step down the external power supply before supplying it to the ZYNQ chip.

6. The ZYNQ-based phased array antenna main control module according to claim 1, characterized in that, The ZYNQ-based phased array antenna main control module also includes a network PHY chip, a serial transceiver, a first level conversion circuit and a second level conversion circuit, and the network PHY chip, serial transceiver, first level conversion circuit and second level conversion circuit are connected to the ZYNQ chip.

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