Micro-LED driving chip

Abstract

The utility model relates to the technical field of LED driving, and discloses a Micro-LED driving chip comprising a plurality of driving units which form an M * N driving unit array; the reference current source is used for generating reference current, copying the reference current to generate driving current and transmitting the driving current to the driving unit; the microcontroller is used for receiving and processing the video data, generating gray scale data and transmitting the gray scale data to the driving unit; the shift register is used for generating a row signal and transmitting the row signal to the driving unit of each row; wherein after the row signal is received, the driving unit corresponding to the row converts the gray data into the PWM signal, and the driving current is combined to generate a driving current array and output the driving current array. A large number of driving units are integrated to the driving chip to form the driving unit array, the driving chip array is used for outputting the driving current and generating the driving current array, and meanwhile a large number of Micro-LED display units are driven, so that the problem of mismatch between different driving chips is solved, and the brightness consistency is improved.

Description

Technical Field

[0001] This application relates to the field of LED driver technology, and for example to a Micro-LED driver chip. Background Technology

[0002] Compared to traditional LED display devices, Micro-LED is a novel display technology that represents a significant future direction for display technology. The core of Micro-LED technology lies in using extremely small LED light-emitting units (typically between 1 and 60 μm) to form a display array. These tiny LED units can be used directly for display without backlighting, offering advantages such as high brightness, high contrast, high color saturation, and long lifespan. These characteristics make Micro-LED technology a promising candidate for applications in portable devices, wearable devices, and automotive devices.

[0003] Benefiting from advancements in process technology, Micro-LEDs have begun mass production and are being applied in fields such as displays and lighting. However, the high pixel density of Micro-LEDs places stringent requirements on the design of their driver chips. In the field of LED driver chips, traditional LED driver chips are limited by their chip size, making it difficult to integrate them densely on a PCB. Furthermore, traditional LED driver chips struggle to meet design requirements in terms of display uniformity, and mismatch issues exist between multiple driver chips.

[0004] Chinese patent application CN202411451242, published on December 10, 2024, discloses a driving method and chip for Micro-LED displays. The chip divides the pixel unit and driving unit into multiple sub-regions and transmits grayscale data in each sub-region through an independent protocol interface, thereby achieving high transmission speed and low power consumption. At the same time, it uses temperature sensors integrated at different locations on the chip to dynamically adjust the brightness of the pixel unit, improving the uniformity of the display.

[0005] In implementing the above solution, the applicant discovered the following problems: Micro-LED pixels need to be grown on the driving unit pixels of the Micro-LED. Due to the high bonding cost of Micro-LEDs, qualified Micro-LED chips need to be selected during the CP testing stage for the next bonding step. During CP testing of the aforementioned chip, probes are typically used to detect the current of each driving unit pixel to confirm whether the driving unit is working properly. However, the window on each driving unit pixel is too small, making it impossible to accurately detect the current during CP testing. Furthermore, checking the output current of each driving unit pixel individually is time-consuming, increasing time costs in the production process. In addition, the proposed driving unit circuit for the above chip uses a scanning mode, limiting its application scenarios.

[0006] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Utility Model Content

[0007] To provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended as a general commentary, nor is it intended to identify key / important components or describe the scope of protection of these embodiments, but rather as a prelude to the detailed description that follows.

[0008] This disclosure provides a Micro-LED driver chip, comprising: multiple driver units forming an M*N driver unit array; a reference current source for generating a reference current, replicating it to generate a drive current, and transmitting it to the driver units; a microcontroller for receiving and processing video data, generating grayscale data, and transmitting the grayscale data to the driver units; and a shift register for generating row signals and transmitting the row signals to the driver units of each row. Upon receiving a row signal, the corresponding driver unit converts the grayscale data into a PWM signal, combines it with the drive current, generates a drive current array, and outputs it.

[0009] In one embodiment, grayscale data of pixels is transmitted to the corresponding driver unit via the QSPI protocol.

[0010] In one embodiment, the driving unit includes a data storage unit for storing grayscale data.

[0011] In one embodiment, the driving unit includes a plurality of D flip-flops connected in series, the number of which is the same as the number of bits of grayscale data, for converting grayscale data into PWM signals.

[0012] In one embodiment, the driver chip has a trimming mode, in which the output terminals of multiple driver units are short-circuited.

[0013] In one embodiment, the output of each row of drive units in the drive unit array is shorted, and multiple rows of drive units are connected in parallel to a set pin.

[0014] In one embodiment, the drive unit may output drive current in either a scanning mode or a non-scanning mode.

[0015] In one embodiment, the circuit of the non-scanning mode driving unit includes a first D flip-flop circuit, a second D flip-flop circuit, transistor PM1, transistor PM2, and transistor PM3; the first D flip-flop circuit includes multiple first D flip-flops connected in series, the number of which is the same as the number of bits of grayscale data; the second D flip-flop circuit includes a second D flip-flop, the EN terminal of the second D flip-flop is connected to the gate of PM1, the ENB terminal of the second D flip-flop is connected to the gate of PM2, the source of PM1 is connected to VDD, the drain of PM1 is connected to the gate of PM3, and the source of PM2 is connected to the bias signal Bias. PM2's drain is connected to PM3's gate, PM3's source is connected to VDD, and PM2's drain is connected to the output iout and then to the output itrim via a switching transistor. The switching transistor's gate is connected to the trim signal. The second D flip-flop's SET terminal is connected to the SET signal, and the second D flip-flop's RESET terminal is connected to the pwm_en signal. The CLK signal and pwm_enbb signal are ANDed to generate the CLK1 signal, which is transmitted to the first D flip-flop circuit. The rctrl signal and grayscale data generate a multi-bit signal, which is then connected to the set and reset terminals of multiple D flip-flops in the first D flip-flop circuit.

[0016] The Micro-LED driver chip provided in this disclosure can achieve the following technical effects:

[0017] 1. By integrating a large number of driving units into the driving chip to form a driving unit array, the problem of driving chips being difficult to integrate on the PCB board is solved. The driving chip with the driving chip array outputs driving current to generate a driving current array, which drives a large number of Micro-LED display units at the same time. This helps to solve the mismatch problem between different driving chips and improve the consistency of brightness.

[0018] 2. In the adjustment mode, by shorting the output terminal of each row of driving units, multiple rows of driving units are connected in parallel to the set pin, which facilitates CP testing to select suitable Micro-LED driving chips and Micro-LED lamp beads for bonding, thereby reducing production costs.

[0019] 3. A driving unit structure with scanning mode and non-scanning mode is proposed, so that the driving chip can be used to drive LEDs in a variety of scenarios.

[0020] The above general description and the description below are exemplary and illustrative only and are not intended to limit this application. Attached Figure Description

[0021] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations and drawings do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are shown as similar elements. The drawings are not to be scaled. And wherein:

[0022] Figure 1 This is a system design architecture diagram of a Micro-LED driver chip provided in an embodiment of this disclosure;

[0023] Figure 2 This is a schematic diagram of the drive unit in the tuning mode provided in the embodiments of this disclosure;

[0024] Figure 3 This is a schematic diagram of the framework of a single drive unit in non-scanning mode provided in an embodiment of this disclosure;

[0025] Figure 4 This is a timing diagram of the operation of a single drive unit in non-scanning mode provided in an embodiment of this disclosure;

[0026] Figure 5 This is a schematic diagram of the framework of a single driving unit in the scanning mode provided in the embodiments of this disclosure;

[0027] Figure 6 This is a timing diagram of the operation of a single driving unit in the scanning mode provided in the embodiments of this disclosure. Detailed Implementation

[0028] To provide a more detailed understanding of the features and technical content of the embodiments of this disclosure, the implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for illustrative purposes only and are not intended to limit the embodiments of this disclosure. In the following technical description, for ease of explanation, several details are used to provide a full understanding of the disclosed embodiments. However, one or more embodiments may still be implemented without these details. In other cases, well-known structures and devices may be simplified in their depiction to simplify the drawings.

[0029] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this disclosure described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0030] Unless otherwise stated, the term "multiple" means two or more.

[0031] It should be noted that, unless otherwise specified, the embodiments and features described in the present disclosure can be combined with each other.

[0032] This disclosure provides a Micro-LED driver chip, comprising: multiple driver units forming an M*N driver unit array; a reference current source for generating a reference current, replicating it to generate a drive current, and transmitting it to the driver units; a microcontroller for receiving and processing video data, generating grayscale data, and transmitting the grayscale data to the driver units; and a shift register for generating row signals and transmitting the row signals to the driver units of each row. Upon receiving a row signal, the corresponding driver unit converts the grayscale data into a PWM signal, combines it with the drive current, generates a drive current array, and outputs it.

[0033] By integrating a large number of driving units onto a driving chip to form a driving unit array, the problem of driving chips being difficult to integrate onto a PCB board is solved. Furthermore, by using a driving chip with a driving chip array to simultaneously drive a large number of Micro-LEDs, the mismatch between different driving chips can be resolved, thereby improving the consistency of brightness.

[0034] In one embodiment, the M*N driving unit array of this application can be defined by M and N as needed. The grayscale value of the pixel of a single driving unit can also be customized, including 8-bit, 10-bit, 12-bit, etc.

[0035] In one embodiment, grayscale data of pixels is transmitted to the corresponding driver unit via the QSPI protocol.

[0036] In one embodiment, the driving unit includes a data storage unit, which includes a first shift register and a second shift register for storing grayscale data.

[0037] In one embodiment, the driving unit includes a plurality of D flip-flops connected in series, the number of which is the same as the number of bits of grayscale data, for converting grayscale data into PWM signals.

[0038] In one embodiment, the driver chip has a trimming mode in which the outputs of multiple driver units are short-circuited. Since the window size of each driver unit pixel on the driver chip is small, it is impossible to accurately insert probes into the driver unit pixel during CP testing to screen driver chips. Therefore, by short-circuiting the outputs of multiple driver units and using a round-robin approach to collect the drive current in each driver unit, chips with qualified current can be screened during the CP stage for subsequent bonding work. This helps reduce time costs.

[0039] In one embodiment, the output of each row of drive units in the drive unit array is shorted, and multiple rows of drive units are connected in parallel to a set pin.

[0040] Specifically, refer to Figure 2 Taking an 8-bit grayscale data set with 270 pixels arranged in 90 rows and 3 columns as an example, all 270 driving units are connected in parallel to the SDO pin. The SDO pin is an output port of the chip, which can be accurately detected by probes during CP testing. The pixel reset signal sets the output of all driving units to 0. After the first row signal arrives, the driving units in that row output a driving current itrim, which is then superimposed on the SDO pin. Next, after the second row signal arrives, the driving units in that row output a driving current itrim, which is then superimposed on the SDO pin. This continues until the driving units in the 89th row output a driving current that is superimposed on the SDO pin, thus completing the detection of the output driving current.

[0041] In one embodiment, the drive unit may output drive current in either a scanning mode or a non-scanning mode.

[0042] In one embodiment, the circuit of the non-scanning mode driving unit includes a first D flip-flop circuit, a second D flip-flop circuit, transistor PM1, transistor PM2, and transistor PM3; the first D flip-flop circuit includes multiple first D flip-flops connected in series, the number of which is the same as the number of bits of grayscale data; the second D flip-flop circuit includes a second D flip-flop, the EN terminal of the second D flip-flop is connected to the gate of PM1, the ENB terminal of the second D flip-flop is connected to the gate of PM2, the source of PM1 is connected to VDD, the drain of PM1 is connected to the gate of PM3, and the source of PM2 is connected to the bias signal Bias. PM2's drain is connected to PM3's gate, PM3's source is connected to VDD, and PM2's drain is connected to the output iout and then to the output itrim via a switching transistor. The switching transistor's gate is connected to the trim signal. The second D flip-flop's SET terminal is connected to the SET signal, and the second D flip-flop's RESET terminal is connected to the pwm_en signal. The CLK signal and pwm_enbb signal are ANDed to generate the CLK1 signal, which is transmitted to the first D flip-flop circuit. The rctrl signal and grayscale data generate a multi-bit signal, which is then connected to the set and reset terminals of multiple D flip-flops in the first D flip-flop circuit.

[0043] Reference Figure 3 and Figure 4 Taking 4-bit grayscale data as an example, in non-scanning mode, the first D flip-flop circuit includes four cascaded first D flip-flops, and the second D flip-flop circuit includes two second D flip-flops. The five D flip-flops are connected sequentially. EN and ENB are connected to the gates of transistors PM1 and PM2, respectively. The source of PM1 is connected to VDD, and its drain is connected to the gate of PM3. The source of PM2 is connected to Bias, and its drain is connected to the gate of PM3; Bias is a bias signal generated by a reference current. The source of PM3 is connected to VDD, and its drain is connected to the output iout and then to itrim via a switching transistor. The SET port of the second D flip-flop is connected to the SET signal, and the RESET port is connected to the pwm_en signal. The CLK signal is ANDed with the pwm_enbb signal to generate the CLK1 signal. The rctrl signal is connected to the 4-bit grayscale data generation signals S<3:0> and R<3:0>, which are respectively connected to the set and reset terminals of the four first D flip-flops.

[0044] Taking a 4-bit grayscale data as an example, before the rising edge of the pwm_en signal arrives, the Q terminal of the second D flip-flop is reset to 0, and the Qn terminal is reset to 0, thereby turning on transistor PM1 and turning off transistor PM2. The gate voltage of PM3 is pulled to the power supply voltage VDD, and transistor PM3 is turned off. After the rctrl signal goes high, the rctrl signal, along with the 4-bit grayscale data generation signals S<3:0> and R<3:0>, sets the corresponding D flip-flop outputs (CLK2, CLK3, CLK4, CLK5) to 0 or 1. After the rctrl signal becomes 0, the four first D flip-flops store their output states. After the pwm_en signal arrives, the SET signal is briefly set to 0, the Q terminal of the second D flip-flop is set to 1, and the Qn terminal is set to 0. Transistor PM3 outputs the drive current iout. At the same time, the CLK signal and the pwm_en signal generate the signal CLK1. The counter composed of four first D flip-flops starts to work and generates a PWM signal on the CLK5 signal line. At the instant when the CLK5 signal changes from low level to high level, the second D flip-flop outputs the 0 signal at its D terminal to the EN port, thereby turning on PM1 and pulling the gate of PM3 to VDD, turning off transistor PM3, and completing one cycle of display.

[0045] Reference Figure 5 and Figure 6 In scan mode, four first D flip-flops are connected sequentially. EN and ENB are connected to the gates of transistors PM1 and PM2, respectively. The source of PM1 is connected to VDD, and its drain is connected to the gate of PM3. The source of PM2 is connected to Bias, and its drain is connected to the gate of PM3. Bias is a bias signal generated by a reference current. The source of PM3 is connected to VDD, and its drain is connected to the output iout and then to itrim via a switching transistor. The gate of the switching transistor is connected to the trim signal. The SET port of the second D flip-flop is connected to the SET signal, and the RESET port of the second D flip-flop is connected to the SEL signal. The CLK signal is ANDed with the SEL signal to generate the CLK1 signal. The rctrl signal, through the third and fourth flip-flops, generates the SEL and SELB signals under the action of CLK. The rctrl signal, along with the 4-bit grayscale data generation signals S<3:0> and R<3:0>, are connected to the set and reset terminals of the four first D flip-flops, respectively.

[0046] Taking a 4-bit grayscale data as an example, before the rising edge of the row signal arrives, the Q input of the second D flip-flop is reset to 0, and the Qn input is set to 1, thereby turning on transistor PM1 and turning off transistor PM2. The gate voltage of PM3 is pulled to the power supply voltage VDD, and transistor PM3 is turned off. The SELB signal, along with the 4-bit grayscale data generation signals S<3:0> and R<3:0>, sets the corresponding D flip-flop outputs (CLK2, CLK3, CLK4, CLK5) to 0 or 1, and the four first D flip-flops store their output states. After the rctrl signal goes high, after two CLK clock cycles, the SEL signal is pulled high, the SELB signal goes low, and S<3:0> and R<3:0> are set to 1. The four first D flip-flops will maintain their original outputs. At this moment, the SET signal is briefly set to low, the Q terminal of the second D flip-flop outputs a high level, and the Qn terminal outputs a low level, i.e., EN is high and ENB is low, thus turning off transistor PM1 and turning on transistor PM2. The Bias bias signal is connected to transistor PM3, outputting the corresponding current at the iout port. Simultaneously, the CLK and SEL signals generate signal CLK1, and the counter composed of four first D flip-flops starts working, generating a PWM signal on the CLK5 signal line. At the instant the CLK5 signal changes from low to high, the second D flip-flop outputs the 0 signal at its D terminal to the EN port, thereby turning on PM1, pulling the gate of PM3 to VDD, turning off transistor PM3, and completing one display cycle.

[0047] The present invention and its embodiments have been described above illustratively. This description is not restrictive, and the figures shown are only one embodiment of the present invention; the actual structure is not limited thereto. Therefore, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the inventive spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. A Micro-LED driving chip, characterized in that, The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. 2.The Micro-LED driving chip of claim 1, wherein, The application relates to a driving chip for driving a display screen. 3.The Micro-LED driving chip of claim 1, wherein, The application relates to a driving chip for driving a display screen. 4.The Micro-LED driving chip of claim 1, wherein, The application relates to a driving chip for driving a display screen.

5. The Micro-LED driving chip according to claim 1, wherein, The application relates to a driving chip for driving a display screen.

6. The Micro-LED driving chip according to claim 5, characterized in that, The application relates to a driving chip for driving a display screen.

7. The Micro-LED driving chip according to claim 1, wherein, The application relates to a driving chip for driving a display screen. 8.The Micro-LED driving chip of claim 7, wherein, The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. The application relates to a driving chip for driving a display screen. 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