Front-end overvoltage and undervoltage resistant surge circuit

Abstract

A front-end overvoltage and undervoltage surge resisting circuit comprises a power signal end, an overvoltage surge circuit, an undervoltage surge circuit, a first output sampling unit, a second output sampling unit and a direct current output end. A power signal end is connected with an input end of the overvoltage surge circuit, an output end of the overvoltage surge circuit is connected with the first output sampling unit and an input end of the undervoltage surge circuit, and an output end of the undervoltage surge circuit is connected with the second output sampling unit and a direct current output end. The overvoltage surge circuit suppresses input surge voltage, the undervoltage surge circuit boosts low voltage, output voltage is sampled through the first output sampling unit and the second output sampling unit, and feedback signals are provided to adjust and stabilize the output voltage of the overvoltage surge circuit and the undervoltage surge circuit. The circuit effectively controls overvoltage and undervoltage surge voltage waveforms, reduces impact on a rear-end circuit, prevents overlarge surge current caused by unstable surge voltage and overlong surge duration, is suitable for various isolated switching power supplies or DC / DC converters, and improves system stability and reliability.

Description

Technical Field

[0001] This utility model relates to the field of switching power supply technology, specifically to a front-end surge protection circuit against over- and under-voltage surges. Background Technology

[0002] Switching power supplies and DC / DC converters, serving as secondary power supplies for systems, are widely used in military and civilian electronic systems such as aerospace, aviation, shipbuilding, weaponry, electronics, railways, communications, medical electronics, and industrial automation equipment. When a switching power supply is powered on, i.e., when the input power is supplied, the output voltage waveform of the switching power supply has a significant impact on the entire system. The surge voltage generated by the instantaneous rise or fall of the input voltage can cause different impacts on the switching power supply and the load. Excessive surge voltage can generate large inrush currents, which can not only cause malfunctions in the switching power supply system but, in severe cases, even damage the entire system. Summary of the Invention

[0003] The purpose of this invention is to provide a front-end surge protection circuit that can control the waveform of the input signal at the front end of the switching power supply when a surge occurs, so that the surge voltage can quickly return to the safe voltage range, thereby protecting the switching power supply system.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: a front-end surge protection circuit for overvoltage and undervoltage, comprising a power signal terminal, an overvoltage surge circuit, an undervoltage surge circuit, a first output sampling unit, a second output sampling unit, and a DC output terminal. The power signal terminal is connected to the input terminal of the overvoltage surge circuit, the output terminal of the overvoltage surge circuit is connected to the first output sampling unit and the input terminal of the undervoltage surge circuit, and the output terminal of the undervoltage surge circuit is connected to the second output sampling unit and the DC output terminal.

[0005] The overvoltage surge circuit monitors the input power supply voltage. When the voltage exceeds the set safe range, it limits the excessively high voltage to prevent damage to subsequent circuits and loads. The undervoltage surge circuit monitors the input power supply voltage. When the voltage is below the set safe range, it boosts the excessively low voltage to prevent excessively high surge current from affecting subsequent circuits and loads. The first output sampling unit samples and divides the output voltage of the overvoltage surge circuit, providing a feedback signal to help regulate and stabilize the output voltage of the overvoltage surge circuit, ensuring that the output voltage is within the safe range. The second output sampling unit samples and divides the output voltage of the undervoltage surge circuit, providing a feedback signal to help regulate and stabilize the output voltage of the undervoltage surge circuit, ensuring that the output voltage is within the safe range.

[0006] The beneficial effects of this invention are as follows: Through the front-end over / under voltage surge protection circuit, the surge voltage waveform can be effectively controlled, avoiding excessively large surge voltages and prolonged surge currents. When a surge occurs in the power system, this circuit can respond quickly, suppressing the amplitude of the surge voltage and current and restoring them to a safe range, thereby reducing the surge duration, significantly reducing the impact on the load, and preventing damage to the entire system and power system due to excessively high surge voltages and currents.

[0007] In the event of an overvoltage surge, the high-voltage suppression chip and MOSFET power transistor respond rapidly, suppressing excessive voltage by controlling current flow. In the event of an undervoltage surge, the boost chip and related circuitry suppress excessive surge current by increasing the voltage. The combined use of overvoltage and undervoltage protection provides effective surge protection over a wide voltage range, ensuring stable system operation under various voltage fluctuations.

[0008] The voltage sampling and feedback mechanism in the circuit design monitors the output voltage in real time through the first and second output sampling units and feeds the information back to the control chip, ensuring that the circuit adjusts and stabilizes the output voltage in a timely manner, thereby improving the stability and reliability of the power supply system.

[0009] This invention's front-end surge protection circuit is suitable for various isolated switching power supplies or DC / DC converters. These devices are widely used in electronic equipment requiring stable power supply, such as communication equipment, industrial control systems, computers, and peripherals. By applying this circuit, these devices can be better protected against voltage surges, extending equipment life, reducing maintenance costs, and improving the overall reliability and safety of the system.

[0010] In summary, this utility model provides a highly efficient front-end surge protection circuit that can quickly respond to and restore voltage under voltage surge conditions, reduce the impact on the load, and protect the safety of the entire system and power supply system. It has significant application value and wide applicability. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the circuit structure of this utility model;

[0012] Figure 2 This is a schematic diagram of the overvoltage surge circuit of this utility model;

[0013] Figure 3 This is a schematic diagram of the undervoltage surge circuit of this utility model. Detailed Implementation

[0014] The present invention will be further described below with reference to the accompanying drawings:

[0015] like Figure 1As shown, a front-end surge protection circuit for overvoltage and undervoltage includes a power signal terminal, an overvoltage surge circuit, an undervoltage surge circuit, a first output sampling unit, a second output sampling unit, and a DC output terminal. The power signal terminal is connected to the input terminal of the overvoltage surge circuit, the output of the overvoltage surge circuit is connected to the input terminals of the first output sampling unit and the undervoltage surge circuit, and the output of the undervoltage surge circuit is connected to the second output sampling unit and the DC output terminal.

[0016] The overvoltage surge circuit monitors the input power supply voltage. When the voltage exceeds the set safe range, it limits the excessively high voltage to prevent damage to downstream circuits and loads. The undervoltage surge circuit monitors the input power supply voltage. When the voltage falls below the set safe range, it boosts the excessively low voltage to prevent excessively high inrush current from affecting downstream circuits and loads. The first output sampling unit samples and divides the output voltage of the overvoltage surge circuit, providing a feedback signal to help regulate and stabilize the output voltage of the overvoltage surge circuit, ensuring that the output voltage remains within the safe range. The second output sampling unit samples and divides the output voltage of the undervoltage surge circuit, providing a feedback signal to help regulate and stabilize the output voltage of the undervoltage surge circuit, ensuring that the output voltage remains within the safe range.

[0017] like Figure 2As shown, the overvoltage surge circuit includes a high-voltage suppression chip U1, MOSFET power transistors Q1 and Q2, resistors R2, R3, R4, R5, R7, R8, R9, and R11, capacitors C2, C3, C4, C7, C8, C11, C12, and C17, and also includes a diode D1 and an inductor L1. The specific circuit connection is as follows: the input power signal terminal is connected to one end of capacitor C1, one end of resistor R4, pin 15 (VIN) of the high-voltage suppression chip U1, and the drain of the MOSFET power transistor Q2. The other end of resistor R4 is connected to pin 17 (RUN) of high voltage suppression chip U1 to start the chip; the gate of MOSFET power transistor Q2 is connected to pin 9 (TG) of high voltage suppression chip U1 to control the conduction and turn-off of Q2; the source of MOSFET power transistor Q2 is connected to the drain of MOSFET power transistor Q1, pin 10 (SW) of high voltage suppression chip U1, one end of capacitor C6, one end of resistor R2, and one end of inductor L1. Q2 and Q1 work together to regulate the output voltage. The source of MOSFET power transistor Q1 is grounded. The other end of capacitor C6 is connected to pin 11 (BOOST) of high voltage suppression chip U1 and the cathode of diode D1 to provide voltage boost. The anode of diode D1 is connected to pin 14 (DRVcc) of high voltage suppression chip U1 to drive the voltage. The other end of resistor R2 is connected to one end of resistor R3, one end of capacitor C5, and pin 1 (SE+) of high voltage suppression chip U1. The other end of inductor L1 is connected to the other end of resistor R3, the other end of capacitor C5, pin 2 (SE-) of high voltage suppression chip U1, one end of capacitor C2, the first output sampling unit, and the undervoltage surge circuit VBOOST. The other end of capacitor C2 is grounded for filtering. Pin 14 (DRVcc) of the high-voltage suppression chip U1 is connected to one end of capacitor C9 to stabilize the drive voltage. Pins 18 (DRUVU) and 19 of the high-voltage suppression chip U1 are shorted and connected to one end of capacitor C10; DRVU is used to set undervoltage lockout. Pin 7 (FRE) of the high-voltage suppression chip U1 is connected to one end of resistor R8 to set the operating frequency; the other ends of capacitors C9, C10, and R8 are grounded. Pin 5 (ITH) of the high-voltage suppression chip U1 is connected to one end of resistor R9 and capacitor C14 for loop compensation; the other end of resistor R9 is connected to one end of capacitor C15; the other ends of capacitors C14, C15, and C16 are grounded. Pin 3 (SS) of the high-voltage suppression chip U1 is connected to one end of capacitor C16 for soft start. Pins 20 (OVLO), 16 (EXTVcc), 13 (GND), and 21 (GND) of the high-voltage suppression chip U1 are grounded.Pin 6, TMR, of the high voltage suppression chip U1 is connected to one end of capacitor C13 to set the overvoltage protection timer; the other end of capacitor C13 is grounded; pin 8, WAR, of the high voltage suppression chip U1 is connected to one end of resistor R11; the other end of resistor R11 is connected to pin 19, INTVcc, of the high voltage suppression chip U1 to supply power to the internal circuit.

[0018] The first output sampling unit includes resistors R5 and R7. One end of resistor R5 is connected to the other end of the overvoltage surge circuit inductor L1 and the undervoltage surge circuit VBOOST, respectively. The other end of resistor R5 is connected to one end of resistor R7 and pin 4 (FB) of the high-voltage suppression chip U1, respectively. The other end of resistor R7 is grounded. Resistors R5 and R7, through voltage division, acquire the voltage signal across inductor L1 and transmit this signal to the FB pin of the high-voltage suppression chip U1 for feedback adjustment.

[0019] like Figure 3As shown, the undervoltage surge circuit includes a boost converter chip U2, resistors R1, R6, R10, and R12, capacitors C1, C5, C6, C9, C10, C13, C14, C15, and C16, a diode D2, and MOSFET power transistors Q3 and Q4, as well as an inductor L2. The specific circuit connection is as follows: the input terminal VBOOST is connected to the output terminal of the overvoltage surge circuit, one end of capacitor C3, pin 19 (VBIAS) of the boost converter chip U2, one end of resistor R1, and pin 9 (SENSE+) of the undervoltage surge circuit to provide an initial voltage signal; the other end of capacitor C3 is grounded to provide a stable reference voltage; the other end of resistor R1 is connected to one end of inductor L2 and pin 8 (SENSE-) of the boost converter chip U2 for current detection; the other end of inductor L2 is connected to MOSFET power transistor Q4... The drain of the MOSFET power transistor Q3, one end of capacitor C12, and pin 13 (SW) of the boost chip U2 are connected for energy storage and transfer; the gate of the MOSFET power transistor Q4 is connected to pin 16 (BG) of the boost chip U2 to control the turn-on and turn-off of Q4; the source of the MOSFET power transistor Q4 is grounded; the gate of the MOSFET power transistor Q3 is connected to pin 14 (TG) of the boost chip U2 to control the turn-on and turn-off of Q3; the source of the MOSFET power transistor Q3 is connected to one end of capacitor C4, the drain of the MOSFET power transistor Q3, one end of capacitor C12, and pin 13 (SW) of the boost chip U2 for energy storage and transfer; the gate of the MOSFET power transistor Q4 ... The signal terminal and the second output sampling unit are connected to control voltage boosting; the other end of capacitor C4 is grounded to provide decoupling and filtering; the other end of capacitor C12 is connected to pin 15 (BOOST) of boost chip U2 and the cathode of diode D2 to boost voltage; the anode of diode D2 is connected to pin 2 (INTVcc) of boost chip U2 and one end of capacitor C17 to provide voltage protection; the other end of capacitor C17 is grounded to stabilize voltage; pin 10 (VFB) of boost chip U2 is connected to the second output sampling unit for inversion. Feedback control; pin 7 (SS) of boost chip U2 is connected to one end of capacitor C7 to provide soft-start function; the other end of capacitor C7 is connected to one end of capacitor C8, one end of capacitor C11, pin 5 (PLLIN / MODE) of boost chip U2, pin 3 (FREQ) of boost chip U2, and pin 12 (OVMODE) of boost chip U2 and then grounded for frequency setting and mode selection; pin 11 (ITH) of boost chip U2 is connected to the other end of resistor R6 and the other end of capacitor C11 for loop compensation and stability control.

[0020] The second output sampling unit includes resistors R10 and R12. One end of resistor R10 is connected to the source and output signal terminal of the undervoltage surge circuit MOSFET power transistor Q3. The other end of resistor R10 is connected to one end of resistor R12 and pin 10 (VFB) of the boost chip U2. The other end of resistor R12 is grounded. Resistors R10 and R12, through voltage division, acquire the voltage signal at the source of MOSFET power transistor Q3 and transmit this signal to the VFB pin of boost chip U2 for feedback adjustment.

[0021] In this embodiment, the high voltage suppression chip U1 for the overvoltage surge circuit uses a chip of model LTC7862, and the boost chip U2 for the undervoltage surge circuit uses a chip of model LTC3769.

[0022] The working principle of the front-end surge protection circuit against over- and under-voltage in this utility model is as follows:

[0023] When the surge voltage is too small, the TG terminal of the high-voltage suppression chip U1 in the overvoltage surge circuit remains at a high level, turning on the MOSFET power transistor Q2. At this time, the boost chip U2 in the undervoltage surge circuit starts its boost function, storing energy through inductor L2 and controlling the MOSFET power transistor Q3 to increase the voltage to the set range. The first output sampling unit samples the output voltage of U2 and sends the feedback signal back to the error amplification unit of U2 to help it determine whether the output voltage needs adjustment. The second output sampling unit samples the output voltage of U1 and sends the feedback signal back to the error amplification unit of U1 to ensure the stability of the boosted voltage.

[0024] When the surge voltage is too high, the overvoltage surge circuit's high-voltage suppression chip U1 clamps the voltage at a set voltage to ensure it does not exceed the safe range. At this time, the MOSFET power transistor Q3 controlled by the undervoltage surge circuit's boost chip U2 remains always on, without boosting the voltage. The first output sampling unit samples the output voltage of U2 and sends the feedback signal back to U2 for further adjustment and stabilization of the output voltage. The second output sampling unit samples the output voltage of U1 and sends the feedback signal back to U1 to help it determine whether the output voltage needs adjustment.

[0025] When the surge voltage is within the normal range, the MOSFET power transistors Q2 and Q3, controlled by the high-voltage suppression chip U1 in the overvoltage surge circuit and the boost chip U2 in the undervoltage surge circuit, are both in the on state. The first output sampling unit samples the output voltage of U2 and feeds it back to the error amplification unit of U2 to ensure output voltage stability. The second output sampling unit samples the output voltage of U1 and feeds it back to the error amplification unit of U1 to ensure output voltage stability.

[0026] The high-voltage suppression chip U1 for overvoltage surge circuit and the boost chip U2 for undervoltage surge circuit are the core circuit units of the front-end overvoltage and undervoltage surge protection circuit. Loop adjustment is performed through their ITH ports to control the stability of the output voltage. A capacitor is connected through the SS port to achieve soft start and prevent current overshoot during startup. The operating frequency is set through the frequency setting ports, namely FRE of U2 and FREQ of U1, to ensure system stability and reliability. Current is detected through SE+ and SE- of the high-voltage suppression chip U1 and SENSE+ and SENSE- of the boost chip U2 to help the chip determine the current state, control current rise, and provide protection. The TG and BG pins control the conduction and turn-off of the MOSFET power transistors, thereby achieving circuit control.

[0027] Through the above technical solutions, the front-end surge protection circuit structure effectively controls the surge voltage generated at the front end, preventing abnormal operation or damage of the switching power supply, improving the safety and adaptability of the circuit, and providing a guarantee for the safety of the load system. The embodiments described above are merely preferred embodiments of this utility model and are not intended to limit the scope of this utility model. Various modifications and improvements made to the technical solutions of this utility model by those skilled in the art without departing from the spirit of this utility model should fall within the protection scope defined by the claims of this utility model.

Claims

1. A front end over / under voltage surge protection circuit, characterized by: The power supply signal end is connected with the input end of the overvoltage surge circuit, the output end of the overvoltage surge circuit is connected with the first output sampling unit and the input end of the under-voltage surge circuit respectively, and the output end of the under-voltage surge circuit is connected with the second output sampling unit and the DC output end respectively; The overvoltage surge circuit is used for monitoring the input power voltage, limiting the excessively high voltage when the voltage exceeds the set safety range, preventing the damage of the overvoltage surge to the subsequent circuit and the load, the under-voltage surge circuit is used for monitoring the input power voltage, boosting the excessively low voltage when the voltage is lower than the set safety range, preventing the influence of the excessively high surge current on the subsequent circuit and the load, the first output sampling unit is used for sampling and dividing the output voltage of the overvoltage surge circuit, providing a feedback signal, helping to adjust and stabilize the output voltage of the overvoltage surge circuit, ensuring that the output voltage is within the safety range, and the second output sampling unit is used for sampling and dividing the output voltage of the under-voltage surge circuit, providing a feedback signal, helping to adjust and stabilize the output voltage of the under-voltage surge circuit, ensuring that the output voltage is within the safety range.

2. A front end over / under voltage surge protection circuit as defined in claim 1, wherein: The overvoltage surge circuit comprises a high-voltage suppression chip U1, MOSFET power tube Q1, MOSFET power tube Q2, resistor R2, resistor R3, resistor R4, resistor R5, resistor R7, resistor R8, resistor R9, resistor R11, capacitor C2, capacitor C3, capacitor C4, capacitor C7, capacitor C8, capacitor C11, capacitor C12, capacitor C17, diode D1 and inductor L1, and the specific circuit connection is as follows: the input power signal end is connected with one end of capacitor C1, one end of resistor R4, 15-pin VIN of high-voltage suppression chip U1 and the drain of MOSFET power tube Q2; the other end of resistor R4 is connected with 17-pin RUN of high-voltage suppression chip U1; the gate of MOSFET power tube Q2 is connected with 9-pin TG of high-voltage suppression chip U1; the source of MOSFET power tube Q2 is connected with the drain of MOSFET power tube Q1, 10-pin SW of high-voltage suppression chip U1, one end of capacitor C6, one end of resistor R2 and one end of inductor L1; the source of MOSFET power tube Q1 is grounded; the other end of capacitor C6 is connected with 11-pin BOOST of high-voltage suppression chip U1 and the cathode of diode D1; the anode of diode D1 is connected with 14-pin DRVcc of high-voltage suppression chip U1; the other end of resistor R2 is connected with one end of resistor R3, one end of capacitor C5 and 1-pin SE+ of high-voltage suppression chip U1; the other end of inductor L1 is connected with the other end of resistor R3, the other end of capacitor C5, 2-pin SE- of high-voltage suppression chip U2, one end of capacitor C2, the first output sampling unit and the under-voltage surge circuit VBOOST; the other end of capacitor C2 is grounded; 14-pin DRVcc of high-voltage suppression chip U1 is connected with one end of capacitor C9; 18-pin DRUVU and 19-pin of high-voltage suppression chip U1 are connected with one end of capacitor C10 after being short-circuited; 7-pin FRE of high-voltage suppression chip U1 is connected with one end of resistor R8; the other end of capacitor C9, the other end of capacitor C10 and the other end of resistor R8 are grounded; 5-pin ITH of high-voltage suppression chip U1 is connected with resistor R9 and one end of capacitor C14; the other end of resistor R9 is connected with one end of capacitor C15; 3-pin SS of high-voltage suppression chip U1 is connected with one end of capacitor C16; 20-pin OVLO, 16-pin EXTVcc, 13-pin GND and 21-pin GND of high-voltage suppression chip U1 are grounded; the other end of capacitor C14, the other end of C15 and the other end of capacitor C16 are grounded; 6-pin TMR of high-voltage suppression chip U1 is connected with one end of capacitor C13; the other end of capacitor C13 is grounded; 8-pin WAR of high-voltage suppression chip U1 is connected with one end of resistor R11; the other end of resistor R11 is connected with 19-pin INTVcc of high-voltage suppression chip U1. The model of high-voltage suppression chip U1 is LTC7862.

3. A front end over / under voltage surge protection circuit as defined in claim 1 wherein: The first output sampling unit comprises a resistor R5 and a resistor R7, one end of the resistor R5 is connected with the other end of the inductor L1 of the overvoltage surge circuit and the VBOOST of the undervoltage surge circuit respectively, the other end of the resistor R5 is connected with one end of the resistor R7 and the 4th pin FB of the high voltage suppression chip U1 respectively, and the other end of the resistor R7 is grounded.

4. A front end over / under voltage surge protection circuit as defined in claim 1 wherein: The undervoltage surge circuit comprises a boost chip U2, MOSFET power tubes Q3 and Q4, resistors R1 and R6, resistors R10 and R12, capacitors C1, C5, C6, C9, C10, C13, C14, C15, C16, a diode D2 and an inductor L2, and the specific circuit connection is as follows: the input end VBOOST is connected with the output end of the overvoltage surge circuit, one end of the capacitor C3, the 19th pin VBIAS of the boost chip U2, one end of the resistor R1 and the 9th pin SENSE+ of the undervoltage surge circuit respectively, the other end of the capacitor C3 is grounded, the other end of the resistor R1 is connected with one end of the inductor L2 and the 8th pin SENSE- of the boost chip U2 respectively, the other end of the inductor L2 is connected with the drain of the MOSFET power tube Q4, the drain of the MOSFET power tube Q3, one end of the capacitor C12 and the 13th pin SW of the boost chip U2 respectively, the gate of the MOSFET power tube Q4 is connected with the 16th pin BG of the boost chip U2, the source of the MOSFET power tube Q4 is grounded, the gate of the MOSFET power tube Q3 is connected with the 14th pin TG of the boost chip U2, the source of the MOSFET power tube Q3 is connected with one end of the capacitor C4, the output signal end and the second output sampling unit respectively, the other end of the capacitor C4 is grounded, the other end of the capacitor C12 is connected with the 15th pin BOOST of the boost chip U2 and the cathode of the diode D2 respectively, the anode of the diode D2 is connected with the 2nd pin INTVcc of the boost chip U2 and one end of the capacitor C17 respectively, the other end of the capacitor C17 is grounded, the 10th pin VFB of the boost chip U2 is connected with the second output sampling unit, the 7th pin SS of the boost chip U2 is connected with one end of the capacitor C7, the other end of the capacitor C7 is connected with one end of the capacitor C8, one end of the capacitor C11, the 5th pin PLLIN / MODE of the boost chip U2, the 3rd pin FREQ of the boost chip U2 and the 12th pin OVMODE of the boost chip U2 in sequence and then grounded, and the 11th pin ITH of the boost chip U2 is connected with the other end of the resistor R6 and the other end of the capacitor C11 respectively. The model of the boost chip U2 is LTC3769.

5. A front end over / under voltage surge protection circuit as defined in claim 1 wherein: The second output sampling unit comprises the resistor R10 and the resistor R12, one end of the resistor R10 is connected with the source of the MOSFET power tube Q3 of the overvoltage surge circuit and the output signal end, the other end of the resistor R10 is connected with one end of the resistor R12 and the 10th pin VFB of the boost chip U2 respectively, the other end of the resistor R12 is grounded, and the 18th pin EXTVcc of the boost chip U2 is grounded.

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