Multifunctional control circuit for sound equipment

Abstract

The utility model relates to the technical field of audio equipment, and provides a multifunctional control circuit for sound equipment, which comprises an integrated processing circuit, a power supply circuit, an HDMI output circuit, an HDMI interface circuit, a display interface circuit and a 2.4 G communication interface circuit, the HDMI output circuit, the HDMI interface circuit, the display interface circuit and the 2.4 G communication interface circuit are connected with the integrated processing circuit, and the power supply circuit is connected with the integrated processing circuit through inductors FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9, FB10, FB11 and FB109. A P + 33V power supply output by a battery is converted into a 3V3VDD power supply, a VDD3V3AO power supply, a VDD33 power supply, a USBAVDD33 power supply, an ADCAVDD33 power supply, a VCC3HDMI power supply and an SPIVCC33 power supply, a 1V8VDD power supply output by the battery is converted into an MVDDQ18 power supply and an MVPLLVDD18 power supply, and a 0V9VDD power supply output by the battery is converted into a VDD09 power supply, a PLLAVDD09 power supply and an AVDD09TMDS power supply. According to the technical scheme, stable operation and high efficiency of the circuit are ensured, multifunctionality is achieved, and the requirements of sound equipment for high-definition audio and video output and wireless communication are met.

Description

Technical Field

[0001] This utility model relates to the field of audio equipment technology, specifically to a multi-functional control circuit for audio equipment. Background Technology

[0002] With the rapid development of technology and the continuous changes in consumer demand, audio equipment has evolved from a simple audio playback tool into a multifunctional entertainment center that integrates high-definition audio and video output, wireless communication, diverse interfaces, and intelligent control.

[0003] However, existing audio equipment still has some design and functional limitations. First, traditional audio circuits are often single-function, only meeting basic audio playback needs and failing to meet modern users' demands for high-definition audio and video output, wireless communication, and diverse interfaces. Second, inefficient power management leads to high power consumption and limited battery life. Furthermore, due to limitations in interface types, traditional audio equipment also suffers from shortcomings in connectivity and compatibility with other devices. Utility Model Content

[0004] To address the aforementioned problems, this utility model proposes a multi-functional control circuit for audio equipment, which solves the technical problem that existing audio equipment cannot meet diverse needs.

[0005] The technical solution of this utility model is as follows:

[0006] A multi-functional control circuit for audio equipment includes an integrated processing circuit, an HDMI output circuit, an HDMI interface circuit, a display interface circuit, a 2.4G communication interface circuit, and a power supply circuit. The HDMI output circuit, HDMI interface circuit, display interface circuit, and 2.4G communication interface circuit are all linked to the integrated processing circuit.

[0007] The power supply circuit includes inductors FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9, FB10, FB11, and FB109. Inductors FB1, FB9, FB2, FB5, FB11, FB109, and FB10 are respectively used to convert the battery output P+3_3V power into 3V3_VDD power, VDD3V3_AO power, VDD33 power, and USB_AVDD33 power. The system includes ADC_AVDD33 power supply, VCC3_HDMI power supply, and SPI_VCC33 power supply. Inductors FB3 and FB6 are used to convert the 1V8_VDD power supply output from the battery into M_VDDQ18 power supply and M_VPLL_VDD18 power supply, respectively. Inductors FB4, FB7, and FB8 are used to convert the 0V9_VDD power supply output from the battery into VDD09 power supply, PLL_AVDD09 power supply, and AVDD09_TMDS power supply, respectively.

[0008] Furthermore, the integrated processing circuit includes a processor U2 and peripheral circuits connected thereto. The peripheral circuits include a first communication branch, a second communication branch, a storage branch, a reference voltage branch, and a clock branch.

[0009] Furthermore, the HDMI output circuit includes interface J7, diode chip U8, diode chip U428, diode chip U429, power chip U11, MOSFET Q11, and MOSFET Q12. Power chip U11 converts the P+5V power output from the battery into TXA5V power to power interface J7. Pin 8 of processor U2 is connected to the drain of MOSFET Q11, and the gate of MOSFET Q11 is connected to the VCC3_HDMI power supply. Pin 9 of processor U2 is connected to the drain of MOSFET Q12, and the gate of MOSFET Q12 is connected to the VCC3_HDMI power supply. The sources of MOSFET Q11 and Q12 are connected to the two input terminals of inductor L7 via resistors R55 and R56, respectively. The two output terminals of inductor L7 are connected to pins 15 and 16 of interface J7 via diode chip U429. Pin 60 of processor U2 is connected to pin 13 of interface J7 via resistors R700 and R711.

[0010] Pins 49 and 48 of processor U2 are connected to the two input terminals of diode chip U8 via inductor L4, and their corresponding output terminals are connected to pins 1 and 3 of interface J7, respectively. Pins 47 and 46 of processor U2 are connected to the two input terminals of diode chip U8 via inductor L3, and their corresponding output terminals are connected to pins 4 and 6 of interface J7, respectively. Pins 45 and 44 of processor U2 are connected to the two input terminals of diode chip U428 via inductor L5, and their corresponding output terminals are connected to pins 7 and 9 of interface J7, respectively. Pins 42 and 41 of processor U2 are connected to the two input terminals of diode chip U428 via inductor L6, and their corresponding output terminals are connected to pins 10 and 12 of interface J7, respectively. Pins 38 and 39 of processor U2 are connected to the two input terminals of inductor L427 via capacitors C672 and C673, respectively. The two output terminals of inductor L427 are connected to pins 19 and 14 of interface J7 via diode chip U429.

[0011] Furthermore, the display interface circuit includes an interface J28, resistors R690, R691, R692, R688, and R689. Pins 3, 4, 5, 6, and 7 of the interface J28 are connected to pins 65, 36, 34, and 66 of the processor U2 via resistors R690, R691, R692, R688, and R689, respectively.

[0012] Furthermore, the HDMI interface circuit includes interface JR3, resistors R650, R651, R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663, and R664, and pins 2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 18, 19, and 160 of interface JR3. Pin 20 is connected to pins 25, 24, 23, 22, 21, 20, 19, 62, 60, 17, 18, 87, 75, and 59 of processor U2 via resistors R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663, R664, R651, and R650, respectively.

[0013] Furthermore, the 2.4G communication interface circuit includes interface J2, resistors R703, R704, R705, R706, R707, R708, R709, and R710. Pins 2, 3, 4, 5, 7, 8, 9, and 10 of interface J2 are connected to pins 88, 89, 95, 96, 127, 1, 125, and 123 of processor U2 via resistors R703, R704, R705, R706, R707, R708, R709, and R710, respectively. Pin 11 of interface J2 is connected to pin 124 of processor U2.

[0014] The working principle and beneficial effects of this utility model are as follows:

[0015] In this invention, the power supply circuit consists of multiple inductors. These inductors convert different voltages output from the battery into various power supply voltages required by the circuit, effectively filtering out high-frequency noise in the power supply and maintaining voltage stability, thus ensuring stable operation and high efficiency of the circuit. Simultaneously, through HDMI output circuits, display interface circuits, and 2.4G communication circuits, multifunctionality is achieved, meeting the needs of audio equipment for high-definition audio and video output and wireless communication.

[0016] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0017] Figure 1 This is a circuit diagram of the power supply circuit in this utility model;

[0018] Figure 2 This is a circuit diagram of the integrated processing circuit in this utility model;

[0019] Figure 3 This is a circuit diagram of the HDMI output circuit in this utility model;

[0020] Figure 4 This is a circuit diagram of the display interface circuit in this utility model;

[0021] Figure 5 This is a circuit diagram of the HDMI interface circuit in this utility model;

[0022] Figure 6 This is a circuit diagram of the 2.4G communication interface circuit in this utility model. Detailed Implementation

[0023] The technical solutions of this utility model will be clearly and completely described below with reference to the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this utility model.

[0024] Example 1

[0025] This embodiment proposes a multi-functional control circuit for audio equipment, including an integrated processing circuit, an HDMI output circuit, an HDMI interface circuit, a display interface circuit, a 2.4G communication interface circuit, and a power supply circuit. The HDMI output circuit, HDMI interface circuit, display interface circuit, and 2.4G communication interface circuit are linked to the integrated processing circuit.

[0026] like Figure 1 As shown, the power supply circuit includes inductors FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9, FB10, FB11, and FB109. Inductors FB1, FB9, FB2, FB5, FB11, FB109, and FB10 are used to convert the battery output P+3_3V power into 3V3_VDD power, VDD3V3_AO power, VDD33 power, and USB_AVDD33 power, respectively. The circuit includes power supplies for ADC_AVDD33, VCC3_HDMI, and SPI_VCC33. Inductors FB3 and FB6 convert the 1V8_VDD power output from the battery into M_VDDQ18 and M_VPLL_VDD18 power supplies, respectively. Inductors FB4, FB7, and FB8 convert the 0V9_VDD power output from the battery into VDD09, PLL_AVDD09, and AVDD09_TMDS power supplies, respectively. The VCC3_HDMI power supply powers the HDMI output circuit, while the other power supplies power the integrated processing circuit. The 3V3_VDD power supply serves as the pull-up resistor power supply for the interface of the processor U2 section in the integrated processing circuit.

[0027] In this embodiment, the integrated processing circuit acts as the control center, processing various signals and data. The HDMI output circuit outputs High Definition Multimedia Interface (HDMI) signals. The HDMI interface circuit provides the interface for HDMI signals. The display interface circuit connects to and drives the display screen. The 2.4G communication circuit is used for wireless data transmission, such as Wi-Fi or Bluetooth. The power supply circuit provides the necessary voltage and current for the entire circuit.

[0028] The power supply circuit consists of multiple inductors (FB1 to FB11, and FB109). These inductors convert different voltages output from the battery into various power supply voltages required by the circuit. They effectively filter out high-frequency noise in the power supply and maintain voltage stability, ensuring stable operation and high efficiency of the circuit. Simultaneously, through HDMI output circuitry, display interface circuitry, and 2.4G communication circuitry, multifunctionality is achieved, meeting the needs of audio equipment for high-definition audio and video output and wireless communication.

[0029] like Figure 2 As shown, the integrated processing circuit includes a processor U2 and peripheral circuits connected to it. The peripheral circuits include a first communication branch, a second communication branch, a storage branch, a reference voltage branch, and a clock branch.

[0030] The first communication branch includes interface J1, Zener diodes Z38 and Z39, and resistors R136, R137, R139, and R139. The input terminal of interface J1 is connected to pin 99 of processor U2 (i.e., the first transmitting terminal) through resistor R138, and the output terminal of interface J1 is connected to pin 100 of processor U2 (i.e., the first receiving terminal) through resistor R139. Zener diode Z38 is connected in series between the input terminal of interface J1 and ground, and Zener diode Z39 is connected in series between the output terminal of interface J1 and ground. Resistors R136 and R137 are used as pull-up resistors connected to the 3V3_VDD power supply.

[0031] The second communication command includes Zener diodes Z40 and Z41, and resistors R282, R283, R284, and R285. The first end of resistor R284 is used to connect to an external receiver (in this embodiment, it serves as the receiver for battery management). The second end of resistor R284 is connected to pin 15 of processor U2 (i.e., the second transmitter). The first end of resistor R285 is used to connect to an external transmitter (in this embodiment, it serves as the transmitter for battery management). The second end of resistor R285 is connected to pin 16 of processor U2 (i.e., the second receiver). Zener diode Z40 is connected in series between the first end of resistor R285 and ground. Zener diode Z41 is connected in series between the first end of resistor R284 and ground. Resistors R282 and R283 are used as pull-up resistors connected to the 3V3_VDD power supply.

[0032] The storage branch includes storage chip U3. Pins 1, 2, 3, 5, and 7 of storage chip U3 are directly connected to pins 82, 80, 78, 77, and 81 of processor U2. Pin 6 of storage chip U3 is connected to pin 79 of processor U2 through resistor R36. Pin 6 of storage chip U3 is also grounded through capacitor C60. Pins 1, 3, and 7 of storage chip U3 are also connected to the SPI_VCC33 power supply through pull-up resistors R31, R32, and R33.

[0033] like Figure 3 As shown, the HDMI output circuit includes interface J7, diode chip U8, diode chip U428, diode chip U429, power chip U11, MOSFET Q11, and MOSFET Q12. Power chip U11 converts the P+5V power output from the battery into TXA5V power to power interface J7. Pin 8 of processor U2 is connected to the drain of MOSFET Q11, and the gate of MOSFET Q11 is connected to the VCC3_HDMI power supply. Pin 9 of processor U2 is connected to the drain of MOSFET Q12, and the gate of MOSFET Q12 is connected to the VCC3_HDMI power supply. The sources of MOSFETs Q11 and Q12 are connected to the two input terminals of inductor L7 via resistors R55 and R56, respectively. The two output terminals of inductor L7 are connected to pins 15 and 16 of interface J7 via diode chip U429. Pin 60 of processor U2 is connected to pin 13 of interface J7 via resistors R700 and R711.

[0034] Pins 49 and 48 of processor U2 are connected to the two inputs of diode chip U8 via inductor L4, and their corresponding outputs are connected to pins 1 and 3 of interface J7, respectively. Pins 47 and 46 of processor U2 are connected to the two inputs of diode chip U8 via inductor L3, and their corresponding outputs are connected to pins 4 and 6 of interface J7, respectively. Pins 45 and 44 of processor U2 are connected to the two inputs of diode chip U428 via inductor L5, and their corresponding outputs are connected to pins 7 and 9 of interface J7, respectively. Pins 42 and 41 of processor U2 are connected to the two inputs of diode chip U428 via inductor L6, and their corresponding outputs are connected to pins 10 and 12 of interface J7, respectively. Pins 38 and 39 of processor U2 are connected to the two inputs of inductor L427 via capacitors C672 and C673, respectively. The two outputs of inductor L427 are connected to pins 19 and 14 of interface J7 via diode chip U429.

[0035] In this embodiment, the HDMI output circuit primarily transmits HDMI signals. Power chip U11 converts the +5V battery output to TXA5V, which powers interface J7. Processor U2 plays a central role in the circuit. Multiple pins are connected to MOSFETs, inductors, and diodes to control HDMI signal transmission. Pins 8 and 9 of processor U2 are connected to the drains of MOSFETs Q11 and Q12, respectively, while their sources are connected to the two input terminals of inductor L7 via resistors R55 and R56. The output of inductor L7 is connected to pins 15 and 16 of interface J7 via diode chip U429 to transmit HDMI hot-plug detection (HPD) signals or other specific signals. Pin 60 of processor U2 is connected to pin 13 of interface J7 via resistors R700 and R711 to transmit certain control or status signals. Pins 49 and 48 (and pins 47 and 46) of processor U2 are connected to the input of diode chip U8 via inductors L4 (and L3), and their outputs are connected to the corresponding pins of interface J7 (pins 1 and 3, and pins 4 and 6). These paths are used to transmit HDMI differential signal pairs, such as TMDS data channels. Pins 45 and 44 (and pins 42 and 41) of processor U2 are connected to the input of diode chip U428 via inductors L5 (and L6), and their outputs are connected to other pins of interface J7 (pins 7 and 9, and pins 10 and 12), also for transmitting HDMI differential signal pairs. Pins 38 and 39 of processor U2 are connected to the input of inductor L427 via capacitors C672 and C673, and their outputs are connected to pins 19 and 14 of interface J7 via diode chip U429. These paths are used to transmit additional HDMI signals, such as clock signals or backup channels. Diode chips U8, U428, and U429 act as protective components in the circuit, preventing reverse current flow and protecting the circuit from damage.

[0036] like Figure 4 As shown, the display interface circuit includes interface J28, resistors R690, R691, R692, R688 and R689. Pins 3, 4, 5, 6 and 7 of interface J28 are connected to pins 65, 36, 34 and 66 of processor U2 through resistors R690, R691, R692, R688 and R689, respectively.

[0037] In this embodiment, the display interface circuit mainly consists of interface J28 and a series of resistors R690 to R692, R688, and R689. These resistors connect different pins (pins 3 to 7) of interface J28 to specific pins (pins 65, 36, 35, 34, and 66) of processor U2 to achieve signal transmission. To ensure signal stability, the connection point between interface J28 and processor U2 is also connected to a 3V3_VDD power supply through pull-up resistors R675, R676, R677, R678, and R679 to provide the necessary high-level function.

[0038] like Figure 5 As shown, the HDMI interface circuit includes interface JR3, resistors R650, R651, R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663, and R664. Pins 2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 18, 19, and 2 of interface JR3 are also shown. Pin 0 is connected to pins 25, 24, 23, 22, 21, 20, 19, 62, 60, 17, 18, 87, 75, and 59 of processor U2 via resistors R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663, R664, R651, and R650, respectively.

[0039] In this embodiment, multiple pins of JR3 (pins 2 to 8, 10 to 13, and 18 to 20) are connected to different pins of processor U2 for the transmission of high-definition audio and video signals. Similarly, for stable signal transmission, pins 75, 87, 18, and 17 of processor U2 are also connected to a 3V3_VDD power supply via pull-up resistors at the connection points between interface JR3 and processor U2, providing the necessary high-level functionality.

[0040] like Figure 6As shown, the 2.4G communication interface circuit includes interface J2, resistors R703, R704, R705, R706, R707, R708, R709 and R710. Pins 2, 3, 4, 5, 7, 8, 9 and 10 of interface J2 are connected to pins 88, 89, 95, 96, 127, 1, 125 and 123 of processor U2 through resistors R703, R704, R705, R706, R707, R708, R709 and R710, respectively. Pin 11 of interface J2 is connected to pin 124 of processor U2.

[0041] In this embodiment, the 2.4G communication interface circuit consists of interface J2 and resistors R703 to R710. These resistors connect different pins of J2 (pins 2 to 5, pins 7 to 10) to the relevant pins of processor U2 (pins 88, 89, 95, 96, 127, 1, 125, and 123), supporting wireless communication functionality. Similarly, for stable signal transmission, at the connection point between interface J2 and processor U2, pins 88, 95, and 96 of processor U2 are also connected to a 3V3_VDD power supply via pull-up resistors, providing the necessary high-level functionality.

[0042] The above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A multi-functional control circuit for audio equipment, characterized by comprising: The integrated processing circuit, the HDMI output circuit, the HDMI interface circuit, the display interface circuit, the 2.4G communication interface circuit and the power supply circuit are connected with the integrated processing circuit, The power supply circuit comprises inductances FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9, FB10, FB11 and FB109, the inductances FB1, FB9, FB2, FB5, FB11, FB109 and FB10 are respectively used for converting the P+3_3V power supply output by the battery into 3V3_VDD power supply, VDD3V3_AO power supply, VDD33 power supply, USB_AVDD33 power supply, ADC_AVDD33 power supply, VCC3_HDMI power supply and SPI_VCC33 power supply, the inductances FB3 and FB6 are respectively used for converting the 1V8_VDD power supply output by the battery into M_VDDQ18 power supply and M_VPLL_VDD18 power supply, and the inductances FB4, FB7 and FB8 are respectively used for converting the 0V9_VDD power supply output by the battery into VDD09 power supply, PLL_AVDD09 power supply and AVDD09_TMDS power supply.

2. The multi-functional control circuit for audio according to claim 1, wherein The integrated processing circuit comprises a processor U2 and peripheral circuits connected with the processor U2, and the peripheral circuits comprise a first communication branch, a second communication branch, a storage branch, a reference voltage branch and a clock branch.

3. The multi-functional control circuit for audio according to claim 2, wherein The HDMI output circuit comprises an interface J7, diode chips U8, U428, U429, a power supply chip U11, MOS tubes Q11 and Q12, the power supply chip U11 is used for converting the P+5V power supply output by the battery into TXA5V power supply to supply power to the interface J7, the 8th pin of the processor U2 is connected with the drain of the MOS tube Q11, the gate of the MOS tube Q11 is connected with the VCC3_HDMI power supply, the 9th pin of the processor U2 is connected with the drain of the MOS tube Q12, the gate of the MOS tube Q12 is connected with the VCC3_HDMI power supply, the source of the MOS tube Q11 and the source of the MOS tube Q12 are respectively connected with two input ends of an inductor L7 through resistors R55 and R56, two output ends of the inductor L7 are connected with the 15th pin and the 16th pin of the interface J7 through the diode chip U429, the 60th pin of the processor U2 is connected with the 13th pin of the interface J7 through resistors R700 and R711, The 49th pin and the 48th pin of the processor U2 are connected with two input ends of the diode chip U8 through the inductor L4, and the corresponding output ends are connected with the 1st pin and the 3rd pin of the interface J7 respectively, the 47th pin and the 46th pin of the processor U2 are connected with two input ends of the diode chip U8 through the inductor L3, and the corresponding output ends are connected with the 4th pin and the 6th pin of the interface J7 respectively, the 45th pin and the 44th pin of the processor U2 are connected with two input ends of the diode chip U428 through the inductor L5, and the corresponding output ends are connected with the 7th pin and the 9th pin of the interface J7 respectively, the 42nd pin and the 41st pin of the processor U2 are connected with two input ends of the diode chip U428 through the inductor L6, and the corresponding output ends are connected with the 10th pin and the 12th pin of the interface J7 respectively, the 38th pin and the 39th pin of the processor U2 are connected with two input ends of the inductor L427 through the capacitor C672 and the capacitor C673 respectively, and two output ends of the inductor L427 are connected with the 19th pin and the 14th pin of the interface J7 through the diode chip U429.

4. The multi-functional control circuit for audio according to claim 2, wherein The display interface circuit comprises the interface J28, the resistors R690, R691, R692, R688 and R689, the 3rd pin, the 4th pin, the 5th pin, the 6th pin and the 7th pin of the interface J28 are connected with the 65th pin, the 36th pin, the 35th pin, the 34th pin and the 66th pin of the processor U2 through the resistors R690, R691, R692, R688 and R689 respectively.

5. The multi-functional control circuit for audio according to claim 2, wherein The HDMI interface circuit comprises the interface JR3, the resistors R650, R651, R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663 and R664, the 2nd pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 10th pin, the 11th pin, the 12th pin, the 13th pin, the 18th pin, the 19th pin and the 20th pin of the interface JR3 are connected with the 25th pin, the 24th pin, the 23rd pin, the 22nd pin, the 21st pin, the 20th pin, the 19th pin, the 62nd pin, the 60th pin, the 17th pin, the 18th pin, the 87th pin, the 75th pin and the 59th pin of the processor U2 through the resistors R653, R654, R655, R656, R657, R658, R659, R660, R661, R662, R663, R664, R651 and R650 respectively.

6. The multi-functional control circuit for audio according to claim 2, wherein The 2.4G communication interface circuit includes interface J2, resistors R703, R704, R705, R706, R707, R708, R709 and R710, the 2nd pin, the 3rd pin, the 4th pin, the 5th pin, the 7th pin, the 8th pin, the 9th pin and the 10th pin of the interface J2 are connected to the 88th pin, the 89th pin, the 95th pin, the 96th pin, the 127th pin, the 1st pin, the 125th pin and the 123rd pin of the processor U2 through the resistors R703, R704, R705, R706, R707, R708, R709 and R710 respectively, and the 11th pin of the interface J2 is connected to the 124th pin of the processor U2.

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