Semiconductor photonic device

Abstract

The utility model provides a semiconductor photon device, comprising an optical waveguide structure having an overlook size and / or shape, so that a closed loop optical waveguide structure can realize specific optical signal loss. The optical waveguide structure may be fabricated to have a polygonal planar view shape, wherein the optical waveguide structure includes a plurality of segments. The optical waveguide structure may be fabricated with a particular radius, with a particular number of segments, and / or with another property to achieve a particular optical signal loss for the optical waveguide structure. This enables the quality factor of the optical waveguide structure to be balanced with the power coupling coefficient of the optical waveguide structure. This enables critical coupling (or near-critical coupling) of the optical waveguide structure.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to a semiconductor photonic device. BACKGROUND

[0002] A semiconductor photonic device can be configured to use optical signals for high-speed and secure data transmission between integrated circuits and / or semiconductor dies of the semiconductor photonic device. The optical signals can be transmitted through waveguides in the semiconductor photonic device. The waveguides can confine the optical signals, which can reduce optical loss and increase the propagation efficiency of the optical signals. Data can be encoded into the optical signals by modulating light into optical pulses using optical modulators. The optical pulses are then transmitted to the waveguides for propagation to other areas of the semiconductor photonic device. SUMMARY

[0003] A semiconductor photonic device includes a first optical waveguide structure and a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure including a polygonal top view shape having a plurality of segments.

[0004] A semiconductor photonic device includes a first optical waveguide structure and a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure including a polygonal top view shape having a plurality of segments. BRIEF DESCRIPTION OF DRAWINGS

[0005] The present disclosure will be best understood by reading the following detailed description together with the accompanying drawings, in which:

[0006] FIG. 1A FIG. 1 is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments. FIG. 1B

[0007] FIG. 2A to FIG. 2C FIG. 2 is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments.

[0008] FIG. 3A to FIG. 3C FIG. 3 is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments.

[0009] FIG. 4A to FIG. 4C FIG. 4 is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments.

[0010] FIG. 5A to FIG. 5D FIG. 5 is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments.

[0011] ​FIG. 6A and FIG. 6B is a schematic diagram of an example implementation of a semiconductor photonic device according to some embodiments.

[0012] FIG. 7A to FIG. 7F is a schematic diagram of an example implementation of forming a semiconductor photonic device (or a portion thereof) according to some embodiments.

[0013] FIG. 8A to FIG. 8E is a schematic diagram of an example implementation of forming a semiconductor photonic device (or a portion thereof) according to some embodiments.

[0014] FIG. 9A to FIG. 9E is a schematic diagram of an example implementation of forming a semiconductor photonic device (or a portion thereof) according to some embodiments.

[0015] FIG. 10A to FIG. 10C is an example schematic diagram of a cross-sectional profile of one or more waveguide structures according to some embodiments.

[0016] FIG. 11 is a flowchart of an example process related to forming a semiconductor photonic device according to some embodiments. DETAILED DESCRIPTION

[0017] The present disclosure provides numerous different embodiments or examples for implementing different features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the making of first feature on top of or on a second feature in the following description can include embodiments in which the first feature is formed in direct contact with the second feature, and can also include embodiments in which additional features can be formed between the first and second features such that the first and second features can not be in direct contact. Furthermore, the present disclosure can refer back to numbers and / or letters in various examples. Such repetition is for the sake of simplicity and clarity and does not itself indicate a relationship between the various embodiments and / or configurations discussed.

[0018] Furthermore, spatially relative terms, such as "beneath", "below", "lower", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0019] In some cases, a photonic integrated circuit of a semiconductor photonic device can include one or more waveguide structures. For example, a generally straight input / output waveguide structure (which can be referred to as a bus optical waveguide) can couple an optical signal to a ring waveguide structure, which can be used to filter (e.g., wavelength filter) or modulate the optical signal. In some cases, optical signal loss can occur when the optical signal propagates in the ring waveguide structure, and when the optical signal is coupled to and / or from the ring waveguide structure. The optical signal loss in the ring waveguide structure (intrinsic loss) can affect the Q factor of the ring waveguide structure. The optical signal loss due to coupling (external coupling loss) can also affect the power coupling coefficient (κ value) of the ring waveguide structure. The power coupling coefficient is an indicator of the efficiency of the optical signal coupling between the ring waveguide structure and the bus optical waveguide. If the external coupling loss (which reduces the power coupling coefficient) and the intrinsic loss (which reduces the Q factor) are not controlled, the ring waveguide structure can not function effectively and / or can not filter effectively with high selectivity.

[0020] For example, when the external coupling loss is greater than the intrinsic loss, the ring waveguide structure and associated input / output waveguide structure can become under-coupled, resulting in insufficient optical power transfer from the input / output waveguide structure to the ring waveguide structure for modulation and / or filtering. Conversely, when the intrinsic loss is greater than the external coupling loss, the ring waveguide structure and associated input / output waveguide structure can become over-coupled, resulting in interference in the ring waveguide structure (which can cause nonlinear effects and / or other modulation imperfections) and excessive power consumption in the ring waveguide structure.

[0021] Some embodiments of the present disclosure provide techniques and apparatuses for a semiconductor photonic device that includes a closed-loop optical waveguide structure having an overhead size and / or shape configured to achieve a particular optical signal loss (intrinsic loss) for the closed-loop optical waveguide structure. The closed-loop optical waveguide structure can be fabricated to have a polygonal overhead shape (e.g., a generally octagonal overhead shape or a generally hexagonal overhead shape, etc.), where the closed-loop optical waveguide structure includes a plurality of segments. The closed-loop optical waveguide structure can be fabricated to have a particular radius, to have a particular number of segments, and / or to have another property to achieve the particular optical signal loss for the closed-loop optical waveguide structure.

[0022] The closed-loop optical waveguide structure is fabricated to have a certain optical signal loss, such that the quality factor of the closed-loop optical waveguide structure can be balanced with the power coupling coefficient of the closed-loop optical waveguide structure. This enables the closed-loop optical waveguide structure to reach critical coupling (or reach near critical coupling), which is a condition that the out-coupling loss of the closed-loop optical waveguide structure is approximately equal to the optical signal loss of the closed-loop optical waveguide structure. At critical coupling or near critical coupling, the closed-loop optical waveguide structure can achieve efficient operation (e.g., modulation or filtering with minimal modulation imperfections and reduced power consumption) and high selectivity of optical filtering, as compared to over-coupling or under-coupling.

[0023] FIG. 1A and FIG. 1B are schematic diagrams of embodiments of the semiconductor photonic device 100 described herein. The semiconductor photonic device 100 includes one or more photonic integrated circuits. FIG. 1A and 1B respectively show top view embodiments of the semiconductor photonic device 100. The semiconductor photonic device 100 can be configured to use optical signals for high-speed and secure data transmission between integrated circuits and / or semiconductor dies of the semiconductor photonic device 100. Thus, the semiconductor photonic device 100 can include a closed-loop optical waveguide structure 102 and a bus optical waveguide structure 104. Optical signals can be transmitted through the bus optical waveguide structure 104 in the semiconductor photonic device 100. The bus optical waveguide structure 104 can confine the optical signals, which can reduce optical loss and improve the propagation efficiency of the optical signals. Data can be encoded into the optical signals by modulating light into optical pulses in the closed-loop optical waveguide structure 102. The optical pulses are then transmitted to the bus optical waveguide structure 104 for propagation to other areas of the semiconductor photonic device 100. Alternatively, specific wavelengths of the optical signals can be filtered out in the closed-loop optical waveguide structure 102, such that the filtered-out wavelengths (or unfiltered-out wavelengths) are transmitted back to the bus optical waveguide structure 104 for signal propagation.

[0024] The closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be adjacent and / or side-by-side in the semiconductor photonic device 100 to enable coupling of optical signals from the closed-loop optical waveguide structure 102 to the bus optical waveguide structure 104 (and vice versa for demodulating the optical signals). For example, as shown in FIG. 1A and FIG. 1B the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be horizontally adjacent (or laterally adjacent) in the x-direction in the semiconductor photonic device 100. The bus optical waveguide structure 104 extends along one side of the closed-loop optical waveguide structure 102 in the y-direction.

[0025] The closed-loop optical waveguide structure 102 is "closed-loop" in that the structure of the closed-loop optical waveguide structure 102 is a continuous waveguide structure that connects to itself and has no endpoints. This is different from other types of modulators and resonators, such as a Mach-Zehnder modulator (MZM), which has endpoints corresponding to inputs and outputs. Instead of coupling into and out of the MZM by propagating in the inputs and outputs of the MZM, optical signals are coupled into and out of the closed-loop optical waveguide structure 102 by evanescent coupling. Evanescent coupling occurs from the bus optical waveguide structure 104 to the closed-loop optical waveguide structure 102 when the evanescent field of the optical signal propagating through the bus optical waveguide structure 104 extends into the portion of the closed-loop optical waveguide structure 102 adjacent to the bus optical waveguide structure 104. Similarly, evanescent coupling occurs from the closed-loop optical waveguide structure 102 to the bus optical waveguide structure 104 when the evanescent field of the optical signal propagating through the closed-loop optical waveguide structure 102 extends into the portion of the bus optical waveguide structure 104.

[0026] Optical signal loss occurs when an optical signal propagates in the closed-loop optical waveguide structure 102. The optical signal loss in the closed-loop optical waveguide structure 102 (internal loss) can affect the quality factor of the closed-loop optical waveguide structure 102. In some cases, the quality factor can be expressed as a ratio λ cen  /  λ FWHM , where λ cen  is the center wavelength of the optical signal propagating in the closed-loop optical waveguide structure 102, and λ FWHM is the full width at half maximum of the optical signal. The full width at half maximum is a function of the internal loss, corresponding to the bandwidth of the optical signal in the closed-loop optical waveguide structure 102 with a transmission rate (e.g., loss) less than -3 decibels (dB).

[0027] Optical signal loss also occurs when an optical signal is coupled between the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104. The optical signal loss resulting from the coupling (external coupling loss) affects the power coupling coefficient (κ value) of the closed-loop optical waveguide structure 102. The power coupling coefficient is an indicator of the efficiency of the optical signal coupling between the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104. In some cases, the power coupling coefficient can be expressed as κ = 1 - exp(-2πRα), where R is the radius 110 of the closed-loop optical waveguide structure 102, and α represents the external coupling loss in decibels per centimeter (dB / cm).

[0028] If external coupling loss α (which reduces the power coupling coefficient) and internal loss (which affects λ) are not controlled... FWHM This can reduce the quality factor, potentially causing the closed-loop waveguide structure 102 to operate ineffectively and / or fail to filter effectively with high selectivity. For example, when external coupling loss exceeds internal loss, the closed-loop waveguide structure 102 and its associated bus waveguide structure 104 may become undercoupled, resulting in insufficient optical power transmission from the bus waveguide structure 104 to the closed-loop waveguide structure 102, making modulation and / or filtering impossible. Conversely, when internal loss exceeds external coupling loss, the closed-loop waveguide structure 102 and its associated bus waveguide structure 104 may become overcoupled, leading to interference in the closed-loop waveguide structure 102 (which may cause nonlinear effects and / or other modulation defects) and excessive power consumption in the closed-loop waveguide structure 102.

[0029] In closed-loop optical waveguide structures, bending loss is one of the major contributors to internal loss. Bending loss refers to the optical loss that occurs due to the closed-loop shape of the waveguide structure. Specifically, when an optical signal encounters a bend in the closed-loop waveguide structure, some of the signal is absorbed as it interacts with the sidewalls of the bend, resulting in optical loss. Bending loss is generally inversely proportional to the radius of the closed-loop waveguide structure. A smaller radius results in greater bending loss (because the radius of curvature in the bend is smaller), and a larger radius results in less bending loss. However, the resonant frequency of the closed-loop waveguide structure also depends on the radius. Therefore, it may be impossible to fabricate a closed-loop waveguide structure with a specific radius to achieve a specific internal loss, as different radii may be needed to modulate and / or filter out specific wavelengths of the optical signal to be processed by the closed-loop waveguide structure. Consequently, it may be impossible to achieve critical coupling for the closed-loop waveguide structure.

[0030] like FIG. 1A and FIG. 1B As shown, the closed-loop optical waveguide structure 102 includes a polygonal top view shape having a plurality of segments 106 coupled at intersection 108. Adjacent segments 106 are coupled at adjacent ends of adjacent segments 106 at intersection 108. Therefore, each segment 106 is adjacent to two other segments 106 at opposite ends of the segment 106. FIG. 1A In the example, intersection 108 is the part of the closed-loop optical waveguide structure 102 closest to the busbar optical waveguide structure 104. FIG. 1B In the example, segment 106 and the intersection 108 at the opposite ends of segment 106 are closest to the busbar waveguide structure 104.

[0031] The segments 106 of the closed-loop optical waveguide structure 102 introduce another type of loss, referred to as segment loss or segment-induced loss, which contributes to the internal loss of the closed-loop optical waveguide structure 102. While the radius of the closed-loop optical waveguide structure 102 can not be selected to tune the internal loss of the closed-loop optical waveguide structure 102 (e.g., because the radius can be based on achieving a particular resonant frequency of the closed-loop optical waveguide structure 102), the size, shape, and / or number of the segments 106 enable a particular segment-induced loss of the closed-loop optical waveguide structure 102 to be achieved. Thus, the segment-induced loss enables the internal loss of the closed-loop optical waveguide structure 102 to be tuned without adjusting the radius of the closed-loop optical waveguide structure 102, which enables a particular optical signal loss (internal loss) of the closed-loop optical waveguide structure 102 to be achieved to achieve critical coupling.

[0032] FIG. 1A and FIG. 1B Some examples of polygonal top views of the closed-loop optical waveguide structure 102 are shown. The closed-loop optical waveguide structure 102 can be fabricated to have a polygonal top view. For example, the closed-loop optical waveguide structure 102 can have an approximately hexagonal top view as shown in FIG. 1A , having six (6) interconnected segments 106. As another example, the closed-loop optical waveguide structure 102 can have an approximately dodecagonal top view as shown in FIG. 1B , having twelve (12) interconnected segments 106. However, other numbers of segments 106 are within the scope of the present disclosure. In particular, the closed-loop optical waveguide structure 102 can be fabricated to have a particular radius 110, to have a particular number of segments 106, to have a particular width 112 of each segment 106, to have a particular length 114 of each segment 106, to have a particular angle 116 between adjacent segments 106, and / or to have another property such that the closed-loop optical waveguide structure 102 achieves a particular optical signal loss. In some implementations, the number of segments 106, the length 114 of each segment 106, the angle 116 between adjacent segments 106, and / or another parameter of the closed-loop optical waveguide structure 102 can be selected to achieve a particular radius 110 of the closed-loop optical waveguide structure 102. In some implementations, the length 114 of each segment 106 and / or the angle 116 between adjacent segments 106 is based on the number of segments 106 included in the closed-loop optical waveguide structure 102.

[0033] Further, in FIG. 1A and FIG. 1BIn the illustrated embodiment, the width 112 of each segment 106 is substantially equal, the length 114 of each segment 106 is substantially equal, and the angle 116 between adjacent segments 106 is substantially equal. In other embodiments illustrated and described herein, the width 112 of two or more segments 106 of the closed-loop optical waveguide structure 102 is of different widths, the length 114 of two or more segments 106 of the closed-loop optical waveguide structure 102 is of different lengths, and / or the angle 116 between two or more segments 106 of the closed-loop optical waveguide structure 102 is of different angles.

[0034] Segment-induced loss occurs at the intersection 108 between segments 106 when an optical signal is transferred between segments 106 of the closed-loop optical waveguide structure 102. In particular, the change in direction of propagation that occurs at the intersection 108 between adjacent segments 106 results in segment-induced loss in the optical signal. As the number of segments 106 decreases, the segment-induced loss increases. In other words, for the same radius 110, a smaller number of segments 106 results in greater segment-induced loss than a larger number of segments 106, because the angle 116 between adjacent segments 106 is smaller for a smaller number of segments 106 (resulting in a more drastic change in direction of the optical signal in the closed-loop optical waveguide structure 102). Thus, for a given radius 110, FIG. 1A a closed-loop optical waveguide structure 102 having a hexagonal top view shape has greater segment-induced loss than FIG. 1B a closed-loop optical waveguide structure 102 having a dodecagonal top view shape. Thus, when the external coupling loss between the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 is large, a closed-loop optical waveguide structure 102 having a FIG. 7A to FIG. 7F polygonal top view shape as illustrated can be fabricated, or when the external coupling loss is small, a closed-loop optical waveguide structure 102 having a FIG. 8A to FIG. 8E polygonal top view shape as illustrated can be fabricated.

[0035] In some embodiments, a closed-loop optical waveguide structure 102 having a fixed number of segments 106 can have greater segment-induced loss (e.g., greater amount of loss per segment) if fabricated with a larger radius 110, because the length 114 of each segment 106 increases as the radius 110 increases. Thus, the number of segments selected for a closed-loop optical waveguide structure 102 can be based on the radius 110 of the closed-loop optical waveguide structure 102, as well as the internal loss that the closed-loop optical waveguide structure 102 is to achieve. In some embodiments, for a closed-loop optical waveguide structure 102 having a fixed number of segments 106, the segment-induced loss (e.g., greater amount of loss per segment) can decrease to a certain radius size, and can increase when the radius increases beyond the certain radius size.

[0036] In this way, by controlling the parameters of the closed-loop optical waveguide structure 102 (e.g., the radius 110, the number of segments 106, the length 114 of the segments 106, etc.), the closed-loop optical waveguide structure 102 is manufactured to have a specific optical signal loss (e.g., internal loss) such that the closed-loop optical waveguide structure 102 is able to achieve critical coupling (or achieve near critical coupling). When the closed-loop optical waveguide structure 102 is in the condition of critical coupling or near critical coupling, the extinction ratio (measured in dB) of the closed-loop optical waveguide structure 102 can be larger relative to the over-coupled condition or under-coupled condition. The extinction ratio of the closed-loop optical waveguide structure 102 represents the difference between the transmittance (measured in dB) at the center wavelength l cen  of the optical signal and the transmittance (measured in dB) at the full-width-half- maximum wavelength of the optical signal. In some cases, the extinction ratio can approach infinity when the closed-loop optical waveguide structure 102 is in the condition of critical coupling or near critical coupling.

[0037] Therefore, by manufacturing the closed-loop optical waveguide structure 102 to have a specific optical signal loss (e.g., internal loss), the quality factor of the closed-loop optical waveguide structure 102 is able to be balanced with its power coupling coefficient, which in turn enables the closed-loop optical waveguide structure 102 to achieve critical coupling or near critical coupling. At critical coupling or near critical coupling, the closed-loop optical waveguide structure 102 is able to achieve high efficiency operation (e.g., with minimal modulation imperfection and reduced power consumption when modulating or filtering) and high selective optical filtering relative to over-coupling or under-coupling.

[0038] FIG. 9A to FIG. 9E and FIG. 10A to FIG. 10C Further, the positions of the cross-sectional views shown in other figures herein are illustrated. For example, FIG. 1A , FIG. 1B , FIG. 1A and / or FIG. 1B The cross-sectional view in the embodiment of

[0039] As mentioned above, FIG. 2A to FIG. 2C and FIG. 2A to FIG. 2C are provided as examples. Other embodiments can differ from those described with respect to FIG. 1A and FIG. 1B .

[0040] FIG. 2A to FIG. 2C is a schematic diagram of an example implementation of a semiconductor photonic device 100 according to some embodiments. The example implementation of the semiconductor photonic device 100 shown and described with respect to FIG. 2A is similar to the example implementation of the semiconductor photonic device 100 shown and described with respect to FIG. 2A and FIG. 2B except with respect to FIG. 2CThe example implementations of the semiconductor photonic device 100 shown and described each include a closed-loop optical waveguide structure 102 having one or more non-uniform features. This enables tuning of the internal loss of the closed-loop optical waveguide structure 102, which is an alternative or additional way of tuning internal loss by including segments 106 in the closed-loop optical waveguide structure 102.

[0041] As FIG. 2B In an embodiment 200 of the semiconductor photonic device 100 shown, the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 can be annular (e.g., can be unsegmented). A first side of the closed-loop optical waveguide structure 102 has a first width (dimension Dl) and a second side of the closed-loop optical waveguide structure 102 opposite the first side has a second width (dimension D2) greater than the first width. The width of the closed-loop optical waveguide structure 102 increases (e.g., gradually and / or uniformly) around the closed-loop optical waveguide structure 102 from the first width of the first side to the second width of the second side. FIG. 2C

[0042] An embodiment 202 of the semiconductor photonic device 100 is shown, which FIG. 2B An embodiment 204 of the semiconductor photonic device 100 is shown, both of which include a closed-loop optical waveguide structure 102 having a polygonal top view shape including multiple segments 106 connected at intersection points 108 at opposite ends of the segments 106. As FIG. 2B and FIG. 2A to FIG. 2C As shown, two or more segments 106 of the closed-loop optical waveguide structure 102 can have different widths. Referring to FIG. 2A to FIG. 2C For example, the closed-loop optical waveguide structure 102 can include a segment 106a having a first width (dimension D3), a segment 106b having a second width (dimension D4) greater than the first width, a segment 106c having a third width (dimension D5) greater than the second width, a segment 106d having a fourth width (dimension D6) greater than the third width, a segment 106e having a fifth width (dimension D7) greater than the fourth width, and / or a segment 106f having a sixth width (dimension D8) greater than the fifth width. The widths of the segments 106 can increase from the segment 106a to the segment 106f in one or more directions around the closed-loop optical waveguide structure 102. As another example, the widths of the segments 106 can increase alternately around the closed-loop optical waveguide structure 102. For example, the third width of the segment 106c can be greater than the first width of the segment 106a, and the fifth width of the segment 106e can be greater than the third width of the segment 106c. FIG. 3A to FIG. 3C In some embodiments, the segments 106 can have inner and outer sidewalls having different lengths to achieve segments 106 having different lengths. For example, referring again to

[0043] FIG. 3A to FIG. 3C ​As an example, segment 106a can have an inner sidewall 206 and an outer sidewall 208, where the length of outer sidewall 208 is greater than the length of inner sidewall 206. This enables segments 106b and / or 106c adjacent to segment 106a to have a different width than the width of segment 106a.

[0044] Additionally and / or alternatively, two or more segments of closed-loop optical waveguide structure 102 can have different lengths. Additionally and / or alternatively, the included angle between two or more adjacent segments 106 of closed-loop optical waveguide structure 102 can be different angles. Additionally and / or alternatively, two or more segments of closed-loop optical waveguide structure 102 can have different thicknesses.

[0045] As described above, FIG. 1A are provided as examples. Other examples can differ from what is described FIG. 1B without departing from the scope of the disclosure.

[0046] FIG. 3A to FIG. 3C is a schematic diagram of an exemplary embodiment of the exemplary semiconductor photonic device 100 described herein. FIG. 3A The exemplary embodiments of the semiconductor photonic device 100 shown and described are similar to FIG. 3A and FIG. 3A described, except that, FIG. 3B The exemplary embodiments of the semiconductor photonic device 100 shown and described each include a closed-loop optical waveguide structure 102 and a bus optical waveguide structure 104 constructed from different materials. This provides greater manufacturing flexibility in fabricating the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 as an alternative or additional solution to including segments 106 in the closed-loop optical waveguide structure 102 for internal loss tuning. Further, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be vertically aligned along the z-direction in the semiconductor photonic device 100, which reduces the lateral footprint of the photonic integrated circuit including the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104.

[0047] FIG. 3C shows a top view and related cross-sectional view along line A-A of one embodiment 300 of the semiconductor photonic device 100. As shown in the top view of FIG. 3B The closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 can be ring-shaped (e.g., can be non-segmented) as shown in the top view of

[0048] As shown in the cross-sectional view of FIG. 3CAs shown in the cross-sectional view, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be arranged perpendicularly along the z-direction in the semiconductor photonic device 100. The closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be contained within the dielectric layer 302 of the semiconductor photonic device 100. The dielectric layer 302 can include one or more dielectric materials, such as silicon dioxide (SiO2). x ), silicon nitride (Si x N y Silicon oxynitride (SiON), tetraethyl orthosilicate oxide, silicon phosphosilicate glass (PSG), borosilicate phosphosilicate glass (BPSG), silicon fluoride glass (FSG), carbon-doped silicon dioxide and / or other dielectric materials.

[0049] The closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 may include different materials or different material compositions. For example, the closed-loop optical waveguide structure 102 may include one or more semiconductor materials, while the bus optical waveguide structure 104 may include one or more dielectric materials. Similarly, the closed-loop optical waveguide structure 102 may include one or more dielectric materials, while the bus optical waveguide structure 104 may include one or more semiconductor materials. Examples of such semiconductor materials include silicon (Si), germanium (Ge), silicon-germanium (SiGe), silicon doped with one or more types of dopants (e.g., p-type dopants, n-type dopants), germanium doped with one or more types of dopants, and / or another semiconductor material. Examples of such dielectric materials include silicon oxide (SiO2). x ), silicon nitride (Si x N y ), silicon oxide doped with one or more types of dopants, silicon nitride doped with one or more types of dopants, and / or another dielectric material.

[0050] Furthermore and / or alternatively, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 may have different widths. Furthermore and / or alternatively, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 may have different thicknesses.

[0051] FIG. 3A to FIG. 3C Example 304 of the semiconductor photonic device 100 is shown, while FIG. 3A to FIG. 3C Embodiment 306 of the semiconductor photonic device 100 is shown, both including a closed-loop optical waveguide structure 102 having a polygonal top view shape, the polygon comprising a plurality of segments 106 connected at intersections 108 at their opposite ends. FIG. 4A to FIG. 4C and FIG. 4A to FIG. 4CAs shown in the top view, the bus optical waveguide structure 104 may be located above a portion of the closed-loop optical waveguide structure 102, such that the portion of the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 are aligned along the x-direction in the semiconductor photonic device 100. The portion of the closed-loop optical waveguide structure 102 may include one or more segments 106, one or more intersections 108, or combinations thereof.

[0052] As mentioned above, FIG. 1A This is provided as an instance. Other instances may be provided. FIG. 1B The differences mentioned above.

[0053] FIG. 4A to FIG. 4C This is a schematic diagram of an exemplary embodiment of the exemplary semiconductor photonic device 100 described herein. FIG. 4A Exemplary embodiments of the semiconductor photonic device 100 shown and described FIG. 4A and FIG. 4A The description and the depiction are similar, but the difference lies in... FIG. 4B Exemplary embodiments of the semiconductor photonic device 100 shown and described each include a closed-loop optical waveguide structure 102 and a bus optical waveguide structure 104 made of different materials. This provides greater manufacturing flexibility in fabricating the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 as an alternative to or supplement to internal loss tuning in the closed-loop optical waveguide structure 102 by including segments 106. Furthermore, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be horizontally arranged in the x-direction within the semiconductor photonic device 100, which reduces the vertical footprint of the photonic integrated circuit including the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104. Additionally, this allows for the inclusion of a modulator heater structure above the closed-loop optical waveguide structure 102 to stabilize the resonant frequency of the closed-loop optical waveguide structure 102.

[0054] FIG. 4C A top view and a related cross-sectional view along line AA are shown for one embodiment 400 of the semiconductor photonic device 100. FIG. 4B As shown in the top view, the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 may be annular (e.g., non-segmented). The bus optical waveguide structure 104 may be laterally adjacent to a portion of the closed-loop optical waveguide structure 102, such that said portion of the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 are aligned in the x-direction and offset relative to each other in the y-direction.

[0055] like FIG. 4A to FIG. 4CAs shown in cross-sectional view, portions of the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be arranged horizontally along the x-direction in the semiconductor photonic device 100. The closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can be included in a dielectric layer 402 of the semiconductor photonic device 100. The dielectric layer 402 can include one or more dielectric materials, such as silicon dioxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorosilicate glass (FSG), carbon-doped silicon dioxide, and / or other dielectric materials.

[0056] The closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can include different materials or different compositions of materials. For example, the closed-loop optical waveguide structure 102 can include one or more semiconductor materials, while the bus optical waveguide structure 104 can include one or more dielectric materials. As another example, the closed-loop optical waveguide structure 102 can include one or more dielectric materials, while the bus optical waveguide structure 104 can include one or more semiconductor materials. Examples of such semiconductor materials include silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon doped with one or more types of dopants (e.g., p-type dopants, n-type dopants), germanium doped with one or more types of dopants, and / or another semiconductor material. Examples of such dielectric materials include silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxide doped with one or more types of dopants, silicon nitride doped with one or more types of dopants, and / or another dielectric material.

[0057] Additionally and / or alternatively, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can have different widths. Additionally and / or alternatively, the closed-loop optical waveguide structure 102 and the bus optical waveguide structure 104 can have different thicknesses.

[0058] FIG. 4A to FIG. 4C An embodiment 404 of the semiconductor photonic device 100 is shown, FIG. 5A to FIG. 5D An embodiment 406 of the semiconductor photonic device 100 is shown, both including a closed-loop optical waveguide structure 102 having a polygonal top-down shape that includes a plurality of segments 106 connected at intersection points 108 at opposite ends of the segments 106. As FIG. 5A to FIG. 5D and 4CAs shown in the top view, the bus waveguide structure 104 can be located laterally adjacent to a portion of the closed-loop optical waveguide structure 102 such that the portion of the closed-loop optical waveguide structure 102 and the bus waveguide structure 104 are arranged in the x-direction and are offset in the y-direction in the semiconductor photonic device 100. The portion of the closed-loop optical waveguide structure 102 can include one or more segments 106, one or more intersections 108, or a combination thereof.

[0059] As described above, FIG. 1A are provided as examples. Other examples can differ from FIG. 1B what is described.

[0060] FIG. 5A to 5D is a schematic diagram of an example implementation of a semiconductor photonic device 100 according to some embodiments. FIG. 5A The example implementations of the semiconductor photonic device 100 shown and described above are similar to FIG. 5A and FIG. 5B those shown and described above, except that FIG. 5B The example implementations of the semiconductor photonic device 100 shown and described above each include a closed-loop optical waveguide structure 102 and a bus waveguide structure 104 that is symmetric to at least a portion of the closed-loop optical waveguide structure 102. This enables the internal loss in the bus waveguide structure 104 to be tuned in a similar manner to the internal loss in the closed-loop optical waveguide structure 102.

[0061] FIG. 5B shows a top view of an embodiment 500 of the semiconductor photonic device 100. As FIG. 5C As shown in the top view, the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 can be ring-shaped (e.g., can be non-segmented). The bus waveguide structure 104 can be laterally adjacent to the closed-loop optical waveguide structure 102. The bus waveguide structure 104 can have a top view shape that is symmetric and mirrored with respect to a portion 502 of the closed-loop optical waveguide structure 102 facing the bus waveguide structure 104. For example, the bus waveguide structure 104 can have a semi-circle shape (or half-circle shape) having a center point 504 adjacent to the closed-loop optical waveguide structure 102 and an end point 506 facing away from the closed-loop optical waveguide structure 102. The bend loss in the bus waveguide structure 104 can be tuned by fabricating the bus waveguide structure 104 with a particular radius of curvature.

[0062] FIG. 5C shows a top view of an embodiment 508 of the semiconductor photonic device 100. As FIG. 5BFigure 6A shows a top view of an embodiment 508 of a semiconductor photonic device 100. As shown in the top view, embodiment 508 is similar to embodiment 500, except that the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 has a top view shape that is polygonal, including a plurality of segments 106 that are connected at their ends at intersection points 108. Accordingly, the bus optical waveguide structure 104 also includes a plurality of segments 106 that are connected at their ends at intersection points 108. In addition, in embodiment 508, the center point 504 of the bus optical waveguide structure 104 corresponds to an intersection point 108 that is adjacent to an intersection point 108 of the closed-loop optical waveguide structure 102. FIG. 5C In embodiment 508, the center point 504 of the bus optical waveguide structure 104 corresponds to an intersection point 108 that is adjacent to an intersection point 108 of the closed-loop optical waveguide structure 102.

[0063] FIG. 5B Figure 6B shows a top view of an embodiment 510 of a semiconductor photonic device 100. As shown in the top view, embodiment 510 is similar to embodiment 508, FIG. 5D except that the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 has a top view shape that is rotated relative to the closed-loop optical waveguide structure 102 of embodiment 508. FIG. 5D In embodiment 510, the closed-loop optical waveguide structure 102 is rotated relative to the closed-loop optical waveguide structure 102 of embodiment 508. Accordingly, the center point 504 of the bus optical waveguide structure 104 corresponds to an intersection point 108 of the bus optical waveguide structure 104 that is adjacent to a segment 106 of the closed-loop optical waveguide structure 102 and the associated intersection points 108 at the ends of the segment 106. FIG. 5C FIG. 5C In embodiment 510, the closed-loop optical waveguide structure 102 is rotated relative to the closed-loop optical waveguide structure 102 of embodiment 508. Accordingly, the center point 504 of the bus optical waveguide structure 104 corresponds to an intersection point 108 of the bus optical waveguide structure 104 that is adjacent to a segment 106 of the closed-loop optical waveguide structure 102 and the associated intersection points 108 at the ends of the segment 106.

[0064] FIG. 5A to FIG. 5D Figure 6C shows a top view of an embodiment 512 of a semiconductor photonic device 100. As shown in the top view, embodiment 512 is similar to embodiment 510, FIG. 5A to FIG. 5D except that the bus optical waveguide structure 104 of the semiconductor photonic device 100 has a top view shape that is rotated relative to the bus optical waveguide structure 104 of embodiment 510. FIG. 6A In embodiment 512, the bus optical waveguide structure 104 is rotated relative to the bus optical waveguide structure 104 of embodiment 510. Accordingly, a segment 106 of the bus optical waveguide structure 104 is adjacent to a segment 106 of the closed-loop optical waveguide structure 102. FIG. 6B As described above,

[0065] embodiments are provided by way of example only. Other embodiments can differ from those described. FIG. 6A FIG. 6B As described above,

[0066] FIG. 1A and FIG. 1B are schematic diagrams of exemplary embodiments of the exemplary semiconductor photonic device 100 described herein. FIG. 6A and FIG. 6A are schematic diagrams of exemplary embodiments of the exemplary semiconductor photonic device 100 described herein. FIG. 6A and FIG. 6B are schematic diagrams of exemplary embodiments of the exemplary semiconductor photonic device 100 described herein. FIG. 6B and 6B ​​The exemplary embodiments of the semiconductor photonic device 100 shown and described each include a closed-loop optical waveguide structure 102 and a bus optical waveguide structure 104 having a segment that conforms to the top view shape of the closed-loop optical waveguide structure 102. The segment can be used to tune internal losses in the bus optical waveguide structure 104 in addition to (or instead of) tuning internal losses in the closed-loop optical waveguide structure 102.

[0067] FIG. 6A A top view of an embodiment 600 of the semiconductor photonic device 100 is shown. As shown in the top view of FIG. 6A The closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 can be ring-shaped (e.g., can be non-segmented) as shown in the top view of

[0068] FIG. 7A to FIG. 7F A top view of an embodiment 604 of the semiconductor photonic device 100 is shown. As shown in the top view of FIG. 1A Embodiment 604 is similar to embodiment 600, except that the closed-loop optical waveguide structure 102 of the semiconductor photonic device 100 has a top view shape that is polygonal, including a plurality of segments 106 connected at their ends to a junction 108. Thus, the portion 606 of the bus optical waveguide structure 104 adjacent to the closed-loop optical waveguide structure 102 also includes a plurality of segments 106 connected at their ends to a junction 108.

[0069] As described above, FIG. 1B and 6B are provided as examples. Other examples can differ from FIG. 2A to FIG. 2C and 6B what is described.

[0070] FIG. 5A to FIG. 5DThis is a schematic diagram of an exemplary embodiment 700 forming the semiconductor photonic device 100 (or a portion thereof) described herein. In some embodiments, one or more semiconductor processing operations associated with exemplary embodiment 700 may be performed using one or more semiconductor processing tools, such as deposition tools, exposure tools, development tools, etching tools, planarization tools, ion implantation tools, and / or wafer / die transport tools. In some embodiments, one or more semiconductor processing operations associated with exemplary embodiment 700 may be used to form FIG. 6A , FIG. 6B , FIG. 7F , FIG. 7A to FIG. 7F , FIG. 7A to FIG. 7F and / or FIG. 8A to FIG. 8E One or more example embodiments of the semiconductor photonic device 100 shown and described.

[0071] Reference FIG. 3A to FIG. 3C A substrate 702 is provided. The substrate 702 may include a silicon on insulator (SOI) substrate, which includes a semiconductor substrate 704 (e.g., a silicon (Si) substrate and / or other types of semiconductor substrates), a dielectric layer 706 (e.g., a buried oxide or bottom oxide (BOX) layer and / or other types of insulating layer) on and / or above the semiconductor substrate 704, and a semiconductor layer 708 (e.g., a silicon (Si) layer and / or other types of semiconductor layer) on and / or above the dielectric layer 706.

[0072] Alternatively, the semiconductor substrate 704 may be a semiconductor wafer, and a deposition tool may be used to form a dielectric layer 706 over and / or thereon on the semiconductor substrate 704, and a semiconductor layer 708 may be formed over and / or thereon on the dielectric layer 706. The deposition tool may use CVD technology, PVD technology, oxidation technology (e.g., thermal oxidation technology) and / or other types of deposition technology to form the dielectric layer 706. The deposition tool may use CVD technology, PVD technology, epitaxial technology and / or other types of deposition technology to form the first semiconductor layer 708.

[0073] like FIG. 8A As shown, the bus waveguide structure 104 and the closed-loop waveguide structure 102 can be formed in the semiconductor layer 708. In some embodiments, the pattern in the hard mask layer 710 is used to etch the semiconductor layer 708 to form the bus waveguide structure 104 and the closed-loop waveguide structure 102. FIG. 8A As shown, deposition tools can be used to form a hard mask layer 710 on semiconductor layer 708 (e.g., using CVD, PVD and / or another deposition technique).

[0074] like FIG. 8BAs shown, the hard mask layer 710 can be patterned. The hard mask layer 710 can be patterned using a photoresist layer. A photoresist layer can be formed on the hard mask layer 710 using a deposition tool with spin coating and / or other types of deposition techniques. An exposure tool can be used to expose the photoresist layer to a radiation source to form a pattern within the photoresist layer. A development tool can be used to develop and remove portions of the photoresist layer to expose the pattern. The pattern can be transferred to the hard mask layer 710 by etching the hard mask layer 710 according to the pattern in the photoresist layer.

[0075] like FIG. 1A As shown, an etching tool can be used to etch the semiconductor layer 708 based on the pattern in the hard mask layer 710, by removing a portion of the semiconductor layer 708 to form the bus optical waveguide structure 104 and the closed-loop optical waveguide structure 102. In some embodiments, the etching operation includes plasma etching, wet chemical etching, and / or another type of etching operation. In some embodiments, a photoresist removal tool uses a chemical stripper, plasma ashing, and / or another technique to remove the remaining portion of the photoresist layer. In some embodiments, a planarization tool is used to remove the remaining portion of the hard mask layer 710 using chemical mechanical planarization (CMP) and / or another type of planarization technique.

[0076] FIG. 1B Exemplary cross-sectional profiles of the busbar waveguide structure 104 and the closed-loop waveguide structure 102 are further shown. FIG. 2A to FIG. 2C Alternative embodiments of the bus optical waveguide structure 104 and / or the closed-loop optical waveguide structure 102 are shown. As shown, the bus optical waveguide structure 104 may be a strip waveguide with an approximately rectangular or approximately square cross-sectional shape. The closed-loop optical waveguide structure 102 may also have a strip waveguide cross-sectional profile. Furthermore, the closed-loop optical waveguide structure 102 may have terminals or contacts on opposite sides of the strip waveguide to allow voltage to be applied to the closed-loop optical waveguide structure 102 for modulating the refractive index of the closed-loop optical waveguide structure 102 to modulate the optical signal.

[0077] like FIG. 3A to FIG. 3C The diagram shows a top view of the semiconductor photonic device 100. The closed-loop optical waveguide structure 102 can be formed into a polygonal top view shape with multiple segments 106, such as... FIG. 5A to FIG. 5D , FIG. 6A , FIG. 6B , FIG. 8C , FIG. 8C and / or FIG. 8D An embodiment of the closed-loop optical waveguide structure 102 is shown.

[0078] like FIG. 8EAs shown, additional material for the dielectric layer 706 can be deposited to encapsulate the bus waveguide structure 104 and the closed-loop optical waveguide structure 102 in the dielectric layer 706. The additional material for the dielectric layer 706 can be deposited using a deposition tool using chemical vapor deposition techniques, physical vapor deposition techniques, oxidation techniques (e.g., thermal oxidation techniques), and / or other types of deposition techniques. In some implementations, one or more additional semiconductor processing operations can be performed to deposit the additional material for the dielectric layer 706. For example, a shallow trench isolation (STI) liner oxidation operation and / or a high density plasma (HDP) deposition operation can be performed using a deposition tool to deposit the additional material for the dielectric layer 706. As another example, after the additional material for the dielectric layer 706 is deposited, a chemical mechanical polishing operation and / or other types of planarization operations can be performed using a planarization tool to planarize the dielectric layer 706.

[0079] As described above, FIG. 8A to FIG. 8E is provided as an example. Other examples can differ from FIG. 8A to FIG. 8E what is described.

[0080] FIG. 9A to FIG. 9E is a schematic diagram of an example embodiment 800 of forming a semiconductor photonic device 100 (or a portion thereof) described herein. In some implementations, one or more semiconductor processing operations related to the embodiment 800 can be performed using one or more semiconductor processing tools, such as a deposition tool, an exposure tool, a development tool, an etching tool, a planarization tool, an ion implantation tool, and / or a wafer / die transport tool, etc. In some implementations, one or more semiconductor processing operations related to the embodiment 800 can be performed to form a semiconductor photonic device 100 (or a portion thereof) as described above. FIG. 4A to FIG. 4C one or more example implementations of the semiconductor photonic device 100 as shown and described.

[0081] Referring to FIG. 9A , a substrate 802 is provided. The substrate 802 can include a semiconductor substrate 804, a dielectric layer 806, and a semiconductor layer 808, similar to the substrate 702 in the embodiment 700. As FIG. 9A further shown, a hard mask layer 810 can be formed on the semiconductor layer 808 and patterned similar to the hard mask layer 710 in the embodiment 700. However, in the embodiment 800, the hard mask layer 810 is patterned only for forming the closed-loop optical waveguide structure 102, but not for forming the bus waveguide structure 104.

[0082] As FIG. 9BAs shown, a portion of the semiconductor layer 808 is removed using an etching tool based on the pattern in the hard mask layer 810 to form the closed-loop optical waveguide structure 102. In some embodiments, the etching operation includes a plasma etching operation, a wet chemical etching operation, and / or another type of etching operation. In some embodiments, a photoresist removal tool is used to remove the remaining portion of the photoresist layer using a chemical stripper, a plasma ashing, and / or another technique. In some embodiments, a planarization tool is used to remove the remaining portion of the hard mask layer 810 using a chemical mechanical polishing technique and / or another type of planarization technique. The closed-loop optical waveguide structure 102 can be formed to have a polygonal top view shape with a plurality of segments 106, as shown in FIG. 1A , FIG. 1B , FIG. 2A to FIG. 2C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5D , FIG. 6A and / or FIG. 6B embodiments.

[0083] As shown in FIG. 9C , additional material for the dielectric layer 806 can be deposited to encapsulate the closed-loop optical waveguide structure 102 in the dielectric layer 806. The additional material for the dielectric layer 806 can be deposited using a deposition tool using a CVD technique, a PVD technique, an oxidation technique (e.g., a thermal oxidation technique), and / or another type of deposition technique. In some implementations, after the additional material for the dielectric layer 806 is deposited, a CMP operation and / or another type of planarization operation can be performed using a planarization tool to planarize the dielectric layer 806.

[0084] As further shown in FIG. 9C , a recess 812 can be formed in the dielectric layer 806. The recess 812 is formed in the z-direction above the closed-loop optical waveguide structure 102 in the semiconductor photonic device 100. In some implementations, the dielectric layer 806 is etched using a pattern in a photoresist layer to form the recess 812. In these implementations, a photoresist layer can be formed on the dielectric layer 806 using a deposition tool. The photoresist layer can be exposed to a radiation source using an exposure tool to pattern the photoresist layer. Portions of the photoresist layer can be developed and removed using a development tool to expose the pattern. The dielectric layer 806 can be etched according to the pattern using an etching tool to form the recess 812 in the dielectric layer 806. In some implementations, the etching operation includes a plasma etching operation, a wet chemical etching operation, and / or another type of etching operation. In some implementations, the remaining portion of the photoresist layer can be removed using a photoresist removal tool (e.g., using a chemical stripper, a plasma ashing, and / or another technique). In some implementations, a hard mask layer is used as an alternative technique to etch the dielectric layer 806 according to the pattern.

[0085] As shown in FIG. 9DAs shown, dielectric material can be deposited in the groove 812 to form a busbar waveguide structure 104 in the groove 812. The dielectric material of the busbar waveguide structure 104 can be deposited using deposition tools employing chemical vapor deposition, physical vapor deposition, oxidation techniques (e.g., thermal oxidation), and / or other types of deposition techniques. In some embodiments, after additional material is deposited for the dielectric material of the busbar waveguide structure 104, a planarization tool can be used to perform chemical mechanical polishing and / or other types of planarization operations to planarize the busbar waveguide structure 104.

[0086] like FIG. 9E As shown, additional material can be deposited for dielectric layer 806 to encapsulate the bus optical waveguide structure 104 within dielectric layer 806. Deposition tools can be used to deposit the additional material for dielectric layer 806 using chemical vapor deposition, physical vapor deposition, oxidation techniques (e.g., thermal oxidation), and / or other types of deposition techniques. In some embodiments, after depositing the additional material for dielectric layer 806, planarization tools can be used to perform chemical mechanical polishing and / or other types of planarization operations to planarize dielectric layer 806.

[0087] As mentioned above, FIG. 9A to FIG. 9E This is provided as one instance. Other instances may be provided. FIG. 9A to FIG. 9E The differences mentioned above.

[0088] FIG. 10A to FIG. 10C This is a schematic diagram of an exemplary embodiment 900 forming the semiconductor photonic device 100 (or a portion thereof) described herein. In some embodiments, one or more semiconductor processing operations associated with embodiment 900 may be performed using one or more semiconductor processing tools, such as deposition tools, exposure tools, development tools, etching tools, planarization tools, ion implantation tools, and / or wafer / die transport tools. In some embodiments, one or more semiconductor processing operations associated with exemplary embodiment 900 may be performed to form FIG. 10A to FIG. 10C One or more example embodiments of the semiconductor photonic device 100 shown and described.

[0089] Reference FIG. 10A A substrate 902 may be provided. The substrate 902 may include a semiconductor substrate 904, a dielectric layer 906, and a semiconductor layer 908, similar to the substrate 702 in embodiment 700. FIG. 10A As further shown, a hard mask layer 910 can be formed on the semiconductor layer 908 and patterned in a manner similar to the hard mask layer 710 in Embodiment 700. However, in Embodiment 900, the patterning of the hard mask layer 910 is only used to form the closed-loop optical waveguide structure 102, and not to form the busbar optical waveguide structure 104.

[0090] like FIG. 10B As shown, an etching tool is used to etch a portion of the semiconductor layer 908 based on a pattern in the hard mask layer 910 to form a closed-loop optical waveguide structure 102. In some embodiments, the etching operation includes plasma etching, wet chemical etching, and / or another etching operation. In some embodiments, a photoresist removal tool uses a chemical stripping agent, plasma ashing, and / or another technique to remove the remaining portion of the photoresist layer. In some embodiments, a planarization tool is used to remove the remaining portion of the hard mask layer 910 using chemical mechanical polishing and / or another planarization technique. The closed-loop optical waveguide structure 102 may be formed as a polygonal top-view shape having multiple segments 106, such as... FIG. 10B , FIG. 10C , FIG. 10C , FIG. 10C , FIG. 10B , FIG. 10C and / or FIG. 10B An example embodiment of the closed-loop optical waveguide structure 102 is shown.

[0091] like FIG. 10C As shown, additional material can be deposited for dielectric layer 906 to encapsulate the closed-loop optical waveguide structure 102 within dielectric layer 906. The additional material for dielectric layer 906 can be deposited using deposition tools employing CVD, PVD, oxidation techniques (e.g., thermal oxidation), and / or other types of deposition techniques. In some embodiments, after depositing the additional material for dielectric layer 906, CMP operations and / or other types of planarization operations can be performed using planarization tools to planarize dielectric layer 906.

[0092] like FIG. 10B Further, a groove 912 may be formed in the dielectric layer 906. The groove 912 is horizontally adjacent to the closed-loop optical waveguide structure 102 in the x-direction of the semiconductor photonic device 100. In some embodiments, a pattern in a photoresist layer is used to etch the dielectric layer 906 to form the groove 912. In these embodiments, a deposition tool may be used to form the photoresist layer on the dielectric layer 906. An exposure tool may be used to expose the photoresist layer to a radiation source to pattern the photoresist layer. A development tool may be used to develop and remove portions of the photoresist layer to expose the pattern. An etching tool may be used to etch the dielectric layer 906 according to the pattern to form the groove 912 in the dielectric layer 906. In some embodiments, the etching operation includes a plasma etching operation, a wet chemical etching operation, and / or another type of etching operation. In some embodiments, a photoresist removal tool may be used to remove the remaining portions of the photoresist layer (e.g., using a chemical stripper, plasma ashing, and / or another technique). In some embodiments, a hard mask layer is used as an alternative technique to etching the dielectric layer 906 according to the pattern.

[0093] likeFIG. 10C As shown, dielectric material can be deposited in the recess 912 to form the busbar optical waveguide structure 104 in the recess 912. The deposition tool can use chemical vapor deposition techniques, physical vapor deposition techniques, oxidation techniques (e.g., thermal oxidation techniques), and / or other types of deposition techniques to deposit the dielectric material of the busbar optical waveguide structure 104. In some implementations, after the additional material of the dielectric material of the busbar optical waveguide structure 104 is deposited, a planarization tool can perform a chemical mechanical polishing operation and / or other types of planarization operations to planarize the busbar optical waveguide structure 104.

[0094] As shown, additional material for the dielectric layer 906 can be deposited to encapsulate the busbar optical waveguide structure 104 in the dielectric layer 906. The deposition tool can use chemical vapor deposition techniques, physical vapor deposition techniques, oxidation techniques (e.g., thermal oxidation techniques), and / or other types of deposition techniques to deposit the additional material for the dielectric layer 906. In some implementations, after the additional material of the dielectric layer 906 is deposited, a planarization tool can perform a chemical mechanical polishing operation and / or other types of planarization operations to planarize the dielectric layer 906. FIG. 10B As described above,

[0095] is provided as an example. Other examples can differ from FIG. 10A to FIG. 10C what is described. FIG. 10A to FIG. 10C

[0096] FIG. 11 is an example illustration of a cross-sectional profile of one or more waveguide structures described herein. The closed-loop optical waveguide structure 102 and / or the busbar optical waveguide structure 104 described herein can be fabricated to have one or more of the cross-sectional profiles illustrated in FIG. 11 some embodiments. In some embodiments, the closed-loop optical waveguide structure 102 and / or the busbar optical waveguide structure 104 described herein can be fabricated to have another cross-sectional profile.

[0097] FIG. 11 illustrates an example 1000 of a cross-sectional profile of a closed-loop optical waveguide structure 102. FIG. 11 The cross-sectional profile in the semiconductor substrate 1002 can be referred to as a strip waveguide. The strip waveguide has a square cross-sectional profile or a rectangular cross-sectional profile and includes a strip of semiconductor material or dielectric material. The strip waveguide can be formed on the semiconductor substrate 1002 (which can correspond to the semiconductor substrate 704, 804, and / or 904, etc.) and on the dielectric layer 1004 (which can correspond to the dielectric layer 706, 806, and / or 906, etc.).

[0098] FIG. 11 illustrates an example 1006 of a cross-sectional profile of a closed-loop optical waveguide structure 102. FIG. 11 ​The cross-sectional profile in FIG. 1 1 10 can be referred to as a rib waveguide. The rib waveguide includes a strip section 1008 on top of a planar section 1010, where the planar section extends laterally outward in the x-direction beyond the strip section 1008 on both sides.

[0099] FIG. 11 An embodiment 1012 of a cross-sectional profile of a closed-loop optical waveguide structure 102 is shown. ​ The cross-sectional profile in FIG. 1 1 10 can be referred to as a rib waveguide. The rib waveguide includes a strip section 1008 on top of a planar section 1010, where the planar section extends laterally outward in the x-direction beyond the strip section 1008 on both sides. ​ The difference between the cross-sectional profile of the deep-rib waveguide shown in FIG. 1 1 10 and the cross-sectional profile of the rib waveguide shown in FIG. 1 1 12 is that, in the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, ​ The difference between the cross-sectional profile of the deep-rib waveguide shown in FIG. 1 1 10 and the cross-sectional profile of the rib waveguide shown in FIG. 1 1 12 is that, in the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the strip section 1008 can be less than the thickness of the planar section 1010. ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the strip section 1008 can be less than the thickness of the planar section 1010. ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the planar section 1010 can be greater than the thickness of the strip section 1008. ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the planar section 1010 can be greater than the thickness of the strip section 1008. ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the strip section 1008 can be less than the thickness of the planar section 1010. ​ In the deep-rib waveguide cross-sectional profile shown in FIG. 1 1 10, the thickness of the strip section 1008 can be less than the thickness of the planar section 1010.

[0100] As described above, ​ are provided as examples. Other examples can differ from what is described in this regard. ​ are described.

[0101] ​ is a flow diagram of an exemplary process 1 100 related to forming a semiconductor photonic device as described herein. In some embodiments, ​ One or more process blocks of the process 1 100 can be performed using one or more semiconductor processing tools, such as a deposition tool, an exposure tool, a development tool, an etch tool, a planarization tool, an ion implantation tool, and / or a wafer / die transfer tool, etc.

[0102] As described above, ​As shown, process 1100 can include forming a first optical waveguide structure having a first top-down shape in a semiconductor layer over a dielectric layer (block 1110). For example, one or more semiconductor process tools can be used to form a first optical waveguide structure (e.g., busbar optical waveguide structure 104) having a first top-down shape in a semiconductor layer (e.g., semiconductor layer 708, 808, and / or 908) over a dielectric layer (e.g., dielectric layer 302, 402, 706, 806, 906, and / or 1004), as described herein.

[0103] As ​ Further shown, process 1100 can include forming a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure having a second top-down shape comprising a plurality of segments (block 1120). For example, one or more semiconductor process tools can be used to form a second optical waveguide structure (e.g., closed-loop optical waveguide structure 102) adjacent to a first optical waveguide structure (e.g., busbar optical waveguide structure 104) having a second top-down shape comprising a plurality of segments 106, as described herein.

[0104] Process 1100 can include additional implementations, such as any single implementation or any combination of implementations described elsewhere herein, and / or any single implementation or any combination of implementations related to one or more other processes.

[0105] In a first embodiment, a cross-section of the first optical waveguide structure (e.g., closed-loop optical waveguide structure 102) is a strip waveguide cross-section (e.g., embodiment 1000 of a cross-sectional profile), a rib waveguide cross-section (e.g., embodiment 1006 of a cross-sectional profile), or a deep rib waveguide cross-section (e.g., embodiment 1012 of a cross-sectional profile).

[0106] In a second embodiment, alone or in combination with the first embodiment, the first top-down shape is substantially symmetrical to at least a portion of the second top-down shape.

[0107] In a third embodiment, alone or in combination with one or more of the first and second embodiments, the first top-down shape substantially conforms to the second top-down shape.

[0108] Although ​ Example blocks of process 1100 are shown, but in some implementations, process 1100 includes more blocks, fewer blocks, different blocks, or differently arranged blocks than depicted in the example of FIG. 11. Additionally, or alternatively, two or more blocks of process 1100 can be performed in parallel. ​ Example blocks of process 1100 are shown, but in some implementations, process 1100 includes more blocks, fewer blocks, different blocks, or differently arranged blocks than depicted in the example of FIG. 11. Additionally, or alternatively, two or more blocks of process 1100 can be performed in parallel.

[0109] Accordingly, a semiconductor photonic device includes a closed-loop optical waveguide structure having an overhead size and / or shape configured to achieve a particular optical signal loss for the closed-loop optical waveguide structure. The closed-loop optical waveguide structure can be fabricated to have a polygonal overhead shape, where the closed-loop optical waveguide structure includes a plurality of segments. The closed-loop optical waveguide structure can be fabricated to have a particular radius, to have a particular number of segments, and / or to have another property to achieve the particular optical signal loss for the closed-loop optical waveguide structure. The closed-loop optical waveguide structure is fabricated to have the particular optical signal loss such that a quality factor (Q factor) of the closed-loop optical waveguide structure can be balanced with a power coupling coefficient of the closed-loop optical waveguide structure. This enables the closed-loop optical waveguide structure to achieve critical coupling (or to achieve near-critical coupling).

[0110] In one aspect of the disclosure, a semiconductor photonic device is disclosed. The semiconductor photonic device includes a first optical waveguide structure. The semiconductor photonic device includes a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure including a polygonal overhead shape having a plurality of segments.

[0111] In some embodiments, the polygonal overhead shape of the second optical waveguide structure includes a substantially hexagonal overhead shape, a substantially octagonal overhead shape, or a substantially dodecagonal overhead shape. In some embodiments, the plurality of segments all have substantially the same overhead width. In some embodiments, a first subset of the plurality of segments has a first overhead width; a second subset of the plurality of segments has a second overhead width; and the first overhead width is greater than the second overhead width. In some embodiments, the plurality of segments all have substantially the same overhead length. In some embodiments, a first subset of the plurality of segments has a first overhead length; a second subset of the plurality of segments has a second overhead length; and the first overhead length is greater than the second overhead length. In some embodiments, a material composition of the first optical waveguide structure and a material composition of the second optical waveguide structure are substantially the same material composition. In some embodiments, a material composition of the first optical waveguide structure and a material composition of the second optical waveguide structure are different material compositions. In some embodiments, the first optical waveguide structure is vertically adjacent to the second optical waveguide structure. In some embodiments, the first optical waveguide structure is laterally adjacent to the second optical waveguide structure.

[0112] In yet another aspect of the disclosure, a semiconductor photonic device is disclosed. The semiconductor photonic device includes a first optical waveguide structure having a first overhead shape including a plurality of first segments. The semiconductor photonic device includes a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure including a second overhead shape having a plurality of second segments.

[0113] In some embodiments, wherein the first top view shape is substantially symmetrical to at least a portion of the second top view shape. In some embodiments, wherein a crossing point between two segments of the plurality of second segments of the second optical waveguide structure is adjacent to a crossing point between two segments of the plurality of first segments of the first optical waveguide structure. In some embodiments, wherein a crossing point between two segments of the plurality of first segments of the first optical waveguide structure is adjacent to a segment of the plurality of second segments of the second optical waveguide structure. In some embodiments, wherein a segment of the plurality of second segments of the second optical waveguide structure is adjacent to a segment of the plurality of first segments of the first optical waveguide structure. In some embodiments, wherein the first top view shape substantially conforms to the second top view shape.

[0114] In yet another aspect of the disclosure, a method is disclosed. The method includes forming a first optical waveguide structure in a semiconductor layer over a dielectric layer, the first optical waveguide structure including a first top view shape. The method includes forming a second optical waveguide structure adjacent to the first optical waveguide structure and including a second top view shape having a plurality of segments.

[0115] In some embodiments, wherein a cross-section of the second optical waveguide structure is a strip waveguide cross-section, a rib waveguide cross-section, or a deep rib waveguide cross-section. In some embodiments, wherein the first top view shape is substantially symmetrical to at least a portion of the second top view shape. In some embodiments, wherein the first top view shape substantially conforms to the second top view shape.

[0116] The terms "about" and "substantially" can indicate that a value of a given quantity is within a range of 5% of the value (e.g., ±1%, ±2%, ±3%, ±4%, ±5% of the value). These values are merely examples and are not intended to be limiting. It is understood that the terms "about" and "substantially" can refer to a percentage of a value of a given quantity in accordance with the present disclosure.

[0117] The features of the several embodiments outlined above have been presented with the purpose of providing those skilled in the art with a better understanding of the aspects of the disclosure. Those skilled in the art will readily appreciate that they can readily use the disclosure as a basis for designing or modifying other processes and structures to perform the same functions and / or achieve the same results as those introduced herein without departing from the spirit and scope of the disclosure. Those skilled in the art will also recognize or be able to ascertain, using no more than routine experimentation, many equivalents to the specific embodiments described herein. It is therefore to be understood that such equivalents within the spirit and scope of the disclosure are to be considered as within the purview and spirit of the disclosure.

Claims

1. A semiconductor photonic device, characterized by, comprising: a first optical waveguide structure; and a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure comprising a polygonal footprint shape having a plurality of segments.

2. The semiconductor photonic device of claim 1, wherein The polygonal footprint shape of the second optical waveguide structure comprises a substantially hexagonal footprint shape, a substantially octagonal footprint shape, or a substantially dodecagonal footprint shape.

3. The semiconductor photonic device of claim 1, wherein The plurality of segments all have substantially the same footprint width.

4. The semiconductor photonic device of claim 1, wherein A first subset of the plurality of segments have a first footprint width; wherein a second subset of the plurality of segments have a second footprint width; and wherein the first footprint width is greater than the second footprint width.

5. The semiconductor photonic device of claim 1, wherein, The plurality of segments all have substantially the same footprint length.

6. The semiconductor photonic device of claim 1, wherein A first subset of the plurality of segments have a first footprint length; wherein a second subset of the plurality of segments have a second footprint length; and wherein the first footprint length is greater than the second footprint length.

7. A semiconductor photonic device, comprising: comprising: a first optical waveguide structure comprising a first footprint shape having a plurality of first segments; and a second optical waveguide structure adjacent to the first optical waveguide structure, the second optical waveguide structure comprising a second footprint shape having a plurality of second segments.

8. The semiconductor photonic device of claim 7, wherein, At least a portion of the first footprint shape is substantially symmetrical to the second footprint shape.

9. The semiconductor photonic device of claim 7, wherein, An intersection between two segments of the plurality of second segments of the second optical waveguide structure is proximate to an intersection between two segments of the plurality of first segments of the first optical waveguide structure.

10. The semiconductor photonic device of claim 7, wherein, An intersection between two segments of the plurality of first segments of the first optical waveguide structure is proximate to a segment of the plurality of second segments of the second optical waveguide structure.

Images